0% found this document useful (0 votes)
166 views2 pages

ES 210 HW4 Sonoma State University

This document contains homework problems for a combinational logic circuits class. It includes problems involving deriving Boolean expressions and truth tables from circuit diagrams, designing combinational circuits to perform specific logic functions, developing logic diagrams for common circuits like adders and decoders, and implementing Boolean functions using multiplexers and decoders.

Uploaded by

Jim
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
166 views2 pages

ES 210 HW4 Sonoma State University

This document contains homework problems for a combinational logic circuits class. It includes problems involving deriving Boolean expressions and truth tables from circuit diagrams, designing combinational circuits to perform specific logic functions, developing logic diagrams for common circuits like adders and decoders, and implementing Boolean functions using multiplexers and decoders.

Uploaded by

Jim
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 2

ES 210 HW4 Sonoma State University

1. Using the Combinational circuit below:


a) Derive the Boolean expressions for T1 through T4. Evaluate the outputs F1 and F2 as
a function of the four inputs.
b) List the truth table with 16 binary combinations of the four input variables. Then list
the binary values for T1 through T4 and outputs F1 and F2 in the table.
c) Plot the output Boolean functions (F1 and F2) obtained in part (b) on K-maps and
show that the simplified Boolean expressions are equivalent to the ones obtained in
part (a).

2. Design a minimized Combinational circuit with three inputs, x, y, and z, and three outputs,
A, B, and C . When the binary input is 0, 1, 2, or 3, the binary output is two greater than the
input. When the binary input is 4, 5, 6, or 7, the binary output is three less than the input.
Draw the resulting circuits.

3. Develop a logic diagram for the following


i. Four bit BCD adder
ii. Two bit by two bit binary multiplier
iii. Four bit magnitude comparator
a) Logic circuit that compares if A = B
b) Logic circuit that compares if A > B
c) Logic circuit that compares if B > A
d) Logic circuit that compares if A = B, A > B, or B > A
iv. Three bit Decoder
v. Four to one line multiplexer

4. Design a combinational circuit that convert a four-bit Gray code (Table 1.6) to a four bit
binary number. Implement the circuit with exclusive-OR gates.
ES 210 HW4 Sonoma State University

5. A ABCD-to-seven-segment decoder is a Combinational circuit that converts a decimal digit


in BCD to an appropriate code for the selection of segments in an indicator used to display
the decimal digit in a familiar form. The seven outputs of the decoder (a, b, c, d, e, f, g)
select the corresponding segments in the display, as shown in the figure below. The numeric
display chosen to represent the decimal digit is also shown. Using a truth table and K-maps,
design a BCD to seven segment decoder using a minimum number of gates. The six invalid
combinations should result in a blank display. You do not need to draw the circuits. Assume
you need to output a ‘1’ to enable a line on the display.

6. Draw the logic diagram of a 2-to-4-line decoder using (a) NOR gates only and (b) NAND
gates only. Include an enable input.

7. Using a decoder chip and external gates, design the combinational circuit defined by the
following three Boolean functions:

F1  x yz   xz
F2  xy z   x y
F3  x y z   xy
8. Implement the following Boolean function with a multiplexer chip:

F A, B,C, D    0,2,5,8,10,14 

You might also like