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Avionics Lecture Handouts (L-18)

The document discusses memory interfacing in 8085 microprocessors. It explains that memory is an integral part of microprocessor systems and is used to store instruction codes and data. The microprocessor activates control signals like RD, WR and IO/M to read from and write to memory. There are two main types of memory - program memory (EPROM) and data memory (RAM). Memory can be interfaced using address decoding techniques like absolute decoding and linear decoding. Absolute decoding uses all address lines to select a specific memory chip, while linear decoding uses individual address lines to reduce decoding hardware.

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60 views3 pages

Avionics Lecture Handouts (L-18)

The document discusses memory interfacing in 8085 microprocessors. It explains that memory is an integral part of microprocessor systems and is used to store instruction codes and data. The microprocessor activates control signals like RD, WR and IO/M to read from and write to memory. There are two main types of memory - program memory (EPROM) and data memory (RAM). Memory can be interfaced using address decoding techniques like absolute decoding and linear decoding. Absolute decoding uses all address lines to select a specific memory chip, while linear decoding uses individual address lines to reduce decoding hardware.

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Gowri Shankar
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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MAHENDRA ENGINEERING COLLEGE

MAHENDHIRAPURI, MALLASAMUDRAM - 637503 L-18


AE

Lecture Handouts
Subject Name: AVIONICS
VII/IV

Staff Name : Mr. J. GOWRI SHANKAR, AP/ECE

Unit : II (PRINCIPLES OF DIGITAL SYSTEMS Date of Lecture:

Topic of Lecture: Memories

Introduction:
Memory is an integral part of a microprocessor system, and in this section, we will discuss
how to interface a memory device with the microprocessor. The Memory Interfacing in 8085 is
used to access memory quite frequently to read instruction codes and data stored in memory. This
read/write operations are monitored by control signals. The microprocessor activates these signals
when it wants to read from and write into memory. In the last section we have already seen the
memory read and memory write machine cycles, and status of the RD, WR and IO/M status signals
for read/write operation. In the following section we will see memory structure and its
requirements, concepts in Memory Interfacing in 8085 and interfacing examples.
Prerequisite knowledge for Complete learning of Topic:
1. Semiconductors.
2. Digital circuits
Detailed content of the Lecture:
 As mentioned earlier, read/write memories consist of an array of registers, in which each
register has unique address. The size of the memory is N x M as shown in Fig. where N is
the number of registers and M is the word length, in number of bits.

 Basic Concepts in Memory Interfacing: For Memory Interfacing in 8085, following


important points are to be kept in mind. Microprocessor 8085 can access 64Kbytes memory
since address bus is 16-bit. But it is not always necessary to use full 64Kbytes address
space. The total memory size depends upon the application. Generally EPROM (or
EPROMs) is used as a program memory and RAM (or RAMs) as a data memory.
 When both, EPROM and RAM are used, the total address space 64Kbytes is shared by
them. The capacity of program memory and data memory depends on the application. It is
not always necessary to select 1 EPROM and 1 RAM.
 We can have multiple EPROMs and multiple RAMs as per the requirement of application.
We can place EPROM/RAM anywhere in full 64 Kbytes address space. But program
memory (EPROM) should be located from address 0000H since reset address of 8085
microprocessor is 0000H. It is not always necessary to locate EPROM and RAM in
consecutive memory For example :
 If the mapping of EPROM is from 0000H to OFFFH, it is not must to locate RAM from
1000H. We can locate it anywhere between 1000H and FFFFH. Where to locate memory

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component totally depends on the application. The memory interfacing requires to : Select
the chip Identify the register Enable the appropriate buffer. Microprocessor system includes
memory devices and I/O devices.
 It is important to note that microprocessor can communicate (read/write) with only one
device at a time, since the data, address and control buses are common for all the devices.
In order to communicate with memory or I/O devices, it is necessary to decode the address
from the microprocessor.
 Due to this each device (memory or I/O) can be accessed independently. The following
section describes common address decoding techniques.
 Address Decoding Techniques : Absolute decoding/Full Decoding Linear decoding/Partial
Decoding Absolute decoding: In absolute decoding technique, all the higher address lines
are decoded to select the memory chip, and the memory chip is selected only for the
specified logic levels on these high-order address lines; no other logic levels can select the
chip. Fig. 4.14 shows the Memory Interfacing in 8085 with absolute decoding. This
addressing technique is normally used in large memory systems.
 Address Decoding Techniques : Absolute decoding/Full Decoding Linear
decoding/Partial Decoding Absolute decoding: In absolute decoding technique, all the
higher address lines are decoded to select the memory chip, and the memory chip is
selected only for the specified logic levels on these high-order address lines; no other logic
levels can select the chip. Fig. 4.14 shows the Memory Interfacing in 8085 with absolute
decoding. This addressing technique is normally used in large memory systems.

Linear decoding: In small systems, hardware for the decoding logic can be eliminated by using
individual high-order address lines to select memory chips. This is referred to as linear decoding.
Fig. 4.15 shows the addressing of RAM with linear decoding technique. This technique is also
called partial decoding. It reduces the cost of decoding circuit, but it has a drawback of multiple
addresses (shadow addresses).

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Fig. 4.15 shows the addressing of RAM with linear decoding technique. A15 address line, is
directly connected to the chip select signal of EPROM and after inversion it is connected to the chip
select signal of the RAM. Therefore, when the status of A15 line is ‘zero’, EPROM gets selected
and when the status of A15 line is ‘one’ RAM gets selected. The status of the other address lines is
not considered, since those address lines are not used for generation of chip select signals.

Video Content / Details of website for further learning (if any):


 https://youtu.be/RVNXZS-HOgw
 https://youtu.be/bucaMw-0GVs
Important Books/Journals for further learning including the page nos.:
 Gaonkar, R.S., “Microprocessors Architecture – Programming and Application”, Wiley
and Sons Ltd., New Delhi, 1990
 A.P.Godse, D.A.Godse Electronics and Microprocessors, Technical publication,Dec-2011

Subject Teacher Verified by HoD/ECE

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