Advancement of FAPI Error Indication
Advancement of FAPI Error Indication
START.request
L1 API MESSAGES.
However it has been observed during the development
The general message format of the L1 API is stages that the details provided to the Layer 2 in the
shown in Table 3-1, where it can be seen that each L1 error indication message is not sufficient to pinpoint
API message consists of a header followed by a the precise issue which results in a great amounts of
message body [1]. The generic header consists of a round time debugging. A modification to the error
message type ID, a message body length and a indication message is been proposed to ease this issue.
vendor-specific body length. The current list of
message types is given in Table 2. The L1 API The details of the modifications are provided in
messages follow a standard naming convention section IV. Wrong configurations can occur due to
where: various reasons (i.e. Layer 2 sending wrong
parameters, corruption on memory on Layer 1 etc.)
All request messages are sent from the L2/L3 which could result in serious demerits to the overall
software to the PHY. system. For instance in a scenario when a wrong
All response messages are sent from the configuration arrives at the Layer 1 the Layer 1 may
PHY to the L2/L3 software. These are sent in not be in a position to process the data received.
response to a request. Hence resulting in a drop in throughput and further
All indication messages are sent from the causing CRC failure and retransmission. In a case
PHY to the L2/L3 software. These are sent when multiple CRC failures occur and the system has
asynchronously. reached its maximum retries, the User Equipment
(UE) may move into the link loss state. The UE going
III. BENFITS OF ADVANCE ERROR into link loss would require a re-network entry in
INDICATION MESSAGE. order for it to attach back onto the network. This
The current FAPI error indication message indeed would result in wastage of resources and
provides certain details to Layer 2 at various levels. would reduce the efficiency of the network system.
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The Advance Error Indication message can also The L1 API message formats for the
provide additional information which would help to ERROR.indication message is shown below in
pinpointing the location at which the issue was found TABLE 2 & 3.
in the Layer 1. The Advance Error Indication message
can also be extended to a further use by providing a Sub error message body has passed second level of
support over Layer 2, where such issue faced at Layer error code. But it has limited information passed to
1 can be recorded onto a database. This database can L2, its more generic code. The sub error code are
be useful to the Layer 2 scheduler where the future giving the extra level of information about what sub
configurations can be compared with the error has been hit out of 4 classified error (sfn_error,
configurations in database before being applied. If pdu_error, hi_error or tx_error). So to improve the
such a configuration is found then the next best error protection mechanism need to give more and
configuration could be applied to avoid any further accurate error indication so the MAC can take the
issues on the Layer 1. decision more effectively. Apart from the boundary
checks can send the board specific limitation to MAC
so it will avoid such combination which is unable to
IV. DETAILS OF ADVANCE ERROR support.
INDICATION MESSAGE.
The advancement to error indication message can be
divided into 5 levels of error protection For example if number of PDUs (like BCH PDUs,
PDSCH PDUs etc.) came wrong can be reported back
• Error level-1: It covers all parameters coming via to MAC in a SF. ALL DL and UL config parameters
FAPI. In this level we have boundary checks of boundary check will have unique error travelled back
all the parameters coming within a FAPI message so MAC can configure correct one or take necessary
(Only DL_Config and UL_Config FAPI action to avoid it.
parameters)[1], the Cell config parameters returns
Invalid message this range checking is not part of MSB is set to 1 for error (Bit 31).
error level-1. Next two bits for type of error (Bit 30 and 29),
• Error level-2: It covers the checks on total which are :
number of DL and UL PDUs supported by L1. • Information (01) : This error code type are
• Error level-3: It covers the scheduling limitations Informative only, which is not Introducing
/ tradeoffs that exist in L1 based on the any major error but useful to convoy it to L2
computation capacity or design. For example, L1 for scheduling the parameter next time. This
cannot process the RACH and SRS together in a error code can be overwritten by both the
single SF, so accordingly check is placed such Non-fatal and fatal error type.
that when higher layers try to schedule RACH • Non-Fatal (10) : These error code types are
and SRS together then L1 will report appropriate not breaking the system, but violation of the
error. parameter for the current SF. This error code
• Error level-4: It covers the error that exists at can be overwritten by fatal error type.
component level limitation which can be pointer • Fatal (11) : These error code types are able to
violation or memory alignment Issue. break the L1-SW, this error code is highest
• Error level-5: It covers the error that exists at priority. If this type comes need to return
component level limitation check. It may be due from then and there no further processing
to calculated parameters based on the FAPI will done.
parsing parameters or scheduling related problem Next three bits for what technology the error code
in L1 component is generating (Bit 26 to 28)
Next five bits is used for the Component, these
The ERROR.indication message is reported back are unique values for each module (Bit 21 to 25)
by the L1 to the MAC in each subframe procedure Next three bits for the sub module representation,
using applicable limited error code for each which can be used manager/ kernel levels (Bits
messages[2].If the L2/L3 software receives an 18 to 20). Below Modules is using those 3 bits to
ERROR.indication message for DL_CONFIG.request, declare its sub modules
UL_CONFIG.request, HI_DCI0.request or Next nine bits are reserved.
TX.request, it should assume that the UE did not The 8th bit is used as flag for next 2 byte error
receive data and control sent in this subframe. code. It is set as ‘1’.
From LSB, 8 bits are used for error code, these
are unique 256 error belong to each sub-module
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Table 2: Error Indication Message Body
comp_error sub_error_code UINT32 Component level error code for protection level 4 and 5
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Error level 2 Example:
VI. CONCLUSION.
If the number of PDU that can be processed in a sub-
frame is out of limit it can lead to a crash at the L1. The Error indication message had been modified to
Like if UE is expecting a DLSCH PDU but PHY provide better detailed information about the errors
receives less or more number of PDUs (max 16 PDUs being reported. It can be seen that with help of the
can be process in a Sub-Frame) then, It will leads to advancements explained in section IV better
an error which can be communicate to the L2. information can help the developers and tester to
locate the issue in real time, rather than try to capture
and analyze the logs. This will provide a benefit the
if (dlsch_pdu>16) debugging process reducing the overall time. The
{ paper only discusses one of the many different
error = ERROR | FATAL | SPM_FAPI | possible ways this error indication message can be
SPM_PDSCH | ERROR_MAX_DLSCH_PDU) modified to serve better use. The advance error
} indication was pertaining to specific Layer 1 design
and can be modified henceforth other Layer 1 specific
designs.
Error level 3 Example:
VII. REFERENCE
Another example is when L1 cannot process the
RACH and SRS together in a single SF, so [1] Small Cell Forum, Release 5, LTE SCAPI,
accordingly check is placed such that when higher March 2015.
[2] 3GPP Evolved Universal Terrestrial Radio
layers try to schedule RACH and SRS together then
Access (E-UTRA); Medium Access
L1 will report appropriate error.
Control(MAC) protocol specification TS36.321
Error level 4 Example [3] 3GPP Evolved Universal Terrestrial Radio
Access (E-UTRA); Physical Layer procedures
A simple but common issue is when pointers are not TS36.213
assigned and are initialized as NULL. During such [4] 3GPP Evolved Universal Terrestrial Radio
cases the pointers need to be assigned to a proper Access (E-UTRA);Multiplexing and channel
address and if found pointing to a NULL could cause coding TS36.212 V10.8.0
issues on the L1 code base.
if ( (spm_tdp_dynamic == NULL) || (spm_tdp_static
== NULL))
return error;
IF4_samp_ant0 = spm_tdp_dynamic-
>IF4_samples_ant0;
if ( ( IS_ALIGNED_SPLIB(IF4_samp_ant0,
ALIGNED_8_BYTES) == 0) )
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