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Implementation of A Logic Circuit From (2 4) and (3 8) Decoder.

This document describes an experiment to implement a 2x4 decoder and 3x8 decoder using logic gates. The objectives are to get familiar with decoders and implement a 2x4 and 3x8 decoder. It provides the required components, theory on how 2x4 and 3x8 decoders work, circuit diagrams, truth tables and procedures for setting up the decoders in a logic gate simulator.

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Mohayminul Al-Hamim
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3K views4 pages

Implementation of A Logic Circuit From (2 4) and (3 8) Decoder.

This document describes an experiment to implement a 2x4 decoder and 3x8 decoder using logic gates. The objectives are to get familiar with decoders and implement a 2x4 and 3x8 decoder. It provides the required components, theory on how 2x4 and 3x8 decoders work, circuit diagrams, truth tables and procedures for setting up the decoders in a logic gate simulator.

Uploaded by

Mohayminul Al-Hamim
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Name: Mohayminul Al-Hamim

ID: 153402032

Experiment No: 11

Experiment Name: Implementation of a logic circuit from (2*4) and (3*8) Decoder.

Objective:

 To get acquainted with decoder.


 To implement 2x4 decoder.
 To implement 3x8 decoder.

Required Apparatus:
 Logic gate simulator app.
 NAND gates IC types 7400 Quadruple 2 input.
 NOT gates IC types7404 Quadruple.
 Input and output gates.

Theory:

2 to 4 Line Decoder Circuit:

Similar to the multiplexer circuit, the decoder is not restricted to a particular address line, and
thus can have more than two outputs (with two, three, or four address lines). The decoder circuit
can decode a 2, 3, or 4-bit binary number, or can decode up to 4, 8, or 16 time-multiplexed
signals.

3 Line to 8 Line Decoder:

This decoder circuit gives 8 logic outputs for 3 inputs and has a enable pin. The circuit is
designed with AND and NAND logic gates. It takes 3 binary inputs and activates one of the eight
outputs. 3 to 8 line decoder circuit is also called as binary to an octal decoder.

𝐃𝟎 = 𝐀’𝐁’ 𝐃𝟏 = 𝐀’𝐁, 𝐃𝟐 = 𝐀𝐁’, 𝐃𝟑 = 𝐀𝐁

1
Name: Mohayminul Al-Hamim
ID: 153402032

Circuit Diagram Simulation and Truth Tables:

2x4 Decoder:

A B D0 D1 D2 D3

0 0 1 0 0 0

0 1 0 1 0 0

1 0 0 0 1 0

1 1 0 0 0 1

Fig: Truth table of 2x4 decoder

Fig: 2x4 decoder diagram

2
Name: Mohayminul Al-Hamim
ID: 153402032

3x8 Decoder:

A B C D0 D1 D2 D3 D4 D5 D6 D7

0 0 0 1 0 0 0 0 0 0 0

0 0 1 0 1 0 0 0 0 0 0

0 1 0 0 0 1 0 0 0 0 0

0 1 1 0 0 0 1 0 0 0 0

1 0 0 0 0 0 0 1 0 0 0

1 0 1 0 0 0 0 0 1 0 0

Fig: Truth table of 3x8 decoder

Fig: 3x8 decoder diagram

3
Name: Mohayminul Al-Hamim
ID: 153402032

Procedure:

 At first open logic gates simulator.


 Then take basic (NOT)gate.
 Also take input and output gates.
 At last we should connect input with logic gates and also setup output with logic gates.

Discussion:

 Check all gates before setup.


 Connect properly input and output with all gates.
 Check output with truth table.

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