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College of Management & IT: Digital Logic

The document summarizes a digital logic assignment submitted by Swikar Acharya. [1] The first question asks to design a logic circuit that outputs HIGH when the majority of 3 inputs are HIGH. Swikar designs the circuit as an OR gate with 3 AND gates as inputs, where each AND gate represents a case where the output is 1. [2] The second question asks to simplify a Boolean function F(A,B,C,D) = A'C'+AC'D' using K-maps, given that input combination A=C=1 can never occur. Swikar identifies a don't care condition and simplifies the function to Y = C'.

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0% found this document useful (0 votes)
74 views4 pages

College of Management & IT: Digital Logic

The document summarizes a digital logic assignment submitted by Swikar Acharya. [1] The first question asks to design a logic circuit that outputs HIGH when the majority of 3 inputs are HIGH. Swikar designs the circuit as an OR gate with 3 AND gates as inputs, where each AND gate represents a case where the output is 1. [2] The second question asks to simplify a Boolean function F(A,B,C,D) = A'C'+AC'D' using K-maps, given that input combination A=C=1 can never occur. Swikar identifies a don't care condition and simplifies the function to Y = C'.

Uploaded by

swikar Acharya
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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College of management & IT

Bachelor in Information and Technology.

Digital Logic

Submitted by: Submitted to:


Swikar Acharya Samir singh Bhandari

Year/Semester: First/Second

LCID: iiiIILC00017000872

Assignment
Date: iiiII22-07-2020
BIT 126 Digital Logic BIT(Hons.)/ Second semester

1. Design a logic circuit having 3 inputs which will have its output HIGH, only
when the majority of the inputs are HIGH

Answer:

Step 2: Write the AND terms for each case where the output is 1.

Making Truth Table:

A B C X

0 0 0 0

0 0 1 0

0 1 0 0
A’BC
0 1 1 1

1 0 0 0
AB’C
1 1 0 1 ABC’
1 1 1 1 ABC

Boolean Expression: A’BC + AB’C+ABC’+ABC

SOP expression for the output.


X = A’BC + AB’C +ABC +ABC
X = A’BC + AB’C + AB
X = A’BC + A(B’C+B) + A(C+B)
X = A’BC + AC + AB
X = A(BC+A) + AB
In K-Map:

Swikar Acharya 1
BIT 126 Digital Logic BIT(Hons.)/ Second semester

The simplified Boolean equation is one that sums all the terms corresponding to
each of the group.

X = AC + BC + AB

Since, the expression is in SOP form, the circuit is a group of AND Gates, working into a
single OR Gate.

Swikar Acharya 2
BIT 126 Digital Logic BIT(Hons.)/ Second semester

2. logic circuit implements the Boolean function F(A,B,C,D) =


A’C’+AC’D’
It is found that the circuit’s input combination A=C=1 can never occur.
Using K-map with proper don’t care conditions, find a simpler expression
and implement it using basic gates.

Answer:

Answer:

Given:

Boolean Function: F = A’C’+AC’D’

Now on K-Map.

CD
AB 00 01 11 10
1 1 X X
00 01 11 10

1 1 X X

1 X 0 0

1 X 0 0

Y=C’

C Y = C’
Y=C’

Swikar Acharya 3

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