3G 4 DigitalComm PDF
3G 4 DigitalComm PDF
3G 4 DigitalComm PDF
System
Recommended Books
Digital Communications / Fourth Edition (textbook)
-- John G. Proakis, McGraw Hill
Communication Systems / 4th Edition
-- Simon Haykin, John Wiley & Sons, Inc.
Digital Communications – Fundamentals and Applications /
2nd Edition
-- Bernard Sklar, Prentice Hall
Principles of Communications / Fifth Edition
-- Rodger E. Ziemer and William H. Tranter, John Wiley &
Sons, Inc.
Modern Digital and Analog Communication Systems
-- B.P. Lathi, Holt, Rinehart and Winston, Inc.
2 WITS Lab, NSYSU.
Example of Communications System
Local
Loop Mobile
Switch T1/E1 Facilities
Switching
Transmission Center
Equipment regenerator
Base
Central Office A/D Conversion
Station
(Digitization)
Local
Loop SONET
Switch T1/E1 Facilities
M SDH
U
Transmission T1/E1 Facilities
Equipment regenerator X
Central Office A/D Conversion
(Digitization)
Local
Loop
Switch T1/E1 Facilities
Transmission
Equipment regenerator
Mobile
Central Office A/D Conversion Switching
(Digitization) Center
TX
Source Channel Frequency Multiple
Format Encryption Interleaving Multiplexing Modulation RF
Encoding Encoding Spreading Access
PA
si (t)
Digital
Input C
mi H
A
Bit Digital
Synchronization N
Stream Waveform N
Digital E
Output L
m̂ i
sˆi (t)
RX
Source Channel Frequency Multiple
Format Decryption Deinterleaving Demultiplexing Demodulation RF
Decoding Decoding Despreading Access
IF
TX
Source Channel Frequency Multiple
Format Encryption Interleaving Multiplexing Modulation RF
Encoding Encoding Spreading Access
PA
si (t)
Digital
Input C
mi H
A
Bit Digital
Synchronization N
Stream Waveform N
Digital E
Output L
m̂ i
sˆi (t)
RX
Source Channel Frequency Multiple
Format Decryption Deinterleaving Demultiplexing Demodulation RF
Decoding Decoding Despreading Access
IF
∞
1
X S ( f ) = X ( f ) ∗ Xδ ( f ) =
TS
∑ X ( f − nf
n = −∞
S )
TX
Source Channel Frequency Multiple
Format Encryption Interleaving Multiplexing Modulation RF
Encoding Encoding Spreading Access
PA
si (t)
Digital
Input C
mi H
A
Bit Digital
Synchronization N
Stream Waveform N
Digital E
Output L
m̂ i
sˆi (t)
RX
Source Channel Frequency Multiple
Format Decryption Deinterleaving Demultiplexing Demodulation RF
Decoding Decoding Despreading Access
IF
.
.
.
Speech Encoding
Unvoiced Sound
Arises in pronunciation of certain consonants such as “s”, “f”, “p”, “j”,
“x”, …, etc.
Noise-like waveform.
TX
Source Channel Frequency Multiple
Format Encryption Interleaving Multiplexing Modulation RF
Encoding Encoding Spreading Access
PA
si (t)
Digital
Input C
mi H
A
Bit Digital
Synchronization N
Stream Waveform N
Digital E
Output L
m̂ i
sˆi (t)
RX
Source Channel Frequency Multiple
Format Decryption Deinterleaving Demultiplexing Demodulation RF
Decoding Decoding Despreading Access
IF
A subset S of Vn is a subspace if
The all-zero vector is in S
The sum of any two vectors in S is also in S.
Example of S: V 0 = 0000
V 1 = 0101
V 2 = 1010
V 3 = 1111
⎢ ⎥ ⎢ ⎥
⎢ ⎥ ⎢ ⎥
⎢⎣ h( n − k ) ⎥⎦ ⎢⎣ h( n − k )1 h( n − k )2 h( n − k ) n ⎥⎦
u = u1 , u2 ,… , un
uH T = u1hi1 + u2 hi 2 + + un hin = 0
where i = 1, 2,… , n − k
U is a code word generated by matrix G if and only if uHT=0
⎧= 0 If r is a code vector
Syndrome s ⎨
⎩≠ 0 Otherwise
56 WITS Lab, NSYSU.
Example of Syndrome Test
⎤ H = [ I n − k PT ]
⎡
⎢1 1 0 1 0 0⎥
⎢ ⎥
G = ⎢0 1 1 0 1 0⎥ ⎡1 0 0 1 0 1 ⎤
⎢1 0 1 0 0 1⎥ H = ⎢⎢0 1 0 1 1 0 ⎥⎥
⎢⎣ ⎥
P Ik ⎦ ⎢⎣0 0 1 0 1 1 ⎥⎦
The 6-tuple 1 0 1 1 1 0 is the code vector corresponding to the
message 1 1 0. ⎡1 0 0 ⎤
⎢0 1 0 ⎥⎥
⎢
⎢0 0 1⎥
s = u ⋅ H = [1 0 1 1 1 0] • ⎢
T
⎥ = [ 0 0 0]
⎢1 1 0⎥
⎢0 1 1⎥
⎢ ⎥
⎢⎣1 0 1 ⎥⎦
Compute the syndrome for the non-code-vector 0 0 1 1 1 0
s = [ 0 0 1 1 1 0] ⋅ H T = [1 0 0]
57 WITS Lab, NSYSU.
Weight and Distance of Binary Vectors
dmin=3
60 WITS Lab, NSYSU.
Example of Error Correction and Detection
Capability
u v
d min (u , v ) = 7
⎢ d min − 1 ⎥
t max =⎢ ⎥ : Error Correcting Strength
⎣ 2 ⎦
1 2 K
1 2 k 1 2 k 1 2 k
k bits
+ 1 + 2 + n-1 + n
Output
u v
r0 r1 r2
g (1)
0 = 1, g (1)
1 = 0, g (1)
2 = 1, and g (1)
3 = 1.
u v
r0 r1 r2 r3
g 0( 2 ) = 1, g1( 2 ) = 1, g 2( 2 ) = 1, g 3( 2 ) = 0, and g 4( 2 ) = 1.
Generator Sequence: g(2)=(1 1 1 0 1)
64 WITS Lab, NSYSU.
Convolutional Codes
An Example – (rate=1/2 with K=2)
G1(x)=1+x2 0(00)
G2(x)=1+x1+x2
x1 x2
00
Present Next Output 0(11) 1(11)
0 00 00 00 0(01)
01 10
1 00 10 11
1(00)
0 01 00 11
1 01 10 00 0(10) 1(10)
11
0 10 01 01
1 10 11 10
0 11 01 10 1(01)
1 11 11 01 State Diagram
65 WITS Lab, NSYSU.
Trellis Diagram Representation
0(00) 0(00) 0(00) 0(00) 0(00)
00 00 00 00 0(00) 00 0(00) 00 00 00
1 (1 1
1 (1 1
1 (1 1
1 (1 1
1 (1 1
)
)
)
11
11
11
11
11
0(
0(
0(
0(
0(
01 01 01 01 01
1 (0
1 (0
1 (0
0)
0)
0)
)
)
)
)
1
1
1
1
0(0
0(0
0(0
0(0
0(0
10 10 10 10 10
1(
10
)
1(
1(
1(
)
)
0(10
0(10
0(10
0(10
10
10
10
)
)
11 1(01) 11 1(01) 11 1(01) 11
Trellis termination: K tail bits with value 0 are usually added to the end of the code.
66 WITS Lab, NSYSU.
Encoding Process
Input: 1 0 1 1 1 0 0
Output: 11 01 00 10 01 10 11
0(00) 0(00) 0(00) 0(00) 0(00)
00 00 00 00 0(00) 00 0(00) 00 00 00
1(11
1(11
1 (1 1
1 (1 1
1 (1 1
)
)
)
11
11
11
11
11
0(
0(
0(
0(
0(
01 1(0 01 01 01 01
1 (0
1 (0
0
0)
0)
)
)
1)
)
)
1
1
0(0
0 (0
0(0
0(0
0(0
10 10 10 10 10
1(
10
)
1(
1(
1(
)
)
0(10
0(10
0(10
0(10
10
10
10
)
)
11 1(01) 11 1(01) 11 1(01) 11
67 WITS Lab, NSYSU.
Viterbi Decoding Algorithm
Maximum Likelihood (ML) decoding rule
ML
received sequence r detected sequence d
min(d,r) !!
1 (1 1
1 (1 1
1 (1 1
1 (1 1
2
)
)
)
11
11
11
11
11
0(
0(
0(
0(
0(
01 1(0 01 01 01 01
1 (0
1 (0
0
0)
0)
)
1)
1)
1)
)
1
1
0 (0
0 (0
0 (0
0(0
0(0
10 10 10 10 10
1(
10
0
)
1(
1(
1(
)
)
0(10
0(10
0(10
0(10
10
10
10
)
)
11 1(01) 11 1(01) 11 1(01) 11
70 WITS Lab, NSYSU.
Viterbi Decoding Process
Output: 11 01 00 10 01 10 11
Receive: 11 11 00 10 01 11 11
0(00) 0(00) 0(00) 0(00) 0(00)
00 00 00 00 0(00) 00 0(00) 00 00 00
1 (1 1
1 (1 1
1 (1 1
1 (1 1
1 (1 1
2 4
)
)
)
11
11
11
11
11
0(
0(
0(
0(
0(
01 1(0 01 01 01 01
1 (0
1 (0
1
0
0)
0)
)
1)
1)
1)
)
1
1
0 (0
0 (0
0 (0
0(0
0(0
10 10 10 10 10
1(
10
0 2
)
1(
1(
1(
)
)
0(10
0(10
0(10
0(10
10
10
10
)
)
11 1(01) 11 1(01) 11 1(01) 11
1 71 WITS Lab, NSYSU.
Viterbi Decoding Process
Output: 11 01 00 10 01 10 11
Receive: 11 11 00 10 01 11 11
0(00) 0(00) 0(00) 0(00) 0(00)
00 00 00 00 0(00) 00 0(00) 00 00 00
1 (1 1
1 (1 1
1 (1 1
1 (1 1
1 (1 1
2 4 3
)
)
)
11
11
11
11
11
0(
0(
0(
0(
0(
01 1(0 01 01 01 01
1 (0
1 (0
1 2
0
0)
0)
)
1)
1)
1)
)
1
1
0 (0
0 (0
0 (0
0(0
0(0
10 10 10 10 10
1(
1
10
0 2
)
1(
1(
1(
)
)
0(10
0(10
0(10
0(10
10
10
10
)
)
11 1(01) 11 1(01) 11 1(01) 11
1 2 72 WITS Lab, NSYSU.
Viterbi Decoding Process
Output: 11 01 00 10 01 10 11
Receive: 11 11 00 10 01 11 11
0(00) 0(00) 0(00) 0(00) 0(00)
00 00 00 00 0(00) 00 0(00) 00 00 00
1 (1 1
1 (1 1
1 (1 1
1 (1 1
1 (1 1
2 4 3 3
)
)
)
11
11
11
11
11
0(
0(
0(
0(
0(
01 1(0 01 01 01 01
1 (0
1 (0
1 2 2
0
0)
0)
)
1)
1)
1)
)
1
1
0 (0
0 (0
0 (0
0(0
0(0
10 10 10 10 10
1(
1 3
10
0 2
)
1(
1(
1(
)
)
0(10
0(10
0(10
0(10
10
10
10
)
)
11 1(01) 11 1(01) 11 1(01) 11
1 2 73 1 WITS Lab, NSYSU.
Viterbi Decoding Process
Output: 11 01 00 10 01 10 11
Receive: 11 11 00 10 01 11 11
0(00) 0(00) 0(00) 0(00) 0(00)
00 00 00 00 0(00) 00 0(00) 00 00 00
1 (1 1
1 (1 1
1 (1 1
1 (1 1
1 (1 1
2 4 3 3 3
)
)
)
11
11
11
11
11
0(
0(
0(
0(
0(
01 1(0 01 01 01 01
1 (0
1 (0
1 2 2 3
0
0)
0)
)
1)
1)
1)
)
1
1
0 (0
0 (0
0 (0
0(0
0(0
10 10 10 10 10
1(
1 3 3
10
0 2
)
1(
1(
1(
)
)
0(10
0(10
0(10
0(10
10
10
10
)
)
11 1(01) 11 1(01) 11 1(01) 11
1 2 74 1 1 Lab, NSYSU.
WITS
Viterbi Decoding Process
Output: 11 01 00 10 01 10 11
Receive: 11 11 00 10 01 11 11
0(00) 0(00) 0(00) 0(00) 0(00)
00 00 00 00 0(00) 00 0(00) 00 00 00
1 (1 1
1 (1 1
1 (1 1
1 (1 1
1 (1 1
2 4 3 3 3 3
)
)
)
11
11
11
11
11
0(
0(
0(
0(
0(
01 1(0 01 01 01 01
1 (0
1 (0
1 2 2 3 2
0
0)
0)
)
1)
1)
1)
)
1
1
0 (0
0 (0
0 (0
0(0
0(0
10 10 10 10 10
1(
1 3 3
10
0 2
)
1(
1(
1(
)
)
0(10
0(10
0(10
0(10
10
10
10
)
)
11 1(01) 11 1(01) 11 1(01) 11
1 2 75 1 1 Lab, NSYSU.
WITS
Viterbi Decoding Process
Output: 11 01 00 10 01 10 11
Receive: 11 11 00 10 01 11 11
0(00) 0(00) 0(00) 0(00) 0(00)
00 00 00 00 0(00) 00 0(00) 00 00 00
1 (1 1
1 (1 1
1 (1 1
1 (1 1
1 (1 1
2 4 3 3 3 3 2
)
)
)
11
11
11
11
11
0(
0(
0(
0(
0(
01 1(0 01 01 01 01
1 (0
1 (0
1 2 2 3 2
0
0)
0)
)
1)
1)
1)
)
1
1
0 (0
0 (0
0 (0
0(0
0(0
10 10 10 10 10
1(
1 3 3
10
0 2
)
1(
1(
1(
)
)
0(10
0(10
0(10
0(10
10
10
10
)
)
11 1(01) 11 1(01) 11 1(01) 11
1 2 76 1 1 Lab, NSYSU.
WITS
Viterbi Decoding Process
Decision:11 01 00 10 01 10 11
Receive: 11 11 00 10 01 11 11
0(00) 0(00) 0(00) 0(00) 0(00)
00 00 00 00 0(00) 00 0(00) 00 00 00
1 (1 1
1 (1 1
1 (1 1
1 (1 1
1 (1 1
2 4 3 3 3 3 2
)
)
)
11
11
11
11
11
0(
0(
0(
0(
0(
01 1(0 01 01 01 01
1 (0
1 (0
1 2 2 3 2
0
0)
0)
)
1)
1)
1)
)
1
1
0 (0
0 (0
0 (0
0(0
0(0
10 10 10 10 10
1(
1 3 3
10
0 2
)
1(
1(
1(
)
)
0(10
0(10
0(10
0(10
10
10
10
)
)
11 1(01) 11 1(01) 11 1(01) 11
1 2 77 1 1 Lab, NSYSU.
WITS
Channel Coding in GSM
Y(t)
X(t)
Interleaver
Y’(t)
X'(t)
When the switch is placed on the low position, the tail bits are feedback
and the trellis will be terminated.
81 WITS Lab, NSYSU.
Turbo Codes Encoding Example
A systematic convolutional encoder with memory 2
The dotted line is for termination code
Test sequence: 1011
X0
X1
1101 D D
X0=1
X1=1
1101 0 0
00
11
01
10
11
X0=0
X1=1
110 1 0
00
11
01
10 01
11
X0=1
X1=0
11 1 1
00
11
01
10 01
10
11
X0=1
X1=0
1 1 1
00
11
01
10 01
10 10
11
X0=0
X1=1
1 1
00
11
01
01
10 01
10 10
11
X0=1
X1=1
0 1
00 11
11
01
01
10 01
10 10
11
X0=0
X1=0
0 0
00
00 11
11
01
01
10 01
10 10
11
X0
X1
1101
D D
Interleaver
(X0)
X2
1011 D D
Output sequence: X0, X1, X2, X0, X1, X2, X0, X1, X2,...
1 0 1011 1101
1 1
00 00
00 11
11
01
10 00 10
10
11
gCRC16(D) = D 16 + D 12 + D 5 + 1;
gCRC12(D) = D 12 + D 11 + D 3 + D 2 + D + 1;
gCRC8(D) = D 8 + D 7 + D 4 + D 3 + D + 1.
1/3, 1/2
CPCH, DCH, DSCH,
Turbo coding 1/3
FACH
No coding
Input
D D D D D D D D
Output 0
G0 = 561 (octal)
Output 1
G1 = 753 (octal)
(a) Rate 1/2 convolutional coder
Input
D D D D D D D D
Output 0
G0 = 557 (octal)
Output 1
G1 = 663 (octal)
Output 2
G2 = 711 (octal)
(b) Rate 1/3 convolutional coder
Input Output
Turbo code
internal interleaver
2nd constituent encoder
Output z’k
D D D
x’k
x’k
TX
Source Channel Frequency Multiple
Format Encryption Interleaving Multiplexing Modulation RF
Encoding Encoding Spreading Access
PA
si (t)
Digital
Input C
mi H
A
Bit Digital
Synchronization N
Stream Waveform N
Digital E
Output L
m̂ i
sˆi (t)
RX
Source Channel Frequency Multiple
Format Decryption Deinterleaving Demultiplexing Demodulation RF
Decoding Decoding Despreading Access
IF
x Bit y
Interleaver
y
x j x n-bit
Shift registers
Write Clock Read Clock
TX
Source Channel Frequency Multiple
Format Encryption Interleaving Multiplexing Modulation RF
Encoding Encoding Spreading Access
PA
si (t)
Digital
Input C
mi H
A
Bit Digital
Synchronization N
Stream Waveform N
Digital E
Output L
m̂ i
sˆi (t)
RX
Source Channel Frequency Multiple
Format Decryption Deinterleaving Demultiplexing Demodulation RF
Decoding Decoding Despreading Access
IF
1 0 1 1 0 0 0 1 1 0 1
+E
0
-E
1 0 1 1 0 0 0 1 1 0 1
+E
0
-E
1 0 1 1 0 0 0 1 1 0 1
+E
0
-E
1 0 1 1 0 0 0 1 1 0 1
+E
0
-E
Unipolar - RZ
“One” is represented by a half-bit width pulse.
“Zero” is represented by a no pulse condition.
1 0 1 1 0 0 0 1 1 0 1
+E
0
-E
Polar - RZ
“One” and “Zero” are represented by opposite
level polar pulses that are one half-bit in width.
1 0 1 1 0 0 0 1 1 0 1
+E
0
-E
1 0 1 1 0 0 0 1 1 0 1
+E
0
-E
1 0 1 1 0 0 0 1 1 0 1
+E
0
-E
1 0 1 1 0 0 0 1 1 0 1
+E
0
-E
Dicode Non-Return-to-Zero
A “One” to “Zero” or “Zero” to “One” changes polarity.
Otherwise, a “Zero” is sent.
1 0 1 1 0 0 0 1 1 0 1
+E
0
-E
Dicode Return-to-Zero
A “One” to “Zero” or “Zero” to “One” transition produces
a half duration polarity change.
Otherwise, a “Zero” is sent.
1 0 1 1 0 0 0 1 1 0 1
+E
0
-E
Dicode Non-Return-to-Zero
A “One” is represented by a transition at the midpoint of
the bit interval.
A “Zero” is represented by a no transition unless it is
followed by another zero. In this case, a transition is
placed at the end of bit period of the first zero.
117 WITS Lab, NSYSU.
PCM Waveform : 4B3T
O --
Gray Coding.
PBPSK ( f ) = ⎢⎜ ⎟ + ⎜ ⎟ ⎥
2 ⎢⎝⎜ π ( f − f c ) Tb ⎠⎟ ⎝⎜ π ( − f − f c ) Tb ⎠⎟ ⎥
⎣ ⎦
129 WITS Lab, NSYSU.
Power Spectral Density (PSD) of a BPSK
Signal.
d k = mk ⊕ d k −1
1
W0 =
2T
Excess Bandwidth :W − W0
W − W0
Roll - Off Factor : r =
W0
152 WITS Lab, NSYSU.
Raised Cosine Filter Characteristics
Equalization is Combine
NOT necessary Coherently
MRC: Gi=Aie-jθi
Coherent Combining
G1 G2 GL
Channel Estimation
Best Performance
Receiver
L 2
r 2 ∑G ⋅r
l =1
l l
SNR: SNRL = = L
2 ⋅σ n
2 L
2 ⋅ ∑ Gl ⋅ σ n2,l
2
l =1
2 2
L L ⎛ rl ⎞
Since ∑G ⋅r l l = ∑ Glσ n ,l ⎜
⎜σ ⎟⎟
l =1 l =1 ⎝ n ,l ⎠
160 WITS Lab, NSYSU.
Maximum Ratio Combining (MRC)
2 2
L L L
rl
Chebychev's Inequality : ∑ Gl ⋅ rl ≤ ∑ Glσ n ,l ⋅ ∑
2
l =1 l =1 l =1 σ n ,l
2
L L
rl
∑ ⋅∑
2
Gσ
1
l n ,l
σ n ,l 1 rl
L
2
L
= ∑ 2 = ∑ SNRl
l =1 l =1
SNRL ≤
2 L
2 l =1 σ n ,l l =1
∑ l n ,l
2
G σ 2
l =1
rl*
With equality hold : Glσ n ,l = k
σ n ,l
⇒ Output SNR = Sum of SNRs from all branches @ Gl ∝ rl*
161 WITS Lab, NSYSU.
Example of RAKE Receiver Structure