Efficiency Optimization of LLC Resonant Converters

Operating in Wide Input- and/or Output-Voltage

Range by On-the-Fly Topology-Morphing Control
Milan M. Jovanović and Brian T. Irving
Power Electronics Laboratory
Delta Products Corporation
5101 Davis Drive, Research Triangle Park, NC, USA

Abstract— This paper presents a control method for efficiency converters. Namely, resonant converters most commonly regulate
improvement of the LLC resonant converter operating with a the output voltage by changing the switching frequency, i.e., by
wide input-voltage and/or output-voltage range by means of moving the operating point away from the resonant frequency as
topology morphing, i.e., changing of power converter’s topology the input voltage increases and/or output voltage decreases. As a
to that which is the most optimal for given input-voltage and/or result, they suffer from progressively increased losses as the
output-voltage conditions. The proposed on-the-fly topology- input- and/or output-voltage range is widened. This is the major
morphing control maintains a tight regulation of the output reason that resonant dc/dc converters, including the most efficient
during the topology transitions, i.e., topology transitions are made series-resonant LLC converter topology, are not able to maintain
without inducing noticeable output-voltage transients. The high efficiency across the entire range when input voltage or
performance of the proposed topology morphing method is output-voltage range is wide.
verified experimentally on an 800-W LLC dc/dc converter
The overall efficiency of converters operating in wide input-
prototype designed for a 100-V to 400-V input-voltage range.
voltage and/or output-voltage range can be improved by multi-
stage conversion [9]-[12]. Typically in this approach, the
I. INTRODUCTION regulation task and isolation task are performed in two separate
stages, i.e., the first stage is used for regulation, whereas the
In many applications power conversion circuits are required to
second stage for isolation. Because the isolation stage is
operate with a wide input-voltage and/or output-voltage range.
unregulated [9], [11], [12], or semi-regulated [10], i.e., regulated
For example, a majority of single-phase ac/dc power supplies
in a very narrow range, its efficiency can be maximized. While
used in today’s computer and telecom power systems must
this approach has been demonstrated to improve efficiency
operate in the universal ac-line range from 90 to 264 VRMS and
compared to a single-stage converter, its major drawback is
provide constant- or variable-voltage regulated output(s).
increased number of components which increases the circuit’s
Typically, telecom ac/dc power supplies need to provide a
complexity and cost.
regulated output between 42 V to 58 V, whereas power supplies
Another approach to deal with very wide input-voltage and/or
for desktop, networking, and server applications need to deliver a
output-voltage range is to employ topology morphing, i.e.,
constant-voltage with single or multiple output(s). However, to
topology change. By changing the topology, the gain of the
further improve the energy efficiency, single-output server power
converter is changed which narrows the effective range that the
supplies with two-level selectable output voltage have been
converter needs to be optimized for, thus, improving efficiency.
recently introduced. Specifically, this new generation of server
Several topology-morphing techniques are reported in [13]-[17].
power supplies with dynamically adjustable output voltage
Specifically, in [13], a 3-level half-bridge (HB) LLC converter is
delivers a 12-V output at full and mid-range loads, whereas at
modulated as a 2-level converter when the input voltage is in the
light loads the output voltage is reduced to 6 V to improve the
upper range, whereas for lower-range input voltages it is
light-load efficiency.
modulated as a 3-level converter. In [14], the conventional 2-level
Ac/dc battery chargers are another major class of power
full-bridge (FB) LLC topology is used in the low-input range,
converters that operate with a wide input- and output-voltage
whereas it is changed to the half-bridge (HB) topology when
range. For example, the typical output-voltage range of today’s
operating in the upper-voltage range. The idea in [14] is further
plug-in and battery electric vehicle (EV) on-board chargers is
expanded in [15]-[17] by employing two transformers. The major
200-450 V. At the same time, this is also the input-voltage range
deficiency of the on-the-fly topology-morphing approaches
of on-board dc/dc converters that condition power between the
described in [13] and [14] is that the topology transitions are made
high- and low-voltage batteries.
abruptly so that the output exhibits severe overshoots and
It is well understood that there is a strong trade-off between the
undershoots during the transitions. In the approaches in [15]-[17]
input-voltage and/or output-voltage range and the conversion
topology transitions are made by briefly stopping and then soft-
efficiency [1]-[8]. Power converters operating in a wide input-
restarting the circuit, i.e., by interrupting the power flow, which
voltage and/or output-voltage range exhibit a larger efficiency
also results in large output-voltage transients that may be reduced
fall-off than their narrow-range counterparts.
by significantly increasing the output filter capacitance. Both of
Generally, the detrimental effect of wide input and/or output
these transition methods are not desirable in applications that
voltage range on the conversion efficiency is more severe in
require tight regulation of the output voltage at all times.
resonant converters than in pulse-width-modulated (PWM)

978-1-4799-6735-3/15/$31.00 ©2015 IEEE 1420

 In this paper, a method of on-the-fly topology morphing of the
D1 IO
LLC resonant converter operating with a wide input-voltage S1 S4
and/or output-voltage range that does not exhibit significant CR LR
+
TR
voltage transients and does not require increased energy storage A
+ _
CF RL VO
_
components is described. In this approach, the LLC topology is V IN
VC
LM NP
NS

gradually changed between the full bridge (FB) and half bridge B
NS

(HB) so that a tight output control and uninterrupted power flow S2 S3 D2

are maintained during the transitions. The performance of the

proposed topology morphing method is verified on a 48-V, 800- N
S1 S2 S3 S4
W LLC dc/dc converter designed for a 100-V to 400-V input-
voltage range.
CONTROL CIRCUIT

II. DESIGN TRADE-OFFS OF LLC CONVERTER (a)

To facilitate the explanation of LLC converter’s design trade-
offs in applications with wide input and/or output voltage range,
Figs. 1(a), (b), and (c) shows the full-bridge (FB) LLC converter,
its fundamental-frequency equivalent circuit, and the dc voltage-
conversion ratio, respectively [18], [19]. The FB LLC converter in
Fig. 1(a) utilizes magnetizing inductance LM as a part of the (b)
resonant-tank circuit that also includes LR-CR series-resonant nVO
M=
branch. It should be noted that the LLC converter can also be VIN
implemented by employing a discrete inductor in parallel to the 4
LM
ZVS LR C R
primary winding instead of using the magnetizing inductance of 3.5 Q= =6
n 2 RL LR
Q=0.1
the transformer.

CIRCULATING CURRENT
3
Generally, the LLC converters employ variable switching- CIRCULATING CURRENT INCREASES

frequency control to regulate the output against input-voltage and 2.5

SWITCHING LOSS INCREASES
load-current changes. This frequency control is implemented with 2
approximately 50% duty cycle of all switches and a small dead 0.2
1.5 MOST EFFICIENT
time between the commutations of the complementary same-leg OPERATION
0.3
switches to achieve ZVS. A wider input-voltage and/or load- 1
0.5
current range requires a wider switching-frequency range. 0.5 1
MINIMUM GAIN
Generally, a wide switching frequency range is not desirable 2 FOR NO OR LIGHT
because it has a detrimental effect on the performance of the 0
0 0.5 1 1.5 2
LOAD

converter. For a given input-voltage and load-current range, the

f fS
frequency range is dependent on the value of transformer’s
(c)
magnetizing inductance LM. In series-resonant LLC converters,
magnetizing inductance LM is essential in enabling the converter Figure 1. Full-bridge series-resonant LLC converter: (a) circuit
operation at very light and no load by providing a resonant- diagram; (b) fundamental-frequency equivalent circuit; (c) dc
voltage-conversion ratio derived assuming fundamental-frequency
current path when the load is small or zero. By decreasing approximation [18].
magnetizing inductance LM, i.e., by increasing the magnetizing
current relative to the primary-referred load current flowing on the frequency is caused by a reduction of magnetizing-
through resistor n2Rac, the frequency range is reduced since with a inductance reactance XLM with decreasing frequency which causes
reduced magnetizing inductance the converter starts behaving a larger portion of the resonant current to flow through the
more as a parallel resonant converter. However, since the magnetizing inductance, as can be seen in Fig. 1(c). The
magnetizing current does not flow through the load, as it can be circulating current also increases as the Q-factor for a given
seen from Fig. 1(b), it represents a circulating current which operating conditions, i.e., given input voltage VIN, output voltage
unnecessarily generates conduction loss in the primary switches VO, and load current IO, is selected lower. Namely, as can be seen
and the transformer. Therefore, because of a strong tradeoff from Fig. 1(c), a lower Q-factor-characteristic exhibits a higher
between the frequency range and primary-side circulating current gain ⁄ so that required turns ratio ⁄ for the
loss, a proper selection of the magnetizing inductance value is of characteristic with lower Q is also increased. Since according to
the utmost importance for optimizing the efficiency of the LLC Fig. 1(b), the current through the primary-referred load is given
converter. Typically, for given values of series resonant circuit by / / , the increased value of
components LR and CR that determine the series resonant turns ratio n decreases current IRac making the magnetizing
frequency 1/ in Fig. 1(c), the optimal performance is circulating current a larger portion of the resonant current. As
obtained by selecting the magnetizing inductance so that the ratio illustrated in Fig. 1(c), the optimal balance between the
⁄ is maximized. circulating-current and switching loss occurs around the series
As illustrated in the dc-conversion ratio characteristics in Fig. resonant frequency fS, where LLC converters exhibit the
1(c), in the ZVS operating range that occurs on the negative maximum efficiency. In fact, the LLC converter exhibits an
slopes of the shown constant-Q characteristics (i.e., to the right of unmatched efficiency when implemented as a dc/dc transformer,
their peaks), the switching loss increases as the frequency i.e., when it operates without a regulation loop at a constant
increases, whereas the circulating current increases as the frequency close to the series-resonant frequency of the resonant
frequency decreases. This dependence of the circulating current tank [12].

1421
 To further explain tradeoffs in designing the LLC converter for 3, the converter should be designed with a maximum
a wide input- and/or output-voltage range, Fig. 2 shows the dc- full-load Q-factor, which according to Fig. 3 is 0.12. As it
voltage conversion of the LLC converter along with minimum and can also be seen from Fig. 3, for 0.12, the minimum
maximum gain lines that correspond to a 1.5:1 range. Minimum switching frequency at MMAX is approximately 0.4 of the resonant
gain ⁄ occurs at the minimum output frequency fS. Because of a lower minimum frequency and a
and maximum input voltage, whereas maximum gain significantly lower Q-factor, operation at the maximum output
⁄ occurs at the maximum output voltage and and minimum input voltage i.e., at MMAX, of the wide-range (3:1)
minimum input voltage. As shown in Fig. 2, to maximize converter has significantly lower efficiency compared to that of its
efficiency, minimum-gain line 1 is selected so that at the narrow-range (1.5:1) counterpart due to increased circulating-
minimum output- and maximum input-voltage, the converter current conduction losses. The efficiency performance of both the
operates at series-resonant frequency fS. With this selection of wide- and narrow-range circuit at the minimum output and
MMIN, the primary switches operate with ZVS while the maximum input voltage, i.e., at MMIN, are similar because both
secondary-side rectifiers (or synchronous rectifiers) operate with circuits operate close to the resonant frequency.
zero-current switching (ZCS). Minimum gain MMIN could also be The efficiency of the LLC converter operating in a very wide
selected to be less than unity, in which case the secondary-side input-voltage and/or output voltage range can be improved by
rectifiers exhibit “hard” switching. In fact, for many designers, recognizing that for the same values of the turns-ratio of the
based on their personal experience, selecting MMIN slightly below transformer ⁄ and resonant-tank components LR, CR,
unity, i.e., operating above the resonant frequency, is the preferred and LM, the dc voltage gain of the FB LLC topology is twice as
choice since this operation is slightly more efficient and does not large as that of the half-bridge (HB) LLC topology, as illustrated
suffer from a periodic low frequency ripple/noise likely caused by in Fig. 4. As a result, the FB LLC topology is the optimal choice
the resonance between the resonant inductor and reflected for a range of operating conditions where the dc voltage gain is
junction capacitance of the rectifiers seen in the operation below high, i.e., where the input voltage is in the low range and/or
the resonant frequency. However, it should be noted that the output voltage is in the high range, whereas the HB LLC topology
lowest value for MMIN is limited to ⁄ ratio which is more suitable for a range of the input and/or output voltage
represents the minimum gain of the LLC converter at no (light) exhibiting a low dc voltage gain.
load. For the characteristics shown in Fig. 2 which are given for Specifically, for the 3:1-range example shown in Fig. 4, the
⁄ 6, this ratio is 0.86. With the selection of 1, the efficiency of the LLC converter can be improved by operating the
maximum gain of the converter operating in the gain range 1.5:1 converter as the FB in the high-gain range, i.e., for gain M
is 1.5. To minimize the circulating-current loss at between 1.5 and 1, and operating it as the HB for the low-gain
1.5, the converter at full load should be designed to range, i.e., for M between 1 and 0.5. Because of the power-stage
operate with a maximum Q-factor which, according to Fig. 2, is gain change due to the topology change at 1, the converter
0.25. With such a selection of Q-factor, the minimum can be designed for a gain range that is only one half of the
frequency that occurs at full load and 1.5 is specified range. As a result of a very much reduced operation
approximately one-half of resonant frequency fS. Because of the range, the efficiency fall-off of the LLC converter with topology
operation significantly below the resonant frequency, the changing (morphing) is much less than that of its fixed-topology
operation at the maximum output and minimum input voltage i.e., counterpart. It should be noted that the topology transition does
at MMAX, is less efficient compared to that at the minimum output not need to occur exactly at 1. Depending on a specific
and maximum input voltage, i.e., at MMIN, due to increased design, it may be more optimal to make a transition slightly above
circulating-current-caused conduction losses. Nevertheless, for the or below the unity gain. In fact, the best approach to determine the
1.5:1 range the efficiency fall-off is not very dramatic so that the optimal topology transition gain is to measure the efficiency of
converter still exhibits satisfactory performance. the converter in both the FB and HB mode and take the gain
Figure 3 shows the MMIN and MMAX gain lines when the range where the efficiencies of the FB and HB circuit are equal as the
is extended to 3:1. Since the choice of minimum gain MMIN is transition gain.
limited to values around the unity gain, the maximum gain is III. PROPOSED ON-THE-FLY MORPHING CONTROL
3 if the converter is designed with 1, as shown
in Fig. 3. To minimize circulating-current losses at maximum gain Since the HB LLC topology can be obtained from the FB LLC
nVO
M= nVO
VIN M=
VIN
4
4
LM
Q=0.1 =6 LR C R LM
3.5 LR 3.5
Q=0.1 Q= =6
n 2 RL LR
3
Q=0.12
LR C R 3
Q= 2
2.5 n RL
2.5
2 0.2
0.25 2 0.2
0.25
1.5
1.5
0.3
1 0.3
0.5 1
0.5
0.5 1 1
0.5
2 2
0 0
0 0.5 1 1.5 2 0 0.5 1 1.5 2
f fS f fS
Figure 2. Full-bridge LLC converter operating in 1.5:1 gain range. Figure 3. Full-bridge LLC converter operating in 3:1 gain range.

1422
 Figure 4. LLC converter operating in 3:1 range with topology morphing. Transition from FB to HB and vice versa occurs at MTRANS=1.

topology by not switching one leg of the FB LLC converter, i.e., permanently off, the converter continues to operate as the HB
by permanently keeping one switch in the non-switching leg on converter with variable-frequency control of switches S1 and S2.
and the other switch off, the performance optimization of the LLC During the transition from the HB to the FB topology, switches S3
converter operating in a very wide input-voltage and/or output and S4 are modulated in the opposite direction, i.e., the duty ratio
voltage range can be obtained with a proper control. of switch S3 is decreased from 100% (continuously on) to 50%,
In its simplest form, the on-the-fly controller which provides whereas at the same time the duty ratio of S4 is increased from 0%
transitions between the FB and HB LLC topology and vice versa (continuously off) in a complementary fashion. With this
can be implemented so that the modulation of one leg of the topology-transition control, tight output regulation is maintained
bridge is abruptly stopped or restarted [13], [14]. Generally, this at all times by frequency regulation of switches S1 and S2.
approach is not acceptable in applications that require a tight In the morphing control in Fig. 5, the turn-on instants of
regulation of the output at all times, i.e., in applications that switches S1 and S3 are synchronized during the topology transition
cannot tolerate large output voltage transients. Namely, because in periods. However, it should be noted that other synchronization
the FB LLC the steady-state average (dc) voltage of resonant methods are possible such as, for example, the turn-on-instant
capacitor 0, whereas in the HB LLC circuit synchronization of switches S2 and S4.
/2, an abrupt topology change causes a large initial imbalance IV. DESIGN CONSIDERATIONS
of the transformer and resonant inductor volt-seconds, which
besides the potential to saturate these components, creates a Generally, the performance optimization of the LLC converter
significant imbalance between the input power and output power. with topology morphing follows a well-established LLC-
Since the control loop speed (bandwidth) is not fast enough to converter design procedure [2]-[7], [18]-[21]. Specifically, in the
correct for this abrupt transient power imbalance, the output LLC converter with topology morphing, the values of series-
voltage exhibits unacceptably large output-voltage transients resonant tank components LR and CR, as well as the value of
(under and overshoots). Generally, these transients can be reduced magnetizing inductance LM and turns ratio n of the transformer
by increasing energy storage in the output filter, i.e., by are selected so that the performance of the circuit is optimized in
significantly increasing the output capacitance of the LLC the respective narrow gain (input/output voltage) range that it
converter. However, this approach is not only undesirable because works either as the FB or HB converter.
of increased cost, but in high-power density applications it is not The only major design difference between the conventional and
practical because it requires increased volume. topology-morphing implementation is the latter one cannot be
To minimize and even eliminate output-voltage transients, as implemented with magnetically-coupled gate drive of the primary
well as possible magnetic component saturations, it is necessary switches in the topology-transition leg S3-S4 because switch S3
to implement a gradual topology transition. Generally, the must permanently stay on while the converter operates as the HB
topology transition time must be long enough to allow the control LLC. As a result, the topology-transition leg must employ a high-
loop to maintain a tight regulation of the output during the TURN-ON INSTANTS SYNCHRONIZED

transition. S1
~
~

The on-the-fly transition control from the FB topology to the TS t

HB topology proposed in this paper is illustrated in Fig. 5. During S2 T S /2
~
~

the FB operation, all switches are operated with variable S3 t

switching frequency and 50% duty ratio. During the transition,
~

switches S1 and S2 continue to operate with variable switching S4 T ON TOFF t

~
~

frequency and 50% duty ratio to maintain the output at the desired FULL-BRIDGE HALF-BRIDGE
t
TOPOLOGY-TRANSITION PERIOD
level, whereas switches S3 and S4 are PWM modulated and TOPOLOGY TOPOLOGY

frequency modulated so that the duty ratio of S3 is monotonically

Figure 5. Proposed topology transition control from FB to HB topology. The
increased from 50% to 100% and the duty ratio of S4 is reduced HB-to-FB transition control is implemented by reverse modulation. Note that
from 50% to 0% in a complementary fashion. Since at the end of during transition period switches S3 and S4 operate with asymmetrical duty
the transition period switch S3 is permanently on and switch S4 cycles and that turn-on instants of switches S1 and S3 are kept synchronized.

1423
side driver, as shown in the experimental circuit in Fig. 8. While 6, transient magnetizing-current dc-bias changes from
the other primary leg does not require a high-side drive because it positive to negative as DS3 increases and reaches a negative
is continuously modulated, it is a good practice to also use a high- maximum of approximately -4.5 A when DS3 is approximately
side drive in this leg to maintain primary-side symmetry. 0.92. During the topology transition period, peak magnetizing
A detailed analysis of the operation of the circuit during current stays within the steady-state range. However, the
topology transitions reveals that switches S1, S2, and S3 maintain value of valley magnetizing current exceeds the
ZVS operation at all times. However, transition-leg switch S4
maximum steady-state value of -8 A for duty cycles between 0.85
loses ZVS for duty cycles greater than 0.6 because the current
and 0.95. The magnetizing current reaches its absolute minimum
through switch S3 becomes negative, i.e., flows through the body
diode of switch S3, prior to turn-on of switch S4. As a result, to value of around -13.5 A for duty cycle DS3=0.92. This value is
prevent any noise-related problems that may arise during about 70% larger than that in the steady state so this transient
topology-transition periods because of reverse-recovery current of increase of the transformer maximum current must be taken into
the body diode of switch S3, it is advisable to employ magnetic account when designing the transformer.
beads in the drain and gate of switch S3 to reduce the reverse- Finally, the most important design step is to properly determine
recovery current. Although not necessary, it is also a good topology-transition time TTRAN. To maintain acceptably small
output-voltage transients (overshoots and undershoots), the rate of
practice to employ beads in all primary switches to maintain
the duty-ratio change of switches S3 and S4 during the topology
circuit symmetry or, at least in both transition-leg switches as
transition must be limited to that which allows the control loop to
illustrated in Fig. 8.
maintain full regulation. The optimal choice of transition time
Since operation with asymmetrical duty cycle introduces
TTRAN and output-loop bandwidth fBW was found to be
magnetizing-current dc-bias during transition periods, as
50 100. For example, for the control-loop
shown in Fig. 7, it is necessary to examine the effect of this
bandwidth of 1-2 kHz, the transition time can be as fast as 50-100
transient dc-bias on the operation of the transformer. Because an
ms. It should be noted that during the topology-transition periods,
analytical expression for transient magnetizing current dc bias is
small-signal control-to-output transfer function GVC changes with
difficult to derive, simulations of the experimental circuit in Fig.8
duty cycle DS3, as illustrated in Fig. 7 which shows the full-load
were used to quantify and evaluate the dc-bias effect. The first
Bode plots of GVC of the experimental converter in Fig. 9 for
step in this simulation-based analysis was to establish a reference
different duty cycles DS3 that are obtained by SIMPLIS
level for this evaluation by finding the maximum steady-state
simulations. As can be seen in Fig. 7, both the low-frequency (f<1
peak value of the magnetizing current when the circuit operates
kHz) magnitude and transfer function order change during
either as the HB or FB converter. By using SIMPLIS simulation
topology transitions. This behavior of GVC is in agreement with
software, maximum steady-state peak value of magnetizing
the results of small-signal analysis presented in [22]. Namely,
current was calculated by sweeping the respective input- since the dc-gain of GVC of the LLC converter is proportional to
voltage range, i.e., the 100- 240-V range for the FB topology and the slope of the dc-gain characteristic, the GVC dc-gain increases
the 240-400-V range for the HB topology. As expected, it was as the circuit makes a transition from the FB to the HB topology
found that 8 occurs at minimum input voltage of because, as illustrated in Fig. 4, at transition gain MTRAN, the FB
100 V, i.e., when the circuit operates as FB, because at this topology operates near the resonant frequency (operating point B)
operating point the switching frequency is lowest, as can be seen where the slope of the dc characteristic is small, whereas the HB
from Fig. 9. Because of symmetrical operation in steady state, the
minimum steady-state valley value of magnetizing current is 40 DS3 = 1.0
8 . Next, the average magnetizing 0.9
30 HB
current , peak magnetizing current , and valley 0.8
20 0.7
magnetizing current during topology-transition period
|GVC|
are calculated as functions of duty cycle DS3. Figure 9 shows the 10
0.5 0.6
FB
calculated , , and for full-load transition [dB]
0
at transition voltage 240 . Also superimposed on the
-10
plot in Fig. 9 are the lines for steady-state maximum peak
magnetizing current 8 and minimum valley -20
10 100 1000 10000
magnetizing current 8 . As can be seen from Fig.
0
FB 0.5
10 -20 0.6
-40 0.7
5
GVC -60
STEADY-STATE
-80
0
[A] RANGE [deg] -100 0.8
-5 -120
-140 HB 0.9
-10
-160 DS3 = 1.0
-15 -180
0.5 0.6 0.7 0.8 0.9 1 10 100 1000 10000
Duty Cycle DS3 Frequency [Hz]
Figure 6. Magnetizing-current transient analysis for experimental circuit in Figure 7. Bode plots of small signal control-to-output transfer function
Fig. 9 obtained by SIMPLIS simulation. Shown are peak magnetizing GVC of experimental converter of Fig. 9 as function of duty cycle DS3
current , minimum (valley) magnetizing current , and during topology transitions at full-load. Bode plots were obtained by
average magnetizing current as functions of transition duty cycle DS3. SIMPLIS simulation software.

1424
 STW43N60FD
FairRite bead
2661000101 experimental converter for both FB and HB topology. Due to the
HS
Q1
HS
STW43N60FD
IO
practical switching-frequency limitation of approximately 300
Q4
CR LR TR DR1 DR4 kHz, the FB converter could not regulate the output for input
VIN Si8233
STW43N60FD
Si8233
+ _
2x47 nF
24 μH
+
voltages higher than 270 V. It should be noted that the efficiency
NS CF

LS LS
LM
180 μH
NP
3x330 nF
RL VO
_ could have been maximized by employing synchronous rectifiers
Q2 Q3 STW43N60FD n=3.8
DR3
instead of the diode rectifiers. However, since the main objective
DR2
of the prototype was to demonstrate and evaluate relative
DR1 - DR4 : 30CPQ150

Q1 Q2 Q3 Q4
efficiency improvements brought about by the proposed on-the-
fly topology morphing, the implementation of the secondary-side
DSP-BASED
CONTROLLER
is irrelevant with respect to general conclusions about topology
TMS320F28027 (Piccolo)
morphing performance.
Figure 8. Experimental prototype. It is interesting to note that the measured peak efficiency of the
HB topology of approximately 94.3% is 0.5% higher than the
measured peak efficiency of the FB topology of approximately
topology operates at a frequency well below the resonant 93.8% although both topologies operate with almost the same
frequency (operating point C) where the slope of dc-characteristic switching frequencies and resonant current magnitudes. This
is steeper. In addition, as the switching frequency moves away difference can be attributed to a lower loss of morphing-leg
from the resonant frequency during the topology transition from switches S3 and S4 when the circuit operates as the HB converter.
the FB to the HB topology, the GVC transfer function changes Namely, in the HB topology switch S4 is permanently off so it
from the first order to the second order [22]. As a result, if a non- does not exhibit any losses, whereas switch S3 is permanently on
adaptive output-voltage control is employed, the transition time and exhibits only conduction loss due to the resonant current flow
needs to be selected based on the worst-case, i.e., the minimum through the channel of the switch and, for high peak currents,
bandwidth. If necessary, an adaptive control that changes simultaneous current flow through its body diode. Since in the FB
compensator parameters as a function of transition duty cycle to topology switches S3 and S4 are continuously modulated, they
maintain optimum bandwidth during the topology transitions can exhibit both switching and conduction losses. In addition, since
be applied. This adaptive control can be easily and cost- both switches prior to their respective turn on instants carry
effectively implemented with today’s microcontrollers and/or resonant current through the body diode to achieve ZVS, their
DSPs. conduction loss is further increased compared to the
corresponding loss in the HB topology.
V. EXPERIMENTAL PERFORMANCE EVALUATION As can be seen in Fig. 9, to maximize the efficiency across the
The performance of the proposed on-the-fly topology morphing entire input-voltage range, the topology transition voltage is
control method is verified and evaluated on an 800-W LLC dc/dc selected at the intersection of the FB and HB efficiency curves, i.
converter designed for a 100-V to 400-V input-voltage range and e., at 240 V. The full-load efficiency in the entire range is
an output voltage of 48-V. The circuit diagram of the power stage determined by that at the minimum input voltage of 100 V, which
of the experimental prototype along with the values of its is approximately 90.5%. If the FB were able to operate in the
components are shown in Fig.8. For the selected components, the entire input-voltage range from 100-400 V, i.e., if the controller
series-resonant frequency of the circuit is 98 kHz. The control was were able to provide required frequency range, the full-load
implemented by TI DSP TMS320F28027 with the control efficiency at 400-V input would be very much below 90% as
bandwidth at full load and low line of 1 kHz. illustrated by the extrapolated efficiency line in Fig. 9.
Figure 9 shows the measured full-load efficiencies of the Figure 10 shows the key waveforms during the topology

94 kHz
MORPHING POINT
87 kHz
94 kHz 113 kHz
113 kHz

66 kHz
EXTRAPOLATED

FULL BRIDGE 71 kHz

HALF BRIDGE
198 kHz
54 kHz
57 kHz

48 kHz 282 kHz

EXTRAPOLATED
48 kHz
VO = 48V
PO = 800 W LLC IMPLEMENTATION WITH
fS = 98 kHz DIODE RECTIFIERS

Figure 9. Measured full-load efficiency of experimental converter for both full bridge and half bridge topology. Dashed-dot line shows extrapolated efficiency.

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 VGS-S3
VGS-S3 [20 V/div]
[20 V/div]

iL TRANSITION TRANSITION
FB PERIOD HB PERIOD FB
[10 A/div]
500 ms 500 ms
iL FB TRANSITION
HB
TRANSITION
PERIOD PERIOD FB
[10 A/div] 80 ms 80 ms

ΔVO = 0.3% ΔVO = 0.3%

VO
ΔVO = 0.9% [0.7V/div]
VO ΔVO = -0.7%
[1 V/div] (w/48 V offset)
(w/ 48 V offset)
VDS-S3
VDS-S3 [200 V/div] [100 ms/div]
[200 V/div] [50 ms/div]
Figure 11. Measured switch S3 gate-to-source voltage VGS-S3, resonant
Figure 10. Measured switch S3 gate-to-source voltage VGS-S3, resonant
current iL, output voltage VO, and switch S3 drain-to-source voltage VDS-S3
current iL, output voltage VO, and switch S3 drain-to-source voltage VDS-S3
waveforms of experimental circuit for 500-ms topology transitions at
waveforms of experimental circuit for 80-ms topology transitions at
240 and 800 .
240 and 800 .
transition at full load. As can be seen during the 80 ms transition shown VGS-S3, iL, and VDS-S3 waveforms for transition duty cycles
periods, the output voltage transients are limited to below 0.9%. 0.55 and 0.75 do not exhibit any ringing or
Specifically, the maximum positive deviation from the steady- irregularities. In addition, the output voltage stays in regulation
state output voltage (overshoot) is 0.9%, whereas maximum without any noticeable transients.
negative deviation (undershoot) is -0.7%. During transitions, the Finally, Fig. 13 shows the key waveforms during the output
peak of resonant current iL exceeds its steady-state value by voltage transitions between 48-V and 24-V level. These
approximately 50%, which is still well within the design margins transitions, with a transition time of 300 ms, are performed at
of inductor LR. For a given control design, the overshoot and constant input voltage 200 V and constant load current
undershoot of the output voltage is smaller if the transition time is 16.6 A by changing (ramping up and down) the output
longer. As illustrated in Fig. 11, for the 500-ms transition time, reference voltage during the topology transition periods. Because
the maximum transient deviation of the output voltage is only of the constant-current load, the output power at 24 is one
0.3%. half of that at 48 , i.e., when the circuit operates as the FB
Figure 12 shows the zoomed in waveforms in Fig. 10 during the for 48 , it delivers 800 W, whereas it delivers only 400 W
transition from the FB to the HB topology. As can be seen, the when it operates as the HB for 24 . As can be seen from

VGS-S3
[20 V/div]
iL
[10 A/div]
VO
DS3 = 55% [0.7 V/div] DS3 = 75%
VDS-S3
[2 μs/div] [5 μs/div]
[200 V/div]

VGS-S3
[20 V/div]

iL TRANSITION
FB HB
[10 A/div] PERIOD
80 ms

VO
[0.7 V/div]
VDS-S3
[10 ms/div]
[200 V/div]

VGS-S3
[20 V/div]
iL
[10 A/div]
VO
DS3 = 50% FULL BRIDGE (FB) [0.7 V/div]
DS3 = 100% HALF BRIDGE (HB)

[2 μs/div]
VDS-S3 [5 μs/div]
[200 V/div]

Figure 12. Zoomed-in waveforms of Fig. 13 for FB-to-HB transition for duty cycle DS3=50, 55, 75, and 100%.

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 VGS-S3 [3] Y. Fang, D. Xu, Y. Zhang, F. Gao, and L. Zhu, “Design of high power
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