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    Aicd Lab Practical Examination 2020

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    SHAIK MUSTHAFA
    1) The document describes a high-rejection RF code domain receiver for simultaneous transmit and receive applications that achieves over 100dB of transmitter self-interference rejection. 2) It uses direct sequence spread spectrum techniques with RF correlators to separate the transmitted and received signals at the antenna interface. Code domain signal processing with filtering and cancellation is used across RF, analog, and digital domains. 3) Measurement results show the receiver achieves over 100dB of transmitter self-interference rejection while maintaining signal conversion gain from 0.25-1.25GHz with an area of 2.6mm2 consuming 90mW of power.

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    Aicd Lab Practical Examination 2020

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    SHAIK MUSTHAFA
    51 views5 pages
    1) The document describes a high-rejection RF code domain receiver for simultaneous transmit and receive applications that achieves over 100dB of transmitter self-interference rejection. 2) It uses direct sequence spread spectrum techniques with RF correlators to separate the transmitted and received signals at the antenna interface. Code domain signal processing with filtering and cancellation is used across RF, analog, and digital domains. 3) Measurement results show the receiver achieves over 100dB of transmitter self-interference rejection while maintaining signal conversion gain from 0.25-1.25GHz with an area of 2.6mm2 consuming 90mW of power.

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    AICD_Practical_Submission

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    1) The document describes a high-rejection RF code domain receiver for simultaneous transmit and receive applications that achieves over 100dB of transmitter self-interference rejection. 2) It uses direct sequence spread spectrum techniques with RF correlators to separate the transmitted and received signals at the antenna interface. Code domain signal processing with filtering and cancellation is used across RF, analog, and digital domains. 3) Measurement results show the receiver achieves over 100dB of transmitter self-interference rejection while maintaining signal conversion gain from 0.25-1.25GHz with an area of 2.6mm2 consuming 90mW of power.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    51 views5 pages

    Aicd Lab Practical Examination 2020

    Uploaded by

    SHAIK MUSTHAFA
    1) The document describes a high-rejection RF code domain receiver for simultaneous transmit and receive applications that achieves over 100dB of transmitter self-interference rejection. 2) It uses direct sequence spread spectrum techniques with RF correlators to separate the transmitted and received signals at the antenna interface. Code domain signal processing with filtering and cancellation is used across RF, analog, and digital domains. 3) Measurement results show the receiver achieves over 100dB of transmitter self-interference rejection while maintaining signal conversion gain from 0.25-1.25GHz with an area of 2.6mm2 consuming 90mW of power.

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    AICD LAB PRACTICAL EXAMINATION

    2020

    Submitted to
    ID :- 19266017 Dr.Ankush chunn Sir
    Name :- Shaik Musthafa
    MTECH 1st year
    Vlsi & Embedded Systems
    Article Title:- High – Rejection RF Code Domain Reciver for Simultaneous Transmit and Receive
    Applications

    Authors:- Ahmed Hamza, Cameron Hill, Hussam AlShammary, James Buckwalter

    Volume Page:- VOL. 55, NO. 7

    Month/Year:- July/2020

    Affiliation:- University of California at Santa Barbara, Santa Barbara, CA, USA.

    The Problem:- This Article addressing high means 100db Transmitter Self-interference (Tx
    SI) rejection should be achived by using RF Code Domain simultaneous Transmitter and
    Receiver Applications(STAR). because in the previous work they have achived 52db Tx SI
    rejection only achived To improve rejection effeciny they have used various techniques in
    collaboration of that all techniques the filtering of signal of simultaneous transmitter and
    receiver by Code domain Technique.
    In previously For STAR there are two ways FDD(frequency Division Duplex) and FD(full
    Duplex) FDD allocate the uplink and downlink frequency bands with gap between them and
    require selective filters to prevent sensitization. The SAW(surface acoustiv wave) filtering used
    For good rejectivity. This work done by Npath filter instead of SAW eventhough it suffers
    from limited Rejection.
    This work done by using FD this technique allows to use of RF spectrum by using BW for TX
    and RX and FD demands 100db TX SI rejection

    The AppRoach:- this simultaneous transmitter and receiver(STAR) can be achived by direct
    sequence spread spectrum (DSSS) techniques and RF correlators, transmit (TX) self-
    interference (SI) is separated from the receive (RX) signal at the antenna interface for STAR.
    In the RF code Domian RX ,support full-duplex (FD) operation as shown in Fig. 1, along with
    CMOS circulators , electrically balanced duplexers (EBDs) , and cancellation in the radio

    Fig1 RF code Domain signal processing for Tx Si rejection


    frequency (RF),
    Anloag, and digital domains. High TX SI rejection has been achieved from a combination of
    these techniques Code-division multiple access (CDMA) techniques are another way for
    implementing STAR transceivers By allocating orthogonal pseudo-noise (PN) codes to the TX
    and RX signals. But in this article they have used Full Duplex(FD) for STAR which is used
    allow the TX and RX to occupy the same channel bandwidth.

    RF Code Domain Rx is they implemented shown in fig1 Pn code length M and TX signal
    Combinely spreaded over bandwidth M.B.W and the TX signal is spreaded over B.W before
    Power Amplifier(PA) The code-domain RX operates by related to the wanted signal against a
    matching PN code (PNRX) while rejecting the TX signal out of the signal band due to its
    orthogonal PN code (PNTX).
    the input signal the TX PN code (PNTX) to de-spread the TX signal and filter the signal energy
    through a Code Notch Filter. After, the notch filter output is again multiplied by the TX PN code
    (PNTX) then will get RX signal. So the RX signal is de-spread through multiplication by the RX PN
    code (PNRX) and after that it passes to bandpass filter (BPF). The BPF also rejects the TX signal
    that is spread by the RX PN code (PNRX) out of the BPF BW at the end LNA .

    code-domain front ends shows good SI rejection using a specific small subset of Walsh
    codes. To reject TX SI, only a PN code is required. To this U users, an M > U length code
    should be selected. To increase M, either the spread-spectrum BW is increased or the signal
    BW is reduced. And Walsh codes provide excellent rejection, a practical system could not
    rely on using Walsh codes only due to difficulty in synchronization due to repetitive nature,
    limited processing gain, and ease of jamming with uncoded blockers Also, they require all
    transmitters and receivers to be synchronized for orthogonality (meaning that four codes
    should be synchronized, two at each transceiver). A practical system would need to have
    good rejection while using any family of PN codes to be able to serve multiple users. This
    can be achieved by the addition of the TX notch filter.

    The code Domain RX have of two filters are CNF and CPF. These filters are followed by
    an LNA with N-path feedback for amplification and frequency down-conversion. After that,
    the N-path feedback capacitors are sampled by harmonic recombination gm cells to generate
    I and Q BB outputs. The chip also have frequency dividers to generate the nonoverlapping
    clock pulses for the N-path filters and digital logic for PN code generation. The chip
    schematic is shown in Fig. 10, and this section describes the design of the RX different
    blocks

    Fig2:-schematic of code domain RX


    Result:- The code-domain RX is implemented by a 45-nm CMOS SOI process and the chip
    micrograph is shown in Fig. 3.

    Fig3 code domain RX chip


    The chip area of 2.6 mm2, while a standalone filters breakout occupies an area of 1.3 mm2.
    The chip is tested at 1 GHz and the dc power consumption is 90 mW of which 40 mW is
    consumed in the code-domain filters.

    The RX tuning from 0.25 to 1.25 GHz. The conversion gain and single-tone rejection are
    plotted in Fig. 4

    Fig4 gain vs rejection plot


    Different FD Receiver comparison:-

    Previous Work:-

    1. A. Hamza, H. Alshammary, C. Hill, and J. Buckwalter, “A 52-dB selfinterference rejection


    receiver using RF code-domain signal processing,” in Proc. IEEE Custom Integr. Circuits
    Conf. (CICC), Apr. 2019, pp. 1–4.
    2. C. Hill, A. Hamza, H. Alshammary, and J. F. Buckwalter, “A 1.5-dB insertion loss, 34-dBm
    P1dB power modulator with 46% fractional bandwidth in 45-nm CMOS SOI,” in IEEE MTT-
    S Int. Microw. Symp. Dig., Jun. 2019, pp. 243–246.
    3. C. Hill, C. S. Levy, H. Alshammary, A. Hamza, and J. F. Buckwalter, “RF watt-level low-
    insertion-loss high-bandwidth SOI CMOS switches,” IEEE Trans. Microw. Theory Techn.,
    vol. 66, no. 12, pp. 5724–5736, Dec. 2018

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