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Faculty of Engineering Department of Electrical Engineering Lahore Leads University

The document is an electronics exam for a course at Lahore Leads University covering transistors. It contains 5 questions worth a total of 50 marks. The questions cover topics like: 1) Why the base-emitter and collector-base junctions of a transistor are both reversed biased in the cutoff region. 2) Designing and analyzing a common-emitter BJT configuration and explaining the working conditions with diagrams. 3) Designing a voltage regulator circuit to maintain a load voltage and determining the maximum power for a Zener diode. 4) Comparing collector characteristics of BJTs and drain characteristics of JFETs. 5) Sketching transfer characteristics from drain characteristics and using Shockley's

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Saad Majeed
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44 views3 pages

Faculty of Engineering Department of Electrical Engineering Lahore Leads University

The document is an electronics exam for a course at Lahore Leads University covering transistors. It contains 5 questions worth a total of 50 marks. The questions cover topics like: 1) Why the base-emitter and collector-base junctions of a transistor are both reversed biased in the cutoff region. 2) Designing and analyzing a common-emitter BJT configuration and explaining the working conditions with diagrams. 3) Designing a voltage regulator circuit to maintain a load voltage and determining the maximum power for a Zener diode. 4) Comparing collector characteristics of BJTs and drain characteristics of JFETs. 5) Sketching transfer characteristics from drain characteristics and using Shockley's

Uploaded by

Saad Majeed
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Faculty of Engineering

Department of Electrical Engineering


Lahore Leads University

ET134– Electronic
Take Home Exam
Spring 2020

Maximum Marks: 50 Due Date: 9 July 2020

Submitted By
Name:

Student ID:

Submitted To
Engr. Anum Aslam
Lecturer – EE Department

Submission Date
9 July 2020

Details of Obtained Marks


Total Obtained
Total Marks
Question Marks
5 50
Note:
Cheating is not tolerable. If any cheating is suspected, you will be grade zero directly.

Self-work is appreciable.

Q.1:
a) In the cutoff region why the base-emitter and collector-base
junctions of a transistor are both reversed biased?
b) Design a common-emitter configuration for BJT and give your analysis on:
 Collector characteristics
 Base characteristics Marks: 4+6
Q. 2:
a) How a BJT transistor is constructed and why it is called bipolar junction transistor? Explain its all
working conditions with help of diagrams showing the path followed by currents?

b) Why limit of operation should be considered carefully in transistors? Justify your answer
with help of all consequences in real life application?
Marks: 5+5
Q. 3:
a) Design the network of fig 1 to maintain VL at 12 V for a load variation ( IL ) from 0 mA to 200 mA.
That is, determine RS and VZ.
b) Determine PZ max for the Zener diode of part (a). Marks: 5+5

Fig 1

Q.4:
What are the major differences between the collector characteristics of a BJT transistor and the drain
characteristics of a JFET transistor? Compare the units of each axis and the controlling variable. How does
IC react to increasing levels of I B versus changes in I D to increasingly negative values of V GS? How does
the spacing between steps of I B compare to the spacing between steps of V GS? Compare VCsat to VP in
defining the nonlinear region at low levels of output voltage.
Marks: 10
Q.5:
Given the characteristics of Fig 2:
 Sketch the transfer characteristics directly from the drain characteristics.
 Using Fig. 2 to establish the values of IDSS and VP, sketch the transfer characteristics using
Shockley’s equation.
 Compare the characteristics of parts (a) and (b). Are there any major differences? Marks: 10

Fig 2

Transistor in Cutoff region


In this region both junctions of the transistor are reverse biased. Hence
transistor in cut off does not conduct any currents expect for
small reverse saturation currents that flow across junctions. In
cutoff condition emitter current is zero and the collector
current consists of small reverse saturation currents. The
transistor when used as switch is operated in cutoff on
condition and saturation regions which corresponds to switch
off an on condition respectively.

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