SINGLE PHASE GRID-TIE INVERTER

Submitted by
Muhammad Hassan Butt 2015116
Muhammad Sohaib Ather Siddiqui 2015318
Mutaher Mehboob 2015352
Daud-ur-Rehman Yaqoob 2015381

Advisor: Dr. Muhammad Akbar Co- Advisor: Dr. Shahid Alam

Faculty of Electrical Engineering

GIK Institute of Engineering Sciences and Technology
Topi, District Swabi, Khyber Pakhtunkhwa, Pakistan. www.giki.edu.pk

April 2019
 Dedicated to my beloved parents
without whom I would not be where I
am today and to my dear Pakistan.

ii
 Certificate of Ownership

It is certified that the work contained in this final year project report

“Single Phase Grid-Tie Inverter”

has been carried out through the collective efforts of Muhammad Hassan Butt, Muhammad

Sohaib Ather Siddiqui, Mutaher Mehboob and Daud-ur-Rehman under the supervision of

Dr.Muhammad Akbar and Dr. Shahid Alam, through extensive research, internet, library and

through diverse expert opinions.

Names Registration Numbers

Muhammad Hassan Butt 2015116
Muhammad Sohaib Ather Siddqui 2015318
Mutaher Mehboob 2015352
Daud-ur-Rehman Yaqoob 2015381

Advisor: Dr. Muhammad Akbar Co- Advisor: Dr. Shahid Alam

Dean:
Dr. Zia-ul-Haq Abbas
Faculty of Electrical Engineering, GIK Institute of Engineering Sciences and Technology

Date of submission: April 23, 2019

iii
 Preface

This final year project report is an explanation of energy alternate solution of current power

crisis in Pakistan through a synchronized grid inverter capable of runtime load calculation and

smart power utilization.

iv
 Acknowledgements

All praise to Almighty Allah for blessing me with strength, courage, and knowledge; and helping me out

constantly to achieve this honor. He has never left me helpless and has always guided me in the right

direction throughout this long journey. Without His help and blessings, I would not have been able to

complete a single step. I pray to Him to make the path of my future easy and help me in doing

something good for humanity.

May Allah guide us and help us all in our lives here and hereafter.

Muhammad Hassan Butt

Muhammad Sohaib Ather Siddiqui

Mutaher Mehboob

Daud-ur-Rehman Yaqoob

April 2019

v
Contents
List of Figures............................................................................................................................................viii
Abstract.......................................................................................................................................................x
1 Introduction........................................................................................................................................1
1.1 Overview......................................................................................................................................1
1.2 Block Diagram and Configuration................................................................................................1
1.3 Design..........................................................................................................................................2
2 DC-AC Inverter....................................................................................................................................3
2.1 Methodology...............................................................................................................................3
2.2 Carrier wave.................................................................................................................................4
2.2.1 Carrier wave selection.........................................................................................................4
2.2.2 Carrier wave generation......................................................................................................4
2.3 Reference signal acquisition........................................................................................................5
2.4 Pulse Width Modulation..............................................................................................................6
2.4.1 Types of SPWM....................................................................................................................7
2.4.2 Selection of SPWM level......................................................................................................8
2.4.3 Generation of a 3-level SPWM.............................................................................................8
2.5 Power H-Bridge............................................................................................................................9
2.5.1 H-Bridge Driver for a final 3-level SPWM output...............................................................10
2.5.2 Operation of IR2110 Driver................................................................................................11
2.6 Filter Designing..........................................................................................................................12
3 DC-DC converter...............................................................................................................................13
3.1 Introduction...............................................................................................................................13
3.1.1 Non-Isolated DC-DC converters.........................................................................................13
3.1.2 Isolated DC-DC converters.................................................................................................16
3.2 Chosen Topology and its characteristics....................................................................................19
3.2.1 Passive cooling...................................................................................................................20
3.2.2 Ripple factor.......................................................................................................................20
3.3 Switching...................................................................................................................................21
3.4 Transformer...............................................................................................................................22
3.5 Rectifier.....................................................................................................................................24
3.6 Filter...........................................................................................................................................25
4 CHAPTER 4........................................................................................................................................27

vi
 4.1 Conclusion.................................................................................................................................27
4.2 Future Work...............................................................................................................................28
5 REFERENCES......................................................................................................................................29
6 APPENDIX a (ir2110 datasheet).........................................................................................................31
7 APPENDIX b (boost converter code).................................................................................................34

vii
 List of Figures
Figure 1-1: General Block Diagram of Grid Connected System....................................................................1
Figure 1.2: Schematics of a Grid Tie Inverter...............................................................................................2
Figure 2.1: Block Diagram of DC-AC Inverter...............................................................................................4
Figure 2.2: Triangular Wave Generator.......................................................................................................5
Figure 2.3: Circuit for Reference Signal Acquisition.....................................................................................6
Figure 2.4: Sine Pulse Width Modulation....................................................................................................6
Figure 2.5: a. 2-level SPWM, b. Frequency Spectrum of 2-level SPWM, c. Filtered Output, d. 3-level
PWM, e. b. Frequency Spectrum of 3-level SPWM, c. Filtered Output........................................................7
Figure 2.6: SPWM Generator Block Diagram and the Phenomenon..............................…………………………..8
Figure 2.7: 2-level SPWM generation (left) and 3-level SPWM generation (right) .....................................8
Figure 2.8: Typical Connections of IR2110 MOSFET driver..........................................................................9
Figure 2.9: Output 3-level SPWM on OScilloscope....................................................................................10
Figure 2.10: Complete Driving Circuit for H-Bridge...................................................................................11
Figure 3.1: Schematic for buck converter..................................................................................................14
Figure 3.2: Input and Output waveforms..................................................................................................14
Figure 3.3: Schematic for boost converter................................................................................................15
Figure 3.4: Schematics for half bridge topology........................................................................................17
Figure 3.5: Schematics for full bridge topology.........................................................................................18
Figure 3.6: Schematics for push pull topology...........................................................................................19
Figure 3.7: Schematics of switch with zener diode protection..................................................................22
Figure 3.8: Schematics of transformer......................................................................................................23
Figure 3.9: Full Bridge Rectifier.................................................................................................................24
Figure 3.10: Input and Output waveforms of full bridge rectifier.............................................................25
Figure 3.11: Circuit and waveform obtained at the output at full load (where Vr = Vm – VLmin)............26
Figure 5.1: Outputs of grid (lower magnitude) and GTI (higher magnitude).............................................27
Figure 5.2: Final Output when systems connected in parallel...................................................................27

viii
 LIST OF SYMBOLS AND ABBREVIATIONS

Vs Source Voltage
Is Source Current
Vo Output Voltage
Rt Resistance to calculate time period of carrier wave
VGS Gate to Source Voltage of MOSFET
VDS Drain to Source Voltage of MOSFET
Vp Peak Voltage
Vr Ripple Voltage
S Irradiance
T Temperature
Voo Open Circuit Voltage
Vmp Maximum Power Point Voltage
Imp Maximum Power Point Current
GTI Grid Tie Inverter
DC Direct Current
AC Alternating Current
SPWM Sine Pulse Width Modulation
RMS Root Mean Squared
MOSFET Metal Oxide Semiconductor Field Effect Transistor
BJT Bipolar Junction Transistor
SEPIC Single-Ended Primary-Inductor Converter

ix
 Abstract
Grid tie inverter for PV system is a standalone device which facilitates the utility

interactive photovoltaic system. The device will be capable of using the PV arrays

and utility simultaneously. The system takes in a DC input from the DC source

(PV array) and steps up the DC to higher voltage level. The inverter then takes in

this DC input and gives a sinusoidal (AC) output which is at a slightly higher

voltage but with frequency and phase synchronization with the output of the grid.

Switching controller is responsible for phase and frequency coherence with the

grid output. The device is also capable of anti-islanding, net metering and overload

protection.This report focuses on DC-DC step-up and DC-AC inversion with phase

and frequency synchronizaion.

x
 1 Introduction

1.1 Overview
We all know that Pakistan, in fact the whole world is facing huge power crises and the

people are trying to prefer shifting to renewable and more efficient energy systems. Huge

investments are being made in power sector for alternate green power production and effective

and efficient power management programs. A major thing to note here is that the research in

areas of alternate power sources and power management systems and devices are running

parallel but isolated. These areas have not been addressed together yet and if they have been,

there are very few examples. There is a strong need and demand for such devices that are capable

of uniting the green power production with effective power management.

1.2 Block Diagram and Configuration

As the results of research based on the optimization model of grid connected inverter

systems and the of-grid systems with and without batteries, it has been found that the grid

connected battery less systems are more efficient and optimized model for inverters [2]. A

general overview of the Grid Connected system is given in Figure 1.1.

Figure1.1. General Block Diagram of Grid Connected System.

1
The schematic for a Grid-Tie Inverter is shown in Figure 1.2.

Figure 1.2. Schematic of a Grid-Tie Inverter (Designed by the authors for this project).

1.3 Design
A Grid-Tie Inverter for utility interactive photovoltaic systems is designed using four

major portions. First of all, a 12V DC supply from the PV-array is converted in to a 40 KHz

wave of 12V peak using MPPT algorithm implemented using PIC microcontroller. Then this

high frequency wave is stepped up to 340V peak wave using a chopper transformer in a push-

pull configuration. This high frequency AC is then filtered to get a 340V DC supply. This supply

is then used as the biasing of the inverter that converts it in to a 240V peak AC sinusoid after

filtration that is in-phase and in frequency synchronization with the grid AC sinusoid of 220V

peak.

2
 2 DC-AC Inverter

2.1 Methodology
There are basically two types of DC-AC inverters, modified sine wave inverters and the

pure sine wave inverters. The modified Sine wave inverters use modified square wave to model a

sine wave but have higher harmonics and are not suitable for use with sensitive devices and

inductive load. Also the efficiency of modified sine wave inverters is far less than the pure sine

wave inverters.

Pure Sine wave is used in the implementation of this design. The block diagram of DC-

AC inverter is shown in Figure 2.1 [1]. The pure sine wave inverter is made using pulse with

modulation techniques generating the Sine Pulse Width Modulation (SPWM). The SPWM

generated to model a pure sine wave has to be in-phase and in frequency synchronization with

the grid output to let them be connected in parallel. For this we a reference sine wave from the

grid is used and the SPWM is generated using that referrence. A carrier triangular wave of high

frequency is compared with the reference sine wave to get a 2-level SPWM.

The SPWM generated is then used in a special pattern to switch the H-Bridge biased at

340VDC to get a 3-level SPWM of 340V peak. This final output is then filtered to get a pure sine

wave output of peak voltage 340V and an rms value of 240VAC.

3
 Figure 2.1. Block Diagram for the DC-AC Inverter.

2.2 Carrier wave

Carrier wave is the high frequency wave to modulate the reference sine wave to get an

SPWM.

2.2.1 Carrier wave selection

The options available for carrier wave are high frequency saw tooth wave or high

frequency triangular wave. The analysis has proved that the harmonic distortion produced by the

triangular wave is far less than the saw tooth wave so the triangular wave has been selected for

this design as the carrier wave [2].

2.2.2 Carrier wave generation

The triangular wave is generated using the circuit given in Figure 2.2. It has a square

wave generator and an integrator that converts the square wave in to a triangular wave [1].

4
 Figure 2.2. Triangular Wave Generator.

The op-amp ICs used for this purpose are high performance amplifiers with a good slew

rate to operate at high frequency without distortion or saturation. For this purpose TL-084

amplifier IC has been used in this design that is a JFET based amplifier and can operate at

frequencies higher than 12 KHz. The formula for calculating the frequency of output triangular

wave is f =1/(2*Rt*C). As shown in Figure 2.2, the value of Rt = 500 Ohms and the capacitor

value chosen was 100nF. So the frequency comes out to be 10 KHz. The previous designs have

limitations on this circuit and can generate only 4 KHz triangular wave leading to less accuracy

in the modeling of sine wave into PWM. In this design, the values of other components are

adjusted to make it operate at 10 KHz.

2.3 Reference signal acquisition

Reference signal is the reference sine wave obtained from the grid to get a final output

that is in-phase and in frequency synchronization with the grid output. This enables the system to

adopt its output continuously according to the fluctuations in the grid output and thus the inverter

output is locked with the grid output at any instant of time. The circuit to get a reference signal

from the grid is shown in Figure 2.3.

5
 Figure 2.3. Circuit for Reference Signal Acquisition.

The 220VAC from the grid is stepped down using a low power transformer and the final

level of the sine wave is adjusted using the 1M Ohm potential divider. The purpose of using a

high resistance in the potential divider is to minimize the power loss. Transformer is used in this

design to eliminate the problems of common ground at the time of connecting to the grid. If

transformer is not used, the final output cannot be connected in parallel with the grid and the

purpose of the device fails.

2.4 Pulse Width Modulation

Pulse Width Modulation is the modeling of any wave in the form of pulses of varying

width depending on the amplitude of the signal to be modeled. In this case, sine wave is the

reference signal. The SPWM is shown below in Figure 2.4.

Figure 2.4. Sine Pulse Width Modulation.

6
2.4.1 Types of SPWM

There are different types, rather levels of SPWM. It can be 2-level, 3-level and 5-level or

may be higher depending upon the application and requirement.

(a) (b)

(c) (d)

(e) (f)

Figure 2.5. a. 2-level SPWM, b. Frequency Spectrum of 2-level SPWM, c. filtered output, d. 3-

level SPWM, e. Frequency Spectrum of 3-level SPWM, f. filtered output.

7
2.4.2 Selection of SPWM level

A comparison of 2-level and 3-level SPWM is shown in Figure 2.5. As one can see that

in 3-level SPWM, the ripples are considerable reduced and there are almost no high frequency

components in the frequency spectrum of a 3-level SPWM. Thus a 3-level SPWM has been

chosen for this inverter design.

2.4.3 Generation of a 3-level SPWM

A simple SPWM is generated using the comparison of the reference sine wave with the

triangular carrier wave using a comparator IC (MC3302). The phenomenon of generating a

simple SPWM is shown in Figure 2.6.

Figure 2.6. SPWM Generator Block Diagram and the Phenomenon.

For generation of a 3-level SPWM, the method generally used is to generate a 3-level

triangular wave and then compare the sine wave to a 3-level SPWM like shown in the Figure 2.7.

Figure 2.7. 2-level SPWM generation (left) and 3-level SPWM generation (right).

8
 The second method used in this design is more suitable as it gives rid of generation of a

3-level triangular wave and the additional components resulting in delay and distortion. In the

modified design, no additional component is used as compared to the 2-level SPWM generator

but the problem is tackled using the biasing changes and other design variations in the H-Bridge

driver circuit that are more efficient and reliable and are explained in the next section.

2.5 Power H-Bridge

The SPWM generated using the high frequency carrier triangular wave and the reference

sine wave from the grid is of 12V peak and of a very low power. It is of no use until is converted

into a high power sine wave with an RMS value of 240VAC. This is done using MOSFET

switches arranged in the H-bridge configuration. MOSFETs are voltage operated devices that

need some gate voltage to switch them on or off. The V GS required for complete switching of the

MOSFET must be 10V to 20V higher than the V DS. For this purpose, MOSFET driving ICs are

used that supply the required voltage at the gate using a bootstrapping capacitor for proper

switching of the transistor. The IC used in this design is IR2110 whose typical connections for a

half H-Bridge configuration are shown below in Figure 2.8 [3].

Figure 2.8. Typical Connections of IR2110 MOSFET driver.

The value of the bootstrapping capacitor is calculated using the following formula [3].
9
2.5.1 H-Bridge Driver for a final 3-level SPWM output

The 2-level SPWM generated using the control circuitry is used as the switching signal

for the IR2110 IC that drives the H-Bridge in return. Using the combinations of 2-level SPWM

and its inverted version and a square wave generated using the reference sine wave and its

inverted version, the output of the H-Bridge is managed to be a 340V peak 3-level SPWM

(Figure 2.9). The circuit with modifications is shown in Figure 2.10.

Figure 2.9. Output 3-level SPWM on Oscilloscope.

10
 Figure 2.10. Complete Driving Circuit for H-Bridge.

To get a 3-level SPWM, the –VCC for the output side of the IR2110 is grounded instead

of connecting it to the negative logic supply thus giving a logic shift in each cycle that is

automatically reversed for the negative cycle and as a result, the final output of the H-Bridge is a

3-level SPWM as required.

2.5.2 Operation of IR2110 Driver

The SPWM signal and its inverted version were fed to the LIN and HIN of the IR2110. If

the internal logic detects a logic high, the HO pin gets high and if the internal logic detects a

logic low, the LO pin is driven. A source reference pin is connected to the source of high side

MOSFET that is used to drive the HO pin using the bootstrap capacitor and a diode connected to

the VCC [1]. In case of driving the lower side of the half bridge, no bootstrapping components

11
are required. This is the configuration for the left half of the H-Bridge as shown in Figure 2.10.

The right half is driven using the square wave and its inverted version obtained using zero

crossing detector on the reference sine wave. In the right half, one of the two MOSFETs from

high side and low side is on for a complete half cycle of the reference sine wave and the output,

thus controlling the polarity of the output SPWM.

2.6 Filter Designing

Keeping in consideration the input and output impedances that are offered by the circuit

at particular frequency, the values of capacitor and inductor were chosen for the LC filter. We

have calculated values for the operating frequency of 100Hz. Using the formula C=1/ɷ2L and

choosing a particular value of inductance from the available inductances, the capacitance was

calculated and used.

12
 3 DC-DC converter

3.1 Introduction
A DC-to-DC converter is an electronic circuit which converts a source of direct

current (DC) from one voltage level to another. Two types of converters are used which are

isolated and non-isolated converters. [3]-[12]

Non-isolated converters are easy to understand and easy to implement, they are

transformer less inverters while isolated inverters use high frequency transformers for isolation

between input and output.

There are several approaches to non-isolated dc-dc conversion for use when the input

varies above and below the output. Among these are the SEPIC (Single-ended primary-inductor

converter), buck, boost, buck-boost, cuk.

3.1.1 Non-Isolated DC-DC converters

First type of DC – DC converters is buck converters. In the figure below, a switch S is

shown. This switching function can be performed very well by a FET, thyristor or any other

suitable switching electronic device. Also a diode (termed as free-wheeling diode) is used to

allow the load current to flow through it, when the switch is turned off. The load is inductive (R-

L) one. In some cases, a battery (or back emf) is connected in series with the load. Due to the

load inductance, the load current must be allowed a path, which is provided by the diode;

otherwise, i.e., in the absence of the above diode, the high induced emf of the inductance, as the

load current tends to decrease, may cause damage to the switching device. If the switching

device used is a thyristor, this circuit is called as a step-down chopper, as the output voltage is

13
normally lower than the input voltage. Similarly, this dc-dc converter is termed as buck one, due

to reason given later

Figure 3.1. Schematic for buck converter.

Figure 3.2. input and output waveforms.

The output voltage and current waveforms of the circuit are shown in the diagram above.

The output voltage is same as the input voltage, i.e, Vo = V S when the switch is ON during the

ON period 0 <t<TON. The switch is turned off at t=TON.

During the off interval the output voltage is zero, i.e. Vo =0, now as the diode conducts.

The OFF period is,

14
 TOFF = T – TON with the time period being T = TOFF + TON

The frequency is f=1/T, with T is kept constant. The average value of the output voltage

can be expressed as

The duty ratio is k= TON/T, so the value of k can exist between 0 and 1. Normally, due to

turn-on delay of the device used, the duty ratio (k) is not zero, but has some positive value.

Similarly, due to requirement of turn-off time of the device, the duty ratio (k) is less than 1.0. So,

the range of duty ratio is reduced. It may be noted that the output voltage is lower than the input

voltage. Also, the average output voltage increases, as the duty ratio is increased. So, a variable

dc output voltage is obtained from a constant dc input voltage. The load current is assumed to be

continuous as shown in figure above. The load current increases in the ON period, as the input

voltage appears across the load, and it decreases in the OFF period, as it flows in the diode, but is

positive at the end of the time period, T.

Figure 3.3. Schematic for boost converter.

15
3.1.2 Isolated DC-DC converters

The DC-DC converters include a transformer to provide ground isolation are known as

isolated DC-DC converters. There are many methods of making a DC-DC converter. For this

project, most of them were ruled out because the output was not isolated from the input or they

did not operate in the necessary power range. This section takes into consideration the three

topologies that were seriously considered and the controls circuit that will be used for

implementation of this project.

First one is half bridge topology. The half bridge converter has eighty percent efficiency

at five hundred watts of power. It also has a fifty percent duty cycle and isolates the input from

the output through a two winding transformer.

For the half bridge converter, shown in figure 2 when switch Q1 is on, current flows

through the top half of the primary side of T1, expanding the magnetic field in T1. The

expanding magnetic field induces a voltage across T1 secondary, such that diode D2 is forward

biased and diode D1 is reverse biased. D2 conducts and charges capacitor C3 via L1.

When Q1 turns off, the magnetic field in T1 collapses and after a period of dead time, Q2

switches on. Current flows through the bottom half of the transformer and the magnetic field in

T1 expand, the direction of the magnetic flux is opposite that of Q1, so now D1 is forward biased

and D2 is reverse biased. D1 conducts and charges C3 via L1. After a period of dead time, Q1

conducts and the cycle repeats.

16
 Figure 3.4. Schematic for half bridge topology.

It is very important that Q1 and Q2 are not turned on at the same time. If they were, they

would short circuit the supply. Therefore the conduction time of each transistor must not exceed

half of the total period for one complete cycle. It is also important to make sure the magnetic

behavior is uniform; otherwise the transformer will saturate and destroy Q1 and Q2. This

requires that the individual conduction times of Q1 and Q2 be exactly equal.

Pros:

• Transformer design is not critical

Cons:

• Unstable voltage from capacitors on primary side

• Switching losses

Second is full bridge converter topology. The full bridge converter has 85% efficiency at

one thousand watts of power. It also has a fifty percent duty cycle and isolates the input from the

output through a two winding transformer.

17
 The full bridge converter, shown in Figure 3.5, is very similar to that of the half bridge

converter. Instead of Q1 in the half bridge, the full bridge has Q1 and Q4 on at the same time

and Q2 and Q3 on instead of Q2. There is no floating source in the full bridge design (caused by

the capacitors C1 and C2 in the half bridge design). Instead of the diodes charging capacitor C3,

they charge capacitor C2. Other than that, this circuit works the exact same way as the half

bridge. The same warnings about conduction time and magnetic behavior also exist for the full

bridge.

Figure 3.5: Schematic for full bridge topology

Pros:

• Most efficient type of converter

• Handles high power applications

Cons:

• Higher efficiency at higher power

• Highest switching losses

Third topology is push pull converter. The push pull converter has 75% efficiency at five

hundred watts of power. It also has a fifty percent duty cycle and isolates the input from the

18
output through a three winding transformer. The push pull converter, shown in Figure 3.6, works

similar to that of the half bridge converter. Due to the fact that the push pull converter

implements a three winding transformer, it must also satisfy the condition that the two halves of

the centre-tapped transformer primary be magnetically identical.

Figure 3.6. Schematic for push pull topology.

Pros:

• Frequently preferred in desired power range

• Simple Switching

Cons:

• Switches require higher voltage rating

• Voltage spikes

3.2 Chosen Topology and its characteristics

According at the first glimpse at these topologies, the topology seems suitable for our

project is the full bridge. Non-isolated topologies have very limited operating power and have

very severe effects. While half bridge and push-pull topologies have lower operating power

efficiency at 1KW.

19
 However, after more research it was found that the full bridge only attained high

efficiency at high power ratings. For what this project needs, the push pull is a more realistic

choice.

The push pull topology is isolated just like the full bridge. Moreover, we need 1KW

operating power range which can be achieved at more than 75% efficiency if we use two push

pull converters in parallel.

The push pull topology is an ideal choice for this Dc-Dc converter for multiple reasons.

The most important reason is the isolation between the source and output provided by the

magnetics in the transformer. Another deciding factor is the simplicity of the switching over a

full bridge design. By only having to turn on 1 switch at a time, timing issues become less

critical. The other important factor is that the push pull topology is commonly used at this power

level. This makes the research on the topology more reliable and achievable.

3.2.1 Passive cooling

With the desire to reduce complexity of the design and improve efficiency, the DC-DC

supply should be designed with passive cooling. Although the amount of heat produced will be

substantial from the I2R losses in the primary winding, proper layout of the components should

suffice for temperature considerations of the components.

3.2.2 Ripple factor

A ripple of no greater than 2% of the output voltage should be observed from the supply.

The reason behind establishing the maximum ripple is to ensure minimal noise is introduced into

the system during the DC-AC stage. It is likely though this arbitrary value of an acceptable ripple

will change based on the needs of the inverter.

20
3.3 Switching
The push pull topology relies on two switches to cycle current through the transformer at

high frequencies. There are two types of switches which can be used within the design;

MOSFETs (Metal Oxide Silicon Field Effect Transistors) or BJT’s (Bi-Polar Junction

Transistors). In each case the transistor would be running in saturation mode when turned on.

This enables the transistors to resemble the characteristics of an ideal switch. There is however

with both transistors, a resistance present when in saturation mode. The resistance causes energy

to be wasted as heat within the device. Since the goal of this design is to be highly efficient, the

on resistance of transistor should be minimal. Another important factor in choosing the transistor

is the speed at which the device is capable of switching. The transistor must be able to switch

states from on to off quickly for two reasons. The first is so that it can switch at the operating

frequency. In this push pull design, the operating frequency is 40 KHz. However, with a push

pull design, each transistor must be able to operate at twice the frequency. This is because each

switch must be open for some duty cycle of one half of the operating frequency. During the

second half of the cycle, the transistor is off, allowing the magnetic flux in the core to reset. The

second reason the switching speed is important with the transistor, is the energy dissipation.

When a switch is transitioning from off to on, it is in a linear region, which has a high resistance.

Since the current cannot reduce due to the inductance of the transformer, power i 2R is being

wasted. With a faster switching time, less energy can be wasted, thus improving the efficiency of

the design.

21
 Figure 3.7. Schematic of switch with zener diode protection.

The maximum voltage the transistor can accommodate should also be considered when

choosing the device. This voltage should be larger than the voltage source which will be across

the switch. To protect from Voltage spikes, an additional zener diode should be placed across

each switch. Based on the described parameters, a MOSFET which has a very low on resistance

is the best choice. The maximum voltage the MOSFET should be able to handle needs to surpass

12V DC. The MOSFET should be N-MOS because it does not need a larger voltage than the

source to bias it on. N-MOS should also be used because it typically performs at faster speeds

than P-MOS and will reduce switching losses.

Keeping all the parameters and all the design constraints in mind, we have chosen

IRF3808 which exceeds our all the requirements.

3.4 Transformer
When examining the design of a transformer, shown in Figure 3.8, there are a few key

parameters which need to be chosen before the design of the transformer can be done. These

parameters are based on the general formula which governs how a push pull topology will

behave which is as follows

Ns
V out =2 DV¿
Np

Figure 3.8. Schematic of transformer.

22
 The first is input and output voltages. This design specifies 12 volts dc will be applied as

the input, and about 340-400 volts dc will be the output. Duty cycle of the design is controlled by

MPPT controller and that’s why the output voltage varies in between 340-400V DC. Hence the

maximum output voltage required at 100% duty cycle is 400V DC. Unfortunately the turn ratio

solved for does not equal an integer. However if we reduce the expected output voltage to 396

volts, a turns ratio of 66 works perfectly. Transformers used in push-pull designs normally have

multiple windings. In this design there will be 3 windings, two primary windings and one

secondary winding. The primary windings will be 1/66th the amount of turns as the secondary

windings. Each set of windings will be attached together so that the transformer behaves like one

transformer with a center tap on the primary side.

Once the parameters (frequency, voltage ratings, current ratings, power rating and turn

ratio) are determined, we can select the suitable transformer among the available transformers in

the market.

3.5 Rectifier
The four diodes in this circuit form a full bridge rectifier. In positive half cycle diodes D 2

and D3 conducts while in negative half cycle diodes D1 and D4 conducts and thus gives only

positive valued waveforms.

Figure 3.9. Full bridge rectifier.

23
 The selection of full bridge rectifier justifies it. In this case, no center tapped secondary is

required, and efficient diodes are available at cheaper cost which justifies its use because

comparatively lower rating diodes are being used than in center tapped transformer

configuration. Furthermore, center tapped transformer has much more complications in it which

can be avoided while using full bridge rectifier.

The voltage rating required is twice the peak input voltage rating, because when we filter

the output, diode bears 2Vp across it at an instance. Hence the voltage rating of diode must be

greater than 400V. Current rating must be greater than 2A, because we are using two push pull

configuration hence two full bridge rectifiers will be used, so one rectifier will have to handle

less than 2A. Lastly, good recovery time is also required for the diode, because the operating

frequency is 40 KHz and ripple frequency of the output is around 80 KHz. Hence we have

selected HER305 which exceeds all our requirements.

Figure 3.10. input and output wave form of full bridge rectifier.

24
3.6 Filter
Full wave rectifier produces waveform which varies between 0 to Vp, hence there is no

negative part of the waveform in the output. To convert positive rippled waveform into DC, we

require a low pass filter. One single capacitor can do the job. Following formula is used to

calculate the ripple voltage

I out
V r=
2 fC

Here Vr is ripple voltage, Iout is the output current, f is input frequency and C is

capacitance. For calculating the capacitance with a specified ripple voltage, we can rearrange the

formula as below

I out
C=
2f Vr

The outputs of two push-pull circuits will be connected in parallel to each other after

rectification. That’s why only once capacitor will be used to filter whole 1 KW of output DC

power. Let we have 300V at the output (worst case scenario) and we are obtaining 1KW at the

output. Then

P 1000
I out = = =3.333 A
V 300

Let we allow only 1V ripple at the output and the frequency is 40 KHz. Putting all the

values in the above formula we obtain capacitance 41.66µF. Hence the minimum capacitance

required is 41.66µF. As 47µF capacitors are easily available in the market that’s why 47µF

capacitor is selected for this project.

25
Figure 3.11. the circuit and waveform obtained at the output at full load. (Where V r =V m−V Lmin).

26
 4 Conclusion and Future Work

4.1 Conclusion
The GTIs output along with grid outpput is shown in Figure 5.1. As one can see it is in-phase

and in frequency synchronization with the grid output and is higher in magnitude i.e. the grid

output has a peak of 320V and the GTIs’ output has a peak of 340V.

Figure 5.1. Outputs of grid (lower magnitude) and GTI (higher magnitude).

This synchronized output when connected to the grid was pulled down to grid level as

shown in Figure 5.2. This proves that no distortion was there and the systems can be connected

in parallel for load sharing.

Figure: 5.2. Final Output when systems connected in parallel.

27
4.2 Future Work
The project can be extended to a marketable product which will be user friendly and for use at

homes or industry. This requires the necessary power sharing between the gird system and the

solar panels. Anti-islanding for the safety usage and devices protection can be added. Net-

metering allows user to supply the surplus energy produced to the grid and make some profit so

such capabilities can add to the value of the product. To maximize the efficient energy usage, the

whole process of switching the power appliances on the basis of user’s presence or a time

schedule can be automated. To keep track of the installment recovery of solar panels, monthly

billing and energy consumption, a meter can be added for calculation and display of such

information.

28
 5 REFERENCES

[1] Jim Doucet, Dan Eggleston, Jeremy Shaw, “DC/AC Pure Sine Wave Inverter”,

Worcester Polytechnic Institute (2007).

[2] Wardah Inam, Muneeb Zia, M. Nauman, “Grid-Tie Inverter for Utility Interactive

Photovoltaic Systems”, Ghulam Ishaq Khan Institute (2010).

[3] Hill, C. J. Switch Mode Power Supplies. Ed. C. J. Hill. 15 Mar. 1998. 16 Sept. 2006

[4] Wagner, J. Solid state tesla coils - general notes. Ed. J. Wagner. 2003. 27 Sept. 2006

[5] K. Liu and F. C. Lee, Zero-voltage switching technique in dc/dc converters. IEEE Power

Electronics Specialists Conference Record, 1986, pp. 58 – 70.

[6] P. C. Todd and R. W. Lutz, Practical resonant power converters − Theory and

applications, Power technique Magazine, pp. 29 – 35, May 1986.

[7] M. K. Kazimierczuk, Design-oriented analysis of boost zero-voltage-switching resonant

dc/dc converter. IEEE Transactions on Power Electronics, vol. 3, no. 2, pp. 126 – 135,

April 1988.

[8] K. Liu, R. Oruganti, and F. C. Lee, Quasi-resonant converters − Topologies and

characteristics. IEEE Transactions on Power Electronics, vol. 2, no. 1, pp. 62 – 71,

January 1987.

[9] Hart, D. (1997). Introduction to Power Electronics. Upper Saddle River, NJ: Prentice

Hall.

[10] R. D. Middlebrook and S. Cuk, A general unified approach to modeling switching-

converter power stages,” Int. J. Electronics, vol. 42, no. 6, pp. 521-550, June 1977.

29
[11] J. G. Cho, J. A. Sabate, and F. C. L ee, Novel full-bridge zero-voltage-transition PWM

dc/dc converter for high power applications. IEEE Applied Power Electronics

Conference, 1994, pp. 143 – 149.

[12] M. K. Kazimierczuk and J. J´o ´zwik, Optimal topologies of resonant dc/dc converters.

IEEE Transactions on Aerospace and Electronic Systems , vol. 25, pp. 362 – 372, May

1989.

[13] Hannes Knofp, “Analysis, Simulation and Evaluation of Maximum Power Point

Tracking Methods for a Solar Powered Vehicle”, Portland State University, 1999

[14] David Sanz Morale, “Maximum Power Point Tracing Algorithms for Photovoltaic

Applications”, Aalto University, 20

30
6 APPENDIX a (ir2110 datasheet)

31
32
 7 APPENDIX b (boost converter code)

#include <PWM.h>

int32_t frequency = 20000; // desired frequency in Hertz

int pul=3;

float voltage;

float output;

void setup()

int pul=3;

InitTimersSafe();

bool success = SetPinFrequencySafe(9, frequency);

if (success)

pinMode(13, OUTPUT);

digitalWrite(13,HIGH);

Serial.begin(9600);

void loop()

float output = 70;

int sensorValue = analogRead (A3);

33
float voltage = sensorValue*(5.0/1023.0)*93.94;

Serial.println(voltage);

float x = (voltage/output)*100;

if (0<x<75)

pul =pul + 20;

pul = constrain(pul, 1, 254);

if (75<x<90)

pul =pul + 10;

pul = constrain(pul, 1, 254);

if (90<x<99)

pul =pul + 2;

pul = constrain(pul, 1, 254);

if (99<x<101)

pul =pul;

pul = constrain(pul, 1, 254);

if (101<x<110)

pul =pul - 2;

pul = constrain(pul, 1, 254);

34
 if (110<x)

pul =pul - 5;

pul = constrain(pul, 1, 254);

if (pul==254)

digitalWrite(13,HIGH);

pwmWrite(9,pul);

35