ISSN 2277-2685

IJESR/April 2018/ Vol-8/Issue-4/58-68

Saif Abbas et. al., / International Journal of Engineering & Science Research

DESIGN OF 32-BIT ARITHMETIC LOGIC UNIT (ALU) USING VHDL

Saif Abbas*1, Bhavya Chaturvedi1, Rituraj Akhauri1, Rupali Singh2
1
Student, Dept. of Electronics & Communication Engineering, SRM Institute of Science & Technology, Delhi-
NCR Campus, Modinagar (U.P), India.
2
Asst. Prof., Dept. of Electronics & Communication Engineering, SRM Institute of Science & Technology,
Delhi-NCR Campus, Modinagar (U.P), India.

ABSTRACT
An Arithmetic logic Unit (ALU) is used for arithmetic, logic and shift operations. It is most important
component of a system and is used in many appliances like calculators, cell phones, and computers. A 32-bit
ALU will be designed using VHDL. The logical gates which will be used are AND and OR and NOT and XOR
for each 32- bit ALU circuit and using them other gates such as NOR, NAND, XNOR will be designed. The
design will be implemented in Xilinx. It works faster than the ALU designed using less power. In this project we
will not be using multiplexer as used generally. Instead we will design a new signal named Op_ code. This helps
in reducing power consumption and power dissipation and reducing area. All the modules will be simulated in
models im ISim (P.40vd) and synthesized using Xilinx ISE 14.3.The adder which will be used in this design is
ripple carry adder which effectively combines two-32-bit-in-one-group and gives us sum, which makes the basic
addition unit increased in speed, reduced in size, and eventually lowered in power consumption.

Keywords: ALU; Verilog; AND; OR; Op_code; modelsim SE 6.4c; Xilinx ISE 14.7; ripple carry adder; NOT;
NOR; Simulation.

INTRODUCTION

32-BIT ALU
Due to widespread use of microprocessors and signal processors, operation of high performance and low power
hardware has always been a design problem. Arithmetic Logic Unit (ALU) is the most important part of
microprocessors controlling the speed of operation of the processor. Better is the design of ALU better the
microprocessor works. The main objective of this project is to improve the design of the ALU and reduce the
power usage and area covered by it. ALU is getting smaller and more compound to enable the development of a
more powerful but smaller systems. The need for high speed, less power consumption and compatible systems

*Corresponding Author www.ijesr.org 58

 Saif Abbas et. al., / International Journal of Engineering & Science Research

has been increasing as a result of computer, digital signal processing and networking applications. Arithmetic
operations such as, addition, addition with carry and subtraction, subtraction with borrow and logical operations
such as AND, OR, NOT, XOR, XNOR, NAND, NOR and right shift and left shift in shift operations are using
all type of operations done in ALU. In some computer processors, the ALU is divided into three separate parts,
the AU (Arithmetic Unit) and the LU (Logical Unit) and SU (Shift Unit). The AU performs the arithmetic
operations and the LU performs the logical operations and SU performs Shift operations.
An Arithmetic unit does the following function:
1. Addition
2. Addition with carry
3. Subtraction
4. Subtraction with borrow
A Logic unit does the following function:
1. AND 4. NOT 7.XNOR
2. OR 5. NAND
3. XOR 6. NOR
A Shift unit does the following task:

1. Right shift
2. Left shift

DESIGN OF 32‐ BIT ALU

While designing the ALU we will follow the principle "Divide and conquer" in order to make a design that has
smaller, more manageable blocks. Besides designing the 32‐bit ALU as one circuit we will first design one bit
ADDER, SUBTRACTOR. These bits can then be put together to make a 32‐bit ADDER, SUBTRACTOR, OR,
AND, NOT, XOR, LEFT SHIFT, RIGHT SHIFT UNIT.
32‐BIT ARITHMETIC UNITS
An Arithmetic unit does the following task: Addition, Addition with carry, Subtraction, Subtraction with
borrow. Firstly, we start by making one bit Full Adder, and similarly make 32 full adders. In this we will use
ripple carry adders.
To have small area coverage and fewer number of interconnections and area efficiency our ALU has been
designed using ripple carry adder. A 16 -bit, 13.9ns, 13.9mV (Ripple carry adder). Some other types of adders
are ripple-carry adder, carry- look ahead adder, carry-skip adder and Manchester carry chain adder. Carry- look
ahead adders first compute carry propagate and generate and then computes SUM and CARRY from them. A
16- Bit, 24 ns, 17mV (Carry Look ahead adder).
Two 32‐bit inputs A and B have been given and 33‐bit output is RESULT. C_in is the carry input of the adder
and the carry out is C_out. The output of the circuit is calculated from the following :
RESULT = A + B + C_in
Where A is a 32‐bit number, B is a 32‐bit number and C‐in is the carry input bit to the ripple carry adder.
In case of output with Op_code
Output => add_out when”1001”
Sub_out when”1010”

Copyright © 2018 Published by IJESR. All rights reserved 60

 Saif Abbas et. al., / International Journal of Engineering & Science Research

RIPPLE CARRY ADDERARITHMATIC UNIT

SIMULATED TIMING DIAGRAM OF ARITHMETIC UNIT
(ADDITION)
WITHOUT CARRY

WITH CARRY

Copyright © 2018 Published by IJESR. All rights reserved 61

 Saif Abbas et. al., / International Journal of Engineering & Science Research

(SUBSTRACTION)
WITHOUT BORROW

WITH BORROW

32-BITS LOGIC UNIT

A Logic unit does the following functions AND, OR, NOT, NAND, NOR, XOR, XNOR. We design a logic unit
that can perform the four basic logic operations: OR, AND, XOR and NOT, because from these four operations,
all other logic micro‐operations can be derived that is NAND, NOR, XNOR.
The 4 gates input are applied and they are selected according to the op_code. As follows
Output => not_out when”0000”
and_out when”0001”
or_out when”0010”
nand_out when”0011”
nor_out when”0100”
xor_out when”0101”
xnor_out when”0110”

Copyright © 2018 Published by IJESR. All rights reserved 62

 Saif Abbas et. al., / International Journal of Engineering & Science Research

Diagram of Logic Unit

SIMULATED TIMING DIAGRAM OF LOGIC UNIT
NOT

AND

Copyright © 2018 Published by IJESR. All rights reserved 63

 Saif Abbas et. al., / International Journal of Engineering & Science Research

OR

NAND

NOR

Copyright © 2018 Published by IJESR. All rights reserved 64

 Saif Abbas et. al., / International Journal of Engineering & Science Research

XOR

XNOR

32-BITS SHIFT UNIT

Shift unit is used to perform shift operations such as Right and Left shift. The shifting of bits of a register can be
in any direction‐ left or right. The bit provided to a register that has to be shifted is first placed onto common
bus.When load_data_signal is lowthe data is loaded and when start_shift_sig is high then shifting take place.
When the shifting unit is activated the register is shifted left or right according to the selection fo op_code.
with op_code select
load_data_sig <= '0’ when "0111",
'0' when "1000",
'1' when others;
with op_code select
start_shift_sig <= ‘1’when "0111",
'1' when "1000",
'0' when others;
The input is applied and they are selected according to the op_code. As follows
Output =>shift_out when "0111", -- Left shift
shift_out when "1000", -- Right shift

Copyright © 2018 Published by IJESR. All rights reserved 65

 Saif Abbas et. al., / International Journal of Engineering & Science Research

Diagram of SHIFT Unit

SIMULATED TIMING DIAGRAM OF SHIFT UNIT
LEFT SHIFT

RIGHT SHIFT

Copyright © 2018 Published by IJESR. All rights reserved 66

 Saif Abbas et. al., / International Journal of Engineering & Science Research

CONCLUSION
In our paper “Design of 32‐bit ALU using VHDL” we have designed and simulated a 32 bit ALU. Arithmetic
Logic Unit is the part of a device that performs all arithmetic operations, such as addition and subtraction,
addition with carry, subtraction with borrow, shifting and all sorts of logical operations AND, OR, NOT,
NAND, NOR, XOR, XNOR. The ALU is one component of the CPU (Central Processing Unit). The logical
gates used are AND and OR and NOT and XOR for each 32- bit ALU circuit and using them other gates such as
NOR, NAND, XNOR are designed. In this project we have not used multiplexer as used generally in deigning
ALU. Instead we have designed a new signal named Op_code. This helps in reducing power consumption and
power dissipation and reduces area. All the modules are simulated in modelsim ISim (P.40vd) and synthesised
using Xilinx ISE 14.3.The adder used in this design is ripple carry adder. The comparison between other
designed ALU and our ALU can be seen clearly bellow (5).
With Op select
Output <= not_out when "0000",
and_out when "0001",
or_out when "0010",
nand_out when "0011",
nor_out when "0100",
xor_out when "0101",
xnor_out when "0110",
shift_out when "0111", -- Left shift
shift_out when "1000", -- Right shift
add_out when "1001",
sub_out when "1010",
(others => '0') when others;
AREA OCCUPIED: 412 LTU TIMECONSUMED: 43.32 secs

\
AREA OCCUPIED: 715 LTU(1, 7) TIMECONSUMED: 63.410(1, 7)
COMPARRISON BETWEEN DESIGNED ALU AND OTHER ALUs
DESIGNED ALU OTHER ALUs
Ø No use of mux Ø Used mux
Ø Use of a new signal op_code to improve performance. Ø No use of any signal.
Ø Reduced area coverage. Ø Larger area coverage.
Ø 412 LTU. Ø 715 LTU.
Ø Reduced time taken for implementation. Ø Larger time consumption for
43.32 secs. implementation. 63.410 secs.
Ø Used only four basic gates for implementation of Logic Ø Uses all 7 gates for implementation of
Unit. Namely : AND, OR, NOT, XOR Logic Unit. Namely : AND, OR, XOR,
XNOR, NOT NAND, NOR

Copyright © 2018 Published by IJESR. All rights reserved 67

 Saif Abbas et. al., / International Journal of Engineering & Science Research

REFERENCES
[1] Ghosh TK, Pal AJ. Computer Organization and Architecture, Tata McGraw‐ Hill Publishing Company
Limited, New Delhi, 2013.
[2] Perry DL. VHDL Programming by Example, 4th ed., Tata McGraw‐Hill Publishing Company Limited, New
Delhi, 2002.
[3] Munjal S, Bhardwaj S, Malik S. Dept. of Computer science and Engineering, Dronacharya College of
Engineering, Gurgaon, Haryana, India, ALU USING VHDL DESIGNING A 4-BIT LOW POWER ALU
USING VHDL, International Journal For Technological Research In Engineering 2015; 2(8).
[4] Singh RPP, Kumar P, Singh B. Performance Analysis of Fast Adders Using VHDL, Advances in Recent
Technologies in Communication and Computing, 2009. ARTCom '09. International Conference, 17 November
2009.
[5] Comparative study and designing of Look Ahead Carry Adder and Ripple Carry Adder, January 2013.
[6] Z. GRODZKI College of Engineering, Lublin, Dqbrowshiego 13, Poland, the Theory of Shift-Registers,
Information and Control 1972; 21: 196-205.
[7] Malik D, Rathore RS. 32‐bit Arithmetic Logical Unit (ALU) using VHDL. International Journal of Science,
Engineering and Technology, 2013.

Copyright © 2018 Published by IJESR. All rights reserved 68