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Bahria University, Lahore Campus: Department of Computer Sciences

The document is a lab journal from Bahria University's Department of Computer Sciences for the Digital Logic Design Lab course. The objectives of the lab were to understand the operating principles of decoder circuits. The tasks involved constructing a 2 to 4 decoder using basic gates, recording its outputs, constructing a BCD-to-7 segment decoder, and recording its outputs.

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0% found this document useful (0 votes)
122 views5 pages

Bahria University, Lahore Campus: Department of Computer Sciences

The document is a lab journal from Bahria University's Department of Computer Sciences for the Digital Logic Design Lab course. The objectives of the lab were to understand the operating principles of decoder circuits. The tasks involved constructing a 2 to 4 decoder using basic gates, recording its outputs, constructing a BCD-to-7 segment decoder, and recording its outputs.

Uploaded by

Abdul Basit
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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Bahria University, Lahore Campus

Department of Computer Sciences


Lab Journal 10
(Spring 2020)

Course: Digital Logic Design Lab Date:


Course Code: CEL-120 Max Marks: 40
Faculty’s Name: Ms. Munazza Sher Lab Engineer: Mr. Shoaib Khan

Name: _____________________________ Enroll No: _______________________

Objective(s):

 To understand the operating principles of decoder circuits.

Lab Tasks:

Task 1: Construct a 2 to 4 Decoder with basic gates (Module KL-33005, block c). Construct the
circuit on breadboard.
Task 2: Record the outputs in the given table.
Task 3: Construct BCD-to-7 segment decoder.
Task 4: Record the outputs in the given table.

Lab Grading Sheet :


Max
Obtained
Task Mark Comments(if any)
Marks
s
1. 10
2. 10
3. 10
4. 10

Total 40 Signature

Note : Attempt all tasks and get them checked by your Lab Instructor
Lab 13: Decoder Circuit

Objective(s):

“To understand the operating principles of decoder circuits.”

Tool(s) used:

 KL-31001 DLD Trainer


 Module KL-33004/ 33005
 Connector leads

Overview:

A binary decoder is a combinational logic circuit that converts a binary integer value to an
associated pattern of output bits.

Task 01: Time: 30 Minutes

Construct a 2 to 4 Decoder with basic gates (Module KL-33005, block c). Construct the circuit
on breadboard.
Circuit Diagram:

Task 02: Time: 10 Minutes

Record the outputs in the table given below:

A B Do D1 D2 D3

0 0 1 0 0 0

0 1 0 1 0 0

1 0 0 0 1 0

1 1 0 0 0 1
Task 03: Time: 30 Minutes

Construct BCD-to-7 Segment Decoder

Circuit Diagram:
Task 04: Time: 100 Minutes

Record the outputs in the table given below:

D C B A Display

0 0 0 0 0

0 0 0 1 1

0 0 1 0 2

0 0 1 1 3

0 1 0 0 4

0 1 0 1 5

0 1 1 0 6

0 1 1 1 7

1 0 0 0 8

1 0 0 1 9

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