Led TV: Service Manual

Internal Use Only
North/Latin America http://aic.lgservice.com

Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
LED TV
SERVICE MANUAL
CHASSIS : LB5GG
MODEL : 49LX761H 49LX761H-GA

CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL69275901 (1508-REV00) Printed in Korea

CONTENTS
CONTENTS ............................................................................................... 2
SAFETY PRECAUTIONS ......................................................................... 3
SERVICING PRECAUTIONS..................................................................... 4
SPECIFICATION........................................................................................ 6
ADJUSTMENT INSTRUCTION................................................................. 9
TROUBLE SHOOTING GUIDE................................................................ 18
BLOCK DIAGRAM .................................................................................. 23
EXPLODED VIEW ................................................................................... 24
SCHEMATIC CIRCUIT DIAGRAM ............................................ APPENDIX
Copyright © LG Electronics. Inc. All rights reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC Do not use a line Isolation Transformer during this check.
power line. Use a transformer of adequate power rating as this Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
protects the technician from accidents resulting in personal injury between a known good earth ground (Water Pipe, Conduit, etc.)
from electrical shocks. and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
It will also protect the receiver and it's components from being with 1000 ohms/volt or more sensitivity.
damaged by accidental shorts of the circuitry that may be Reverse plug the AC cord into the AC outlet and repeat AC voltage
inadvertently introduced during the service operation. measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
If any fuse (or Fusible Resistor) in this TV receiver is blown, 0.5 mA.
replace it with the specified. In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
When replacing a high wattage resistor (Oxide Metal Film Resistor, repaired before it is returned to the customer.
over 1 W), keep the resistor 10 mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed

metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service 2. After removing an electrical assembly equipped with ES
manual and its supplements and addenda, read and follow the devices, place the assembly on a conductive surface such as
SAFETY PRECAUTIONS on page 3 of this publication. aluminum foil, to prevent electrostatic charge buildup or expo-
NOTE: If unforeseen circumstances create conflict between the sure of the assembly.
following servicing precautions and any of the safety precautions 3. Use only a grounded-tip soldering iron to solder or unsolder
on page 3 of this publication, always follow the safety precau- ES devices.
tions. Remember: Safety First. 4. Use only an anti-static type solder removal device. Some sol-
der removal devices not classified as “anti-static” can generate
General Servicing Precautions electrical charges sufficient to damage ES devices.
1. Always unplug the receiver AC power cord from the AC power 5. Do not use freon-propelled chemicals. These can generate
source before; electrical charges sufficient to damage ES devices.
a. Removing or reinstalling any component, circuit board 6. Do not remove a replacement ES device from its protective
module or any other receiver assembly. package until immediately before you are ready to install it.
b. Disconnecting or reconnecting any receiver electrical plug (Most replacement ES devices are packaged with leads elec-
or other electrical connection. trically shorted together by conductive foam, aluminum foil or
c. Connecting a test substitute in parallel with an electrolytic comparable conductive material).
capacitor in the receiver. 7. Immediately before removing the protective material from the
CAUTION: A wrong part substitution or incorrect polarity leads of a replacement ES device, touch the protective mate-
installation of electrolytic capacitors may result in an explo- rial to the chassis or circuit assembly into which the device will
sion hazard. be installed.
2. Test high voltage only by measuring it with an appropriate CAUTION: Be sure no power is applied to the chassis or cir-
high voltage meter or other voltage measuring device (DVM, cuit, and observe all other safety precautions.
FETVOM, etc) equipped with a suitable high voltage probe. 8. Minimize bodily motions when handling unpackaged replace-
Do not test high voltage by "drawing an arc". ment ES devices. (Otherwise harmless motion such as the
3. Do not spray chemicals on or near this receiver or any of its brushing together of your clothes fabric or the lifting of your
assemblies. foot from a carpeted floor can generate static electricity suf-
4. Unless specified otherwise in this service manual, clean ficient to damage an ES device.)
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable General Soldering Guidelines
non-abrasive applicator; 10 % (by volume) Acetone and 90 % 1. Use a grounded-tip, low-wattage soldering iron and appropri-
(by volume) isopropyl alcohol (90 % - 99 % strength) ate tip size and shape that will maintain tip temperature within
CAUTION: This is a flammable mixture. the range or 500 °F to 600 °F.
Unless specified otherwise in this service manual, lubrication 2. Use an appropriate gauge of RMA resin-core solder composed
of contacts in not required. of 60 parts tin/40 parts lead.
5. Do not defeat any plug/socket B+ voltage interlocks with which 3. Keep the soldering iron tip clean and well tinned.
receivers covered by this service manual might be equipped. 4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
6. Do not apply AC power to this instrument and/or any of its bristle (0.5 inch, or 1.25 cm) brush with a metal handle.
electrical assemblies unless all solid-state device heat sinks Do not use freon-propelled spray-on cleaners.
are correctly installed. 5. Use the following unsoldering technique
7. Always connect the test receiver ground lead to the receiver a. Allow the soldering iron tip to reach normal temperature.
chassis ground before connecting the test receiver positive (500 °F to 600 °F)
lead. b. Heat the component lead until the solder melts.
Always remove the test receiver ground lead last. c. Quickly draw the melted solder with an anti-static, suction-
8. Use with this receiver only the test fixtures specified in this type solder removal device or with solder braid.
service manual. CAUTION: Work quickly to avoid overheating the circuit
CAUTION: Do not connect the test fixture ground strap to any board printed foil.
heat sink in this receiver. 6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
Electrostatically Sensitive (ES) Devices (500 °F to 600 °F)
Some semiconductor (solid-state) devices can be damaged eas- b. First, hold the soldering iron tip and solder the strand
ily by static electricity. Such components commonly are called against the component lead until the solder melts.
Electrostatically Sensitive (ES) Devices. Examples of typical ES c. Quickly move the soldering iron tip to the junction of the
devices are integrated circuits and some field-effect transistors component lead and the printed circuit foil, and hold it there
and semiconductor “chip” components. The following techniques only until the solder flows onto and around both the compo-
should be used to help reduce the incidence of component dam- nent lead and the foil.
age caused by static by static electricity. CAUTION: Work quickly to avoid overheating the circuit
1. Immediately before handling any semiconductor component or board printed foil.
semiconductor-equipped assembly, drain off any electrostatic d. Closely inspect the solder area and remove any excess or
charge on your body by touching a known earth ground. Alter- splashed solder with a small wire-bristle brush.
natively, obtain and wear a commercially available discharg-
ing wrist strap device, which should be removed to prevent
potential shock reasons prior to applying power to the unit
under test.
IC Remove/Replacement 3. Solder the connections.
Some chassis circuit boards have slotted holes (oblong) through CAUTION: Maintain original spacing between the replaced
which the IC leads are inserted and then bent flat against the cir- component and adjacent components and the circuit board to
cuit foil. When holes are the slotted type, the following technique prevent excessive component temperatures.
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique Circuit Board Foil Repair
as outlined in paragraphs 5 and 6 above. Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
Removal board causing the foil to separate from or "lift-off" the board. The
1. Desolder and straighten each IC lead in one operation by following guidelines and procedures should be followed when-
gently prying up on the lead with the soldering iron tip as the ever this condition is encountered.
solder melts.
2. Draw away the melted solder with an anti-static suction-type At IC Connections
solder removal device (or with solder braid) before removing To repair a defective copper pattern at IC connections use the
the IC. following procedure to install a jumper wire on the copper pattern
Replacement side of the circuit board. (Use this technique only on IC connec-
1. Carefully insert the replacement IC in the circuit board. tions).
2. Carefully bend each IC lead against the circuit foil pad and
solder it. 1. Carefully remove the damaged copper pattern with a sharp
3. Clean the soldered areas with a small wire-bristle brush. knife. (Remove only as much copper as absolutely necessary).
(It is not necessary to reapply acrylic coating to the areas). 2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
"Small-Signal" Discrete Transistor 3. Bend a small "U" in one end of a small gauge jumper wire and
Removal/Replacement carefully crimp it around the IC pin. Solder the IC connection.
1. Remove the defective transistor by clipping its leads as close 4. Route the jumper wire along the path of the out-away copper
as possible to the component body. pattern and let it overlap the previously scraped end of the
2. Bend into a "U" shape the end of each of three leads remain- good copper pattern. Solder the overlapped area and clip off
ing on the circuit board. any excess jumper wire.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding At Other Connections
leads extending from the circuit board and crimp the "U" with Use the following technique to repair the defective copper pattern
long nose pliers to insure metal to metal contact then solder at connections other than IC Pins. This technique involves the
each connection. installation of a jumper wire on the component side of the circuit
board.
Power Output, Transistor Device
Removal/Replacement 1. Remove the defective copper pattern with a sharp knife.
1. Heat and remove all solder from around the transistor leads. Remove at least 1/4 inch of copper, to ensure that a hazardous
2. Remove the heat sink mounting screw (if so equipped). condition will not exist if the jumper wire opens.
3. Carefully remove the transistor from the heat sink of the circuit 2. Trace along the copper pattern from both sides of the pattern
board. break and locate the nearest component that is directly con-
4. Insert new transistor in the circuit board. nected to the affected copper pattern.
5. Solder each transistor lead, and clip off excess lead. 3. Connect insulated 20-gauge jumper wire from the lead of the
6. Replace heat sink. nearest component on one side of the pattern break to the
lead of the nearest component on the other side.
Diode Removal/Replacement Carefully crimp and solder the connections.
1. Remove defective diode by clipping its leads as close as pos- CAUTION: Be sure the insulated jumper wire is dressed so the
sible to diode body. it does not touch components or sharp edges.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and
if necessary, apply additional solder.
Fuse and Conventional Resistor

Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range 3. Test method

This specification is applied to the LED TV used LB5GG (1) Performance: LGE TV test method followed
chassis. (2) Demanded other specification
- Safety : CE, IEC specification
- EMC : CE, IEC
2. Requirement for Test
Each part is tested as below without special appointment.
(1) Operating Temperature : 0 °C to 40 °C

(2) Operating Humidity : Less than 80 %
(3) Storage Temperature : -20 °C to 60 °C
(4) Storage Humidity : Less than 85 %
(5) Power Voltage
: Standard input voltage (AC 100-240 V~, 50/60 Hz)
* Standard Voltage of each products is marked by models.
(6) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
(7) The receiver must be operated for about 5 minutes prior to
the adjustment
4. Model General Specification

No. Item Specification Remarks
Asia, Oceania, Africa, Middle East
1 Market
(PAL/DVB Market)
(1) Digital TV
- DVB-T/T2
- DVB-C
- DVB-S/S2
2 Television system
(2) Analogue TV
PAL B/B, PAL B/G, PAL D/K, PAL-I
SECAM B/G, SECAM D/K
NTSC-M
3 Channel Storage ATV - 135 EA, DTV - 1000 EA
► DVB-T
- Guard Interval (Bitrate_Mbit/s): 1/4, 1/8, 1/16, 1/32
- Modulation : Code Rate
QPSK : 1/2, 2/3, 3/4, 5/6, 7/8
16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
► DVB-T2
- Guard Interval (Bitrate_Mbit/s) : 1/4, 1/8, 1/16, 1/32,
1/128, 19/128, 19/256
- Modulation : Code Rate
QPSK : 1/2, 2/5, 2/3, 3/4, 5/6
16-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
Analog : Upper Heterodyne
4 Receiving system 64-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
Digital : COFDM, QAM, QPSK
256-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
► DVB-C
- Symbolrate : 4.0Msymbols/s to 7.2Msymbols/s
- Modulation :
16QAM, 64-QAM, 128-QAM and 256-QAM
► DVB-S/S2
- symbolrate
DVB-S2 (8PSK / QPSK) : 2 ~ 45Msymbol/s
DVB-S (QPSK) : 2 ~ 45Msymbol/s
- viterbi
DVB-S mode : 1/2, 2/3, 3/4, 5/6, 7/8
DVB-S2 mode : 1/2, 2/3, 3/4, 3/5, 4/5, 5/6, 8/9, 9/10
5 Video Input RCA PAL, SECAM, NTSC 4 System : PAL, SECAM, NTSC, PAL60
No. Item Specification Remarks
6 Component Input Y/Cb/Cr, Y/Pb/Pr
Common port
7 AV Input CVBS
Antenna, AV&Component, HDMI1, HDMI2,
8 Head phone out
USB1, USB2
PC(HDMI Ver. 1.4)
9 HDMI Input HDMI1-DTV,HDMI2-DTV
Support HDCP
DVI Audio
10 Audio Input
Component & AV
11 SDPIF Out SPDIF Out
12 USB Input For My Media(Movie/Photo/Music List) and SVC
13 Ethernet (2EA) Ethernet connect Support only communication with Pro :Centrc Server
14 RS232C(1EA) Support Interactive mode
15 External Speaker Out Ext. Speaker out Stereo 1W / 8Ω, Fixed, Variable, Line Output
16 RTC(Real Time Clock) ± 3Sec/24Hrs
5. External Input Support Format

5.1. Component Video Input (Y, PB, PR)
No Resolution H-freq(kHz) V-freq(Hz) Proposed
1. 720×480i 15.73 59.94 SDTV, DVD 480i
2. 720×480i 15.73 60.00 SDTV, DVD 480i
3. 720×480p 31.47 59.94 480p
4. 720×480p 31.50 60.00 480p
5. 720×576i 15.62 50.00 SDTV, DVD 625 Line
6. 720×576p 31.25 50.00 HDTV 576p
7. 1280×720p 45.00 50.00 HDTV 720p
8. 1280×720p 44.96 59.94 HDTV 720p
9. 1280×720p 45.00 60.00 HDTV 720p
10. 1920×1080i 28.12 50.00 HDTV 1080i
11. 1920×1080i 33.72 59.94 HDTV 1080i
12. 1920×1080i 33.75 60.00 HDTV 1080i
13. 1920×1080p 56.25 50.00 HDTV 1080p
14. 1920×1080p 67.43 59.94 HDTV 1080p
15. 1920×1080p 67.5 60.00 HDTV 1080p
5.2. HDMI Input
(1) DTV mode
No Resolution H-freq(kHz) V-freq(Hz) Proposed Remarks
1. 640*480p 31.46 59.94 SDTV 480P
2. 648*480p 31.50 60.00 SDTV 480P
3. 720*480i 15.73 59.94 SDTV, DVD 480I(525I)
4. 720*480i 15.75 60.00 SDTV, DVD 480I(525I) Spec. out but display
5. 720*576i 15.62 50.00 SDTV, DVD 576I(625I) 50Hz
6. 720*480p 31.47 59.94 SDTV 480P
7. 720*480p 31.50 60.00 SDTV 480P
8. 720*576p 31.25 50.00 SDTV 576P
9. 1280*720p 37.50 50.00 HDTV 720P
10. 1280*720p 44.96 59.94 HDTV 720P
11. 1280*720p 45.00 60.00 HDTV 720P
12. 1920*1080i 28.12 50.00 HDTV 1080I
13. 1920*1080i 33.72 59.94 HDTV 1080I
14. 1920*1080i 33.75 60.00 HDTV 1080I
15. 1920*1080p 26.97 23.97 HDTV 1080P
16. 1920*1080p 27.00 24.00 HDTV 1080P
17. 1920*1080p 33.71 29.97 HDTV 1080P
18. 1920*1080p 33.75 30.00 HDTV 1080P
19. 1920*1080p 56.25 50.00 HDTV 1080P
20. 1920*1080p 67.43 59.94 HDTV 1080P
21. 1920*1080p 67.50 60.00 HDTV 1080P
(2) PC mode
No Resolution H-freq(kHz) V-freq(Hz) Proposed Remarks
1 640 x 350 @70Hz 31.46 70.09 EGA
2 720 x 400 @70Hz 31.46 70.08 DOS
3 640 x 480 @60Hz 31.46 59.94 VESA(VGA)
4 800 x 600 @60Hz 37.87 60.31 VESA(SVGA)
5 1024 x 768 @60Hz 48.36 60.00 VESA(XGA)
6 1152 x 864 @60Hz 54.34 60.05 VESA
7 1280 x 1024 @60Hz 63.98 60.02 VESA(SXGA) FHD only
8 1360 x 768 @60Hz 47.71 60.01 VESA(WXGA)
9 1920 x 1080 @60Hz 67.5 60.00 WUXGA(CEA 861D) FHD only
ADJUSTMENT INSTRUCTION
1. Application Range 3.2. LAN Inspection
This specification sheet is applied to all of the LED TV with 3.2.1. Equipment & Condition
LB5GG chassis. ▪ Each other connection to LAN Port of IP Hub and Jig
2. Designation
(1) Because this is not a hot chassis, it is not necessary to
use an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of
25 °C ± 5 °C of temperature and 65 % ± 10 % of relative
humidity if there is no specific designation.
3.2.2. LAN inspection solution
▪ LAN Port connection with PCB
(4) The input voltage of the receiver must keep AC 100-240
▪ Setting automatic IP
V~, 50/60 Hz.
(5) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over
15 °C.
In case of keeping module is in the circumstance of 0 °C, it

should be placed in the circumstance of above 15 °C for 2
hours.
In case of keeping module is in the circumstance of below

▪ If you want manual connection, enter Network connection at
-20 °C, it should be placed in the circumstance of above 15
MENU Mode of TV. Press Start connection key, then
°C for 3 hours.
Network will be connected.
[Caution]
When still image is displayed for a period of 20 minutes or
longer (Especially where W/B scale is strong. Digital pattern
13ch and/or Cross hatch pattern 09ch), there can some
afterimage in the black level area.
3. Automatic Adjustment
3.1. MAC address D/L , CI+ key D/L, Widevine
key D/L, ESN D/L, HDCP14/20 D/L
Connect: USB port
Communication Prot connection
▪ Com 1,2,3,4 and 115200(Baudrate)
Mode check: Online Only
▪ Check the test process:
DETECT → MAC → ESN → Widevine → CI → HDCP14 →
HDCP20 3.2.3. WIDEVINE key Inspection
▪ Play : Press Enter key - Confirm key input data at the "IN START" MENU Mode.
▪ Result : Ready, Test, OK or NG
▪ Printer Out (MAC Address Label)
3.3. LAN PORT INSPECTION(PING TEST) 3.5. CI+ Key checking method
Connect SET → LAN port == PC → LAN Port Check whether the key was downloaded or not at ‘In Start’
menu. (Refer to below).
SET PC
3.3.1. Equipment setting
(1) Play the LAN Port Test PROGRAM. => Check the Download to CI+ Key value in LGset.
(2) Input IP set up for an inspection to Test Program. 3.5.1. Check the method of CI+ Key value
*IP Number : 12.12.2.2 (1) Check the method on Instart menu
(2) Check the method of RS232C Command
3.3.2. LAN PORT inspection(PING TEST) 1) Into the main ass’y mode(RS232: aa 00 00)
(1) Play the LAN Port Test Program. CMD 1 CMD 2 Data 0
(2) Connect each other LAN Port Jack. A A 0 0
(3) Play Test (F9) button and confirm OK Message.
(4) Remove LAN cable. 2) Check the key download for transmitted command
(RS232: ci 00 10)
CMD 1 CMD 2 Data 0
C I 1 0
3) Result value
- Normally status for download : OKx
- Abnormally status for download : NGx
3.5.2. Check the method of CI+ key value(RS232)

1) Into the main ass’y mode(RS232: aa 00 00)
CMD 1 CMD 2 Data 0
3.4. Model name & Serial number Download A A 0 0
3.4.1. Model name & Serial number D/L 2) Check the mothed of CI+ key by command
▪ Press "P-ONLY" key of service remote control. (RS232: ci 00 20)
(Baud rate : 115200 bps)
▪ Connect RS-232C Signal to USB Cable to USB.
CMD 1 CMD 2 Data 0
▪ Write Serial number by use USB port. C I 2 0
▪ Must check the serial number at Instart menu.
3) Result value
i 01 OK 1d1852d21c1ed5dcx
3.4.2. Method & notice
CI+ Key Value
(1) Serial number D/L is using of scan equipment.
(2) Setting of scan equipment operated by Manufacturing
Technology Group.
(3) Serial number D/L must be conformed when it is produced
3.5. WIFI MAC ADDRESS CHECK
(1) Using RS232 Command
in production line, because serial number D/L is mandatory
by D-book 4.0. H-freq(kHz) V-freq.(Hz)
Transmission [A][I][][Set ID][][20][Cr] [O][K][X] or [NG]
* Manual Download (Model Name and Serial Number)
If the TV set is downloaded by OTA or service man, sometimes (2) Check the menu on in-start
model name or serial number is initialized.(Not always)
It is impossible to download by bar code scan, so It need
Manual download.
1) Press the "Instart" key of Adjustment remote control.
2) Go to the menu "7.Model Number D/L" like below photo.
3) Input the Factory model name(ex 55LF630V-ZA) or Serial
number like photo.
4) Check the model name Instart menu. → Factory name

displayed. (ex 55LF630V-ZA)
5) C heck the Diagnostics.(DTV country only) → Buyer
model displayed. (ex 55LF630V-ZA)
Copyright © LG Electronics. Inc. All rights reserved. - 10 - LGE Internal Use Only
4. Manual Adjustment 4.2. White Balance Adjustment
* ADC adjustment is not needed because of OTP(Auto ADC 4.2.1. Overview
adjustment) ▪ W/B adj. Objective & How-it-works
(1) Objective: To reduce each Panel's W/B deviation
4.1. EDID DATA (2) How-it-works : When R/G/B gain in the OSD is at 192, it
means the panel is at its Full Dynamic Range. In order to
4.1.1. 2D EDID prevent saturation of Full Dynamic range and data, one
of R/G/B is fixed at 192, and the other two is lowered to
find the desired value.
(3) Adjustment condition : normal temperature
1) Surrounding Temperature: 25 °C ± 5 °C
2) Warm-up time: About 5 Min
3) Surrounding Humidity: 20 % ~ 80 %
4) B efore White balance adjustment, Keep power on
status, don’t power off.
4.2.2. Adj. condition and cautionary items

(1) Lighting condition in surrounding area surrounding lighting
should be lower 10 lux, Try to isolate adj. area into dark
surrounding.
(2) Probe location: Color Analyzer (CA-210) probe should be
within 10 cm and perpendicular of the module surface.
(80°~ 100°)
▪ Reference
(3) Aging time
- HDMI1 ~ HDMI2
1) After Aging Start, Keep the Power ON status during 5
- In the data of EDID, bellows may be different by S/W or
Minutes.
Input mode.
2) In case of LCD, Back-light on should be checked using
ⓐ Product ID
no signal or Full-white pattern.
HEX EDID Table DDC Function
0001 0100 Analog 4.2.3. Equipment
(1) Color Analyzer: CA-210 (NCG: CH 9 / WCG: CH12 / LED:
0001 0100 Digital
CH14)
(2) Adjustment Computer(During auto adj., RS-232C protocol
ⓑ Serial No: Controlled on production line. is needed)
ⓒ Month, Year: Controlled on production line: (3) Adjustment Remote control
ex) Monthly : ‘01’ → ‘01’ (4) Video Signal Generator MSPG-925F 720p/204-Gray
Year : ‘2014’ → ‘18’ (Model: 217, Pattern: 49)
ⓓ Model Name(Hex): LGTV ▪ Color Analyzer Matrix should be calibrated using CS-1000.
Chassis MODEL NAME(HEX)
LB5GG 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 4.2.4. Equipment connection MAP
ⓔ Checksum(LG TV): Changeable by total EDID data. Color Analyzer
RS-232C
ⓔ2 Probe
ⓔ1
8bit Computer
USB to RS-232
RS-232C
HDMI1 40 1B or RS-232C
Pattern Generator
HDMI2 40 B Signal Source
* If TV internal pattern is used, not needed

ⓕ Vendor Specific(HDMI)
INPUT MODEL NAME(HEX)
HDMI1 67 03 0C 00 10 00 80 1E
HDMI2 67 03 0C 00 20 00 80 1E
4.2.5. Adj. Command (Protocol) 4.2.6. Adj. method
<Command Format> (1) Auto adj. method
START 6E A 50 A LEN A 03 A CMD A 00 A VAL A CS STOP 1) Set TV in adj. mode using P-ONLY key(or POWER ON
key).
- LEN: Number of Data Byte to be sent 2) Place optical probe on the center of the display
- CMD: Command - It need to check probe condition of zero calibration
- VAL: FOS Data value before adjustment.
- CS: Checksum of sent data 3) Connect RS-232C Cable.
- A: Acknowledge 4) Select mode in ADJ Program and begin adjustment.
Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX] 5) When WB adjustment is completed with OK message,
check adjustment status of pre-set mode(Cool, Medium,
▪ RS-232C Command used during auto-adjustment. Warm).
RS-232C Command 6) Remove probe and RS-232C.
Explanation ▪ W/B Adj. must begin as start command “wb 00 00” , and
[CMD ID DATA]
wb 00 00 Begin White Balance adjustment finish as end command “wb 00 ff”, and Adj. offset if need.
wb 00 10 Gain adjustment(internal white pattern)
(2) Manual adjustment. method
wb 00 1f Gain adjustment completed 1) Set TV in Adj. mode using POWER ON.
wb 00 20 Offset adjustment(internal white pattern) 2) Zero Calibrate the probe of Color Analyzer, then place it
wb 00 2f Offset adjustment completed on the center of LCD module within 10 cm of the surface.
End White Balance adjustment 3) Press ADJ key → EZ adjust using adj. R/C → 11. White-
wb 00 ff Balance then press the cursor to the right(key ►).
(internal pattern disappears )
When right key(►) is pressed 204 Gray internal pattern
Ex) wb 00 00 → Begin white balance auto-adj. will be displayed.
wb 00 10 → Gain adj. 4) Adjust Cool modes
ja 00 ff → Adj. data - Fix the one of R/G/B gain to 192 (default data) and
jb 00 c0 decrease the others. (If G gain is adjusted over 172
... and R and B gain less than 192 , Adjust is O.K.)
... - If G gain is less than 172, Increase G gain by up to
wb 00 1f → Gain adj. completed 172, and then increase R gain and G gain same
*(wb 00 20(Start), wb 00 2f(end)) → Off-set adj. amount of increasing G gain.
wb 00 ff → End white balance auto-adj. - If R gain or B gain is over 255, Readjust G gain less
than 172, Conform to R gain is 255 or B gain is 255
▪ Adj. Map 5) Adjust two modes(Medium / Warm) Fix the one of R/G/B
Command Data Range gain to 192(default data) and decrease the others.
Adj. item 6) Adj. is completed, Exit adjust mode using “EXIT” key on
(lower caseASCII) (Hex.)
CMD1 CMD2 MIN MAX Remote control.
R Gain j g 00 C0
▪ Adjustment condition and cautionary items
G Gain j h 00 C0
1) Lighting condition in surrounding area
B Gain j i 00 C0 Surrounding lighting should be lower 10 lux. Try to isolate
Cool
R Cut adj. area into dark surrounding.
G Cut 2) Probe location
B Cut : Color Analyzer(CA-210) probe should be within 10 cm and
R Gain j a 00 C0 perpendicular of the module surface (80° ~ 100°)
G Gain j b 00 C0
B Gain j c 00 C0
Medium
R Cut
G Cut
B Cut
R Gain j d 00 C0
G Gain j e 00 C0
Warm B Gain j f 00 C0
R Cut
G Cut
4.2.7. Reference (White balance Adj. coordinate and O/S Module(INX, AUO, Sharp, CSOT, BOE)
color temperature) (Cool Mode Spec : 13000 K)
▪ Luminance : 204 Gray Cool Medium Warm
▪ Standard color coordinate and temperature using CS-1000 x y x y x y
(over 26 inch) spec 271 270 286 289 313 329
Coordinate target 278 280 293 299 320 339
Mode Temp ∆uv
x y
Cool 0.271 0.270 13,000 K 0.0000 4.3. Magic Motion remote controller Check
- R esults are automatically marked in Instart OSD after
Medium 0.286 0.289 9,300 K 0.0000
through the AP/Magic Remocontrol Equipment on the line
Warm 0.313 0.329 6,500 K 0.0000
▪ Standard color coordinate and temperature using CA-210

(CH 14)
Coordinate
Mode Temp ∆uv
x y
Cool 0.271 ± 0.002 0.270 ± 0.002 13,000 K 0.0000
Medium 0.286 ± 0.002 0.289 ± 0.002 9,300 K 0.0000
Warm 0.313 ± 0.002 0.329 ± 0.002 6,500 K 0.0000
4.2.8. LED White balance table 4.4. HDMI ARC Function Inspection
▪ E dge LED module change color coordinate because of 4.4.1. Test equipment
aging time - Optic Receiver Speaker
▪ apply under the color coordinate table, for compensated - MSHG-600 (SW: 1220 ↑)
aging time - HDMI Cable (for 1.4 version)
Only march to December.
(normal line) LGD Module
4.4.2. Test method
Aging Cool Medium Warm (1) Insert the HDMI Cable to the HDMI ARC port from the
time(Min) X y x y x y master equipment(HDMI1).
Target 271 270 286 289 313 329
1 0-2 282 289 297 308 324 348
2 3-5 281 287 296 306 323 346
3 6-9 279 284 294 303 321 343
4 10-19 277 280 292 299 319 339
5 20-35 275 277 290 296 317 336
6 36-49 274 274 289 293 316 333
7 50-79 273 272 288 291 315 331 (2) Check the sound from the TV Set.
8 80-119 272 271 287 290 314 330
9 Over 120 271 270 286 289 313 329
Only January to Febuary.

(normal line) LGD Module
Aging Cool Medium Warm
time(Min) X y x y x y
(3) Check the Sound from the Speaker or using AV & Optic
Target 271 270 286 289 313 329 TEST program. (It’s connected to MSHG-600)
1 0-5 286 295 301 314 328 354
2 6-10 284 290 299 309 326 349
3 11-20 282 287 297 306 324 346
4 21-30 279 283 294 302 321 342
5 31-40 276 278 291 297 318 337
6 41-50 274 275 289 294 316 334
7 51-80 273 272 288 291 315 331
* Remark: Inspect in Power Only Mode and check SW version
8 81-119 272 271 287 290 314 330 in a master equipment
9 Over 120 271 270 286 289 313 329
4.5. EYE-Q Green Function Inspection Step 4) The system finds any AP like blow PIC. well.
Step 1) Turn on the TV.
Step 2) Press 'EYE' key on the adjustment remote-control.
Step 3) Cover 'Eye Q sensor' on the front of set with your
hands, hold it for 6 seconds.
Step 4) Check "the Sensor Data" on the screen, make certain
that Data is below 10. If Data isn’t below 10 in 6
seconds, Eye Q sensor would be bad. You should
change Eye Q sensor.
Step 5) Uncover your hands from Eye Q sensor, hold it for 6
seconds.
Step 6) Check "Back Light (xxx)" on the screen, check data
increase . You should change Eye Q sensor.
Step 5) Select the AP you want to connect.
4.7. LNB voltage and 22KHz tone check

(only for DVB-S/S2 model)
4.6. Wi-Fi Test (1) Test method
Commercial TV is network setting menu in Installer Menu 1) Set TV in Adj. mode using POWER ON.
(Hotel Mode) 2) Connect cable between satellite ANT and test JIG.
Step 1) Turn on TV 3) P ress Yellow Key (ETC+SWAP) in Adj Remocon to
Step 2) Select Wi-Fi Connection option in Network Menu. make LNB on.
4) Check LED light ‘ON’ at 18V menu.
5) Check LED light ‘ON’ at 22KHz tone menu.
6) Press Blue Key (ETC+PIP INPUT) in Adj Remote control
to make LNB off.
7) Check LED light ‘OFF’ at 18 V menu.
8) Check LED light ‘OFF’ at 22 KHz tone menu.
(2) Test result

1) After press LNB On key, ‘18 V LED’ and ‘22 KHz tone
LED’ should be ON.
2) After press LNB OFF key, ‘18 V LED’ and ‘22 KHz tone
LED’ should be OFF.
Step 3) Click Off Button to On in Wi-Fi Connection. 4.8 Option selection per country
(1) Overview
▪ Option selection is only done for models in Non-EU
(2) Method
1) Press ADJ key on the Adj. R/C, then select Country
Group Meun.
2) Select Country Group Code 04 or Country Group EU.
5. Tool option selection and Ship-out 7. USB S/W Download(Service only)
(1) Put the USB Stick to the USB socket.
mode and GND/Hi-pot check (2) Go to General menu then enter to About This TV.
5.1. Tool Option selection
▪ Method: Press Adj. key on the Adj. R/C, then select Tool
option.
5.2. Ship-out mode check (In-stop)

▪ After final inspection, press In-Stop key of the Adj. R/C and
check that the unit goes to Stand-by mode.
5.3. GND and Hi-pot auto-check

5.3.1. Method
(1) GND & Hi-pot auto-check preparation
- Check that Power Cord is fully inserted to the SET. (If
loose, re-insert)
(2) Perform GND & Hi-pot auto-check
- Unit fully inserted Power cord, Antenna cable and A/V (3) Enter the USB EXPERT MODE.
arrive to the auto-check process.
- Connect D-terminal to AV JACK TESTER
- Auto CONTROLLER(GWS103-4) ON
- Perform GND TEST
- If NG, Buzzer will sound to inform the operator.
- If OK, changeover to I/P check automatically.
(Remove CORD, A/V form AV JACK BOX)
- Perform I/P test
- If NG, Buzzer will sound to inform the operator.
- If OK, Good lamp will lit up and the stopper will allow the
pallet to move on to next process.
5.3.2. Checkpoint
▪ TEST voltage
1) DQA Test
- GND: AC 1.5 KV/1 min, Cut off current not exceed 100 mA
- SIGNAL: AC 3 KV/1 min, Cut off current not exceed 100 mA
2) Mass Production Line Test
- GND : AC 1.5 KV/1 sec, Cut off current not exceed 100 mA
▪ TEST time: 1 second (4) Updating is starting.
▪ TEST POINT (5) Updating completed, the TV will restart automatically
- GND TEST = POWER CORD GND & SIGNAL CABLE (6) If your TV is turned on, check your updated version and
METAL GND Tool option. (explain the Tool option, next stage)
- Hi-pot TEST = POWER CORD GND & LIVE & NEUTRAL * If downloading version is more new than your TV have,
▪ LEAKAGE CURRENT: At 0.5 mArms TV can lost all channel data. In this case, you have to
channel recover. if all channel data is cleared, you didn’t
have a DTV/ATV test on production line.
6. Audio * After downloading, have to adjust Tool Option again.

No. Item Min Typ Max Unit Remark (1) Push "IN-START" key in service remote control.
Audio practical 9 10 12 (2) Select "Tool Option 1" and push "OK" key.
W
max Output, L/R 4.5 5 6 (3) Punch in the number. (Each model has their number)
1. EQ Off
(Distortion=10 % 8.10 10.8
max Output) Vrms AVL Off
5.5 6
Clear Voice Off
Speaker (6 Ω 9 10 12
2. W
Impedance) 4.5 5 6
Measurement condition:
1) RF input: Mono, 1KHz sine wave signal, 100% Modulation
2) CVBS, Component: 1KHz sine wave signal 0.5Vrms
8. Check Commercial features 8.2.2. DC Power Outlet Equipment & Condition
▪ Simple Jig (commercial check JIG)
8.1. External SPK Out
#1
(1) Connect JIG for inspection to RS-232C port on TV as

below.
(2) Enter the Configuration Setup mode in pressing Remote
8.1.1. Equipment & Condition control keys.
▪ Jig (Speaker out JIG) or Oscilloscope
T he method to enter Configuration Setup mode :
IN-START → MENU → Configuration Setup → OK
8.1.2. Check the speaker out 1) Select 5 V DC Power Outlet and change the setting : No
(1) Connect external speaker to speaker out port with phone → Yes. After that, check LED color in JIG.(LED #1)
jack on TV side as below. 2) After checking 5 V DC Power Outlet, change the setting
(2) Check the Max. speaker output is 1W or not. Sine wave : Yes → No.
with 1KHz will be displayed. 3) P lease check 12 V DC Power Outlet in the same
(3) Press Vol. control button up/down in turns and check the procedure.
Button of Vol. control Waveform of Oscilloscope 8.2.3. Pro:Idiom Check

(1) Connect the RF Cable(PAL B/G)
UP(+) (2) Turn to the Pro:Idiom channel (No. 333)
(3) Check the video & sound
DOWN(-) ** Only displayed at “POWER ONLY” mode
waveform of Oscilloscope.
8.2. IR Out and DC Power Outlet (5V/12V)

8.2.1. Equipment & Condition
▪ Simple Jig (commercial check JIG)
#1
▪ Power only mode

(1) C onnect each other RS232C port on the Commercial
Check JIG.
(2) Press any key on SVC Remote-control.
(3) Check the LED status of the Check JIG.
- IR LED(OK condition: blinking) (LED #1)
TROUBLE SHOOTING GUIDE
1. Power-Up Boot Fail
N N
Check P2300 All Check power connector and
Replace Power Board
Voltage Level (13.5V) RL_ON signal OK ?
Y Y
N
Check Q2302 output Voltage Check Q2302 application circuit
(13.5V) Or replace Q2302
Y
N
Check LVDS Cable Replace Cable
Check LCD Module

Control board
2. No OSD
N N
Check P2300 All Check power connector and
Replace Power Board
Voltage Level (13.5V) RL_ON signal OK ?
Y
N
Check IC8700 RESET pin Check switch SW8700.
Check X8701 Clock N Check X8701 application circuit

10MHz or Replace X8701
Check IC8700 IIC N

Check IIC line or replace IC8700
Communication status
Check IR input state of IC8700 N

Check IR board
13pin
Re-download NEC Micom
3. Analog RF Video
First of all, Check whether all of cables between board is inserted properly or not.
(Main B/D↔ Power B/D, LVDS Cable, Speaker Cable, IR B/D Cable,,,)
N
Check RF Cable
Reconnection
Connection
Y
N N
Check tuner 3.3V power L6500 Check IC2300 Replace IC2300
Y Y
Check tuner 1.2V power IC6700 N

Replace IC6700
6pin : 1.2V
Y
N
Check LG1311 LVDS output Replace IC101
4. Digital RF
Check RF cable & signal
Y
N N
Check tuner 3.3V power L6500 Check IC2300 Replace IC2300
Check IIC Signal N

Replace TU6702
TU6702 Pin#4,5
Check IF Signal N
Replace TU6702
TU6702 Pin#6,7
Check X101 N
Replace X101
and application circuit
Replace IC101
5. AV Video
Check input signal format.
Is it supported?
Check AC cable for damage

For damage or open conductor
Check JK4600 N
Replace JK4600
Can you see the normal waveform?
Check the input of LG1311(IC101).

Measure waveform at C326 because it’s more easy to check.
This board has big problem because Main chip (LG1311, IC101) have some troubles.
After checking thoroughly all path once again, You should decide to replace Main IC or not.
6. HDMI Video
Is it supported?

Check JK3202/JK3203 N
Replace JK3202, JK3203
Y
N
Check HDCP key on INSTART Menu Re-download HDCP Key
Check the input of LG1311 (IC101).

Measure waveform at AR3200, AR3202 because it’s more easy to check.
This board has big problem because Main chip(LG1311, IC101) have some troubles.
7. Analog RF Audio
Check RF cable & signal
N
Check TU6702 Pin 6, 7 Replace Tuner
Check Audio AMP output N

Replace L5602,L5603,L5604,L5605
L5602,L5603,L5604,L5605
Y
N
Check IC5600 Replace IC5600
Replace IC101
8. AV Audio in
Is it supported?

Check JK4600 N
Replace JK4600
Check the input of LG1311(IC101).

Measure waveform at C314, C319 because it’s more easy to check.

Replace L5602,L5603,L5604,L5605
L5602,L5603,L5604,L5605
9. HDMI Audio in
Is it supported?

Check JK3202/JK3203 N
Replace JK3202/JK3203

L5602,L5603,L5604,L5605
Replace L5602,L5603,L5604,L5605
Copyright ©
SYSTEM Tuner
DDR3 X 4
EMMC 2Gb(2ea) SYSTEM
(4GB) 4Gb(2ea) EEPROM X 1
I2C
(128KbX8BIT)
Side
(Side) USB2

(Side) USB1 USB
Internal CVBS Demod. IF
(Side) CI Slot Demod. SIF
(Side) H/P
IC101
(Side) HDMI2 M14+
LG Electronics. Inc. All rights reserved.

(ARC) HDMI1
RGB PC
Data_TS
TS_MUX
Wi-Fi Combo
Y, Pb, Pr, CVBS, L/ R
Component & AV
- 22 -
Serial
(Common port) Pro:idiom
Parellel
To Magic WOL Serial
MICOM Ethernet
MICOM Realtek WOL Parellel
LAN MPI / SPI

Ethernet
BLOCK DIAGRAM
Service Only
AUX HUB IC MICOM Upgrade
UART S/W
LAN (Tx/Rx) MICOM
Service
SPDIF SPDIF UART (Tx/Rx) CPU Upgrade
Ext. SPK Line Out Ext. Speaker R/L Ext SPK

L/R OUT IR&Key
AMP
MICOM
EEPROM X 1
Ext. SPK Vol. conrol
(64Kb)
Audio
Speaker AMP LVDS
32/40 inch : 60Hz

43/49/55 inch : T120Hz
LGE Internal Use Only

EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
LV1
200
400
800
820 521
540
530
810
121 410
120
570
500
A2 A9 A10
910
Stand Base
+ Set + Stand 900
Stand Body
System Configuration
Clock for M14 NVRAM Write Protection

- Low : Normal Operation IC101
- High : Write Protection +3.3V_NORMAL LG1311-C1
+3.5V_ST
MAIN Clock(24Mhz)
X-TAL_1
C101 10pF IC104 +3.5V_ST

GND_1
R123 B23 AN9

XTAL_IN R110 AT24CM01-SSHM-T 10K XTAL_IN XIN_MAIN USB2_0_DP0 WIFI_DP
4.7K A23 AM9
OPT
OPT XTAL_OUT XO_MAIN USB2_0_DM0
AN8
WIFI_DM
R109
R169 USB2_0_TXRTUNE
2
R118
0 NC VCC
AG21
24MHz
1 8 1% 200 R171
X101
1M
SOC_RESET PORES_N
OPT C107 H32
A1 WP 0.1uF 33
AJ18
USB2_1_DP0
J31
USB_DP3
2 7
3
R180 16V C108 BOOT_MODE BOOT_MODE USB2_1_DM0

H33
USB_DM3
R111 A0 0.1uF
X-TAL_2
GND_2
10pF 560 USB2_1_TXRTUNE

0 A2 SCL R112 33 16V
XTAL_OUT 3 6 SCL_NVRAM
AB8 1% 200 R172
C102 PLLSET0 AC8
PLLSET0
N31
GND SDA R113 33 PLLSET1 PLLSET1 USB3_DP0
N32
4 5 SDA_NVRAM USB3_DM0
AD8 P33
OPM0 AE8
OPM0 USB3_TXP0
P32
System Clock for Analog block(24Mhz) OPM1 OPM1 USB3_TXM0
M32
USB3_RXP0
R176 33 Y7 M33
L/DIM0_VS R177 33 Y6
L_VSOUT_LD/TRST0_N USB3_RXM0
P31
L/DIM0_SCLK W7
DIM0_SCLK/TMS0 USB3_RESREF0
DIM1_SCLK/TCK0
SoC & DDR Speed W6 K33
R178 33 W5
DIM1_MOSI/TDI0 USB3_DP1
K32
USB_DP2
L/DIM0_MOSI USB_DM2
PLL SET[1:0] : internal pull up
"00" : CPU(1200Mhz),M0 / M1 DDR(792,792 Mhz)
NVRAM I2C SWITCH AG30
DIM0_MOSI/TDO0 USB3_DM1
USB3_TXP1
L32
L31
SPI_CS0 USB3_TXM1
"01" : CPU(1056Mhz),M0 / M1 DDR(672,672 Mhz) AG28 K31
"10" : CPU(1056Mhz),M0 / M1 DDR(792,792 Mhz) SPI_SCLK0 USB3_RXP1
AG29 J32
"11" : CPU( 960Mhz),M0 / M1 DDR(792,792 Mhz) SPI_DO0 USB3_RXM1
AH29 M31
EEPROM_SW CONNECTION TRST_N1 AJ27
SPI_DI0/TRST1_N USB3_RESREF1
1% 200 R174
L B0 - A NVRAM - NEC TMS1 AH27
SPI_CS1/TMS1
W28
Extenal test only
H B1 - A NVRAM - M14 TCK1 AG26
SPI_SCLK1/TCK1 HUB_PORT_OVER0
W29
OPT TDO1 AH26
SPI_DO1/TDO1 HUB_VBUS_CTRL0
R103 3.3K
PLLSET1
TDI1 SPI_DI1/TDI1
H28
R104 3.3K R182 OPT10K AJ12
EB_CS3
J30
/USB_OCD2
OPT
PLLSET0
R183 10K AJ13
EXT_INTR0 EB_CS2
J28
USB_CTL2
R184 10K AH12
EXT_INTR1 EB_CS1
J29
/USB_OCD3
EEPROM_SW
R185 10K AG12
EXT_INTR2 EB_CS0 USB_CTL3
IC105 EXT_INTR3
NLASB3157DFT2G G30
AH23
EB_WE_N
F30
EB_WE_N
SOC_RX AG22
UART0_RXD EB_OE_N
H29
EB_OE_N
+3.5V_ST
SELECT B1 SOC_TX AH7
UART0_TXD EB_WAIT
G29
6 1 I2C_SCL5
AJ7
UART1_RXD EB_BE_N1
G28
EB_BE_N1
+3.5V_ST
ON SEMICONDUCTOR
ANALOG SWITCH
UART1_TXD EB_BE_N0 EB_BE_N0
VCC GND
5 2 AG8 P28
OP MODE[1:0] R114 UART1_RTS_N CAM_CD1_N CAM_CD1_N
C103 2.7K AH8 P27
"00" : Normal Mode
"01/10/11" : Internal Test mode
0.1uF A B0 UART1_CTS_N CAM_CD2_N
U28
CAM_CD2_N
4 3
SCL_NVRAM NEC_EEPROM_SCL
AH11
CAM_CE1_N
R29
/PCM_CE1
+3.3V_NORMAL EAN38256201
I2C_SCL1 AG11
SCL0 CAM_CE2_N
V27
/PCM_CE2
OPT
I2C_SDA1 AH9
SDA0 CAM_IREQ_N
T28
CAM_IREQ_N
R101 3.3K I2C_SCL3 AG9
SCL1 CAM_RESET
T29
PCM_RESET TP104 EB_WE_N
OPM1 I2C_SDA3 AG10
SDA1 CAM_INPACK_N
R28
CAM_INPACK_N TP105 EB_OE_N
R102 3.3K
OPM0
I2C_SCL2 AJ9
SCL2 CAM_VCCEN_N
U27
PCM_5V_CTL
OPT IC106 I2C_SDA2 SDA2 CAM_WAIT_N CAM_WAIT_N TP106 EB_BE_N1
AH22 N29
Extenal test only
NLASB3157DFT2G I2C_SCL4 SCL3 CAM_REG_N CAM_REG_N TP107 EB_BE_N0
AJ22
I2C_SDA4 R119 33 AH10
SDA3
SELECT B1 I2C_SCL5 SCL4 TP108 CAM_CD1_N
6 1 R120 33 AJ10 K30 EB_ADDR[0] CAM_CD2_N
I2C_SDA5 I2C_SDA5 AG23
SDA4 EB_ADDR0
E30 EB_ADDR[1]
TP109
ON SEMICONDUCTOR
ANALOG SWITCH
+3.5V_ST I2C_SCL6 AH24
SCL5 EB_ADDR1
M30 EB_ADDR[2] TP110 /PCM_CE1
VCC GND
+3.3V_NORMAL +3.3V_NORMAL 5 2 I2C_SDA6 SDA5 EB_ADDR2
N28 EB_ADDR[3] TP111 /PCM_CE2
C104 R115 AC6
EB_ADDR3
M28 EB_ADDR[4] TP112 CAM_IREQ_N
0.1uF A B0 2.7K PWM0 EB_ADDR4 TP113 PCM_RESET
INSTANT boot MODE BOOT MODE R107 33 AC7 M29 EB_ADDR[5]
4 3
SDA_NVRAM NEC_EEPROM_SDA PWM_DIM2 PWM1 EB_ADDR5 CAM_INPACK_N
3.3K
"1 : Instant boot "0 : EMMC TP114

3.3K
33 AD7 L29 EB_ADDR[6]

R127
R108
R121
R179
OPT
OPT
"0 : normal "1 : TEST MODE PWM_DIM

EAN38256201 10K AB7
PWM2 EB_ADDR6
K29 EB_ADDR[7] TP115 PCM_5V_CTL
(internal pull down)
PWM_IN EB_ADDR7
K28 EB_ADDR[8] TP116 CAM_WAIT_N
1/16W
INSTANT_BOOT BOOT_MODE 5%
EB_ADDR8
L28 EB_ADDR[9] TP117 CAM_REG_N
EB_ADDR9
3.3K
G32 D30 EB_ADDR[10]

R128
EMMC_CLK G33
EMMC_CLK EB_ADDR10
F29 EB_ADDR[11]
EMMC_CMD G31
EMMC_CMD EB_ADDR11
C32 EB_ADDR[12]
EMMC_RST EMMC_RESETN EB_ADDR12
EB_ADDR[13]
EMMC_DATA[7] D31 C33
EMMC_DATA7 EB_ADDR13
EMMC_DATA[6] F33 C31 EB_ADDR[14]
EMMC_DATA[5] F32 B33
INSTANT_MODE0 BOOT_MODE0 EMMC_DATA[4] E32
TP102 EB_ADDR[0-14]
EMMC_DATA4
EMMC_DATA[3] F31
EMMC_DATA3
EMMC_DATA[2] D33
EMMC_DATA2 EB_DATA0
B32 EB_DATA[0] EB_ADDR[0-14]
EMMC_DATA[1] D32 A32 EB_DATA[1]
EMMC_DATA1 EB_DATA1
EMMC_DATA[0] E31 B31 EB_DATA[2]
EMMC_DATA0 EB_DATA2
A31 EB_DATA[3]
EB_DATA3
A30 EB_DATA[4]
EB_DATA4
EMMC_DATA[0-7] B30 EB_DATA[5]
I2C PULL UP EB_DATA5
C30 EB_DATA[6]
EB_DATA6
C29 EB_DATA[7]
I2C EB_DATA7
TP103 EB_DATA[0-7]
+3.3V_NORMAL EB_DATA[0-7]
I2C_1 : AMP
I2C_2 : T-CON,L/DIMING,EYE SENSOR
I2C_3 : Pro:Idiom, MICOM
+3.3V_NORMAL +3.3V_NORMAL +3.3V_NORMAL I2C_4 : S/Demod,T2/Demod, LNB
I2C_5 : NVRAM
I2C_6 : TUNER_MOPLL(T/C,ATV) Jtag-1 I/F
+3.3V_NORMAL
R157
3.3K
R158
3.3K
R161
3.3K
R162
3.3K
KR_PIP_NOT
R159
3.3K
R160
3.3K
KR_PIP_NOT
KR_PIP_NOT
KR_PIP_NOT
P104
R146
3.3K
R148
3.3K
R149
3.3K
R150
3.3K
R155
1.2K
R156
1.2K
I2C_SDA1 12505WS-10A00
OPT
I2C_SCL1
R155-*1 3.3K
R156-*1 3.3K
I2C_SDA2
R146-*1 1.5K
R148-*1 1.5K
1
I2C_SCL2 TRST_N1
KR_PIP
KR_PIP
KR_PIP
KR_PIP
I2C_SDA3 2
TDI1
I2C_SCL3
3
TDO1
I2C_SDA4 4
TMS1
I2C_SCL4
5
TCK1
I2C_SDA5 6
SOC_RESET
I2C_SCL5
7
I2C_SDA6 8
I2C_SCL6
9
AR101
0
SDA_SoC_Micom I2C_SDA3 10
SCL_SoC_Micom I2C_SCL3
11
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS xxLX761H-ZA 2015.02.02
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. M14-Peripheral 1 29
M14-Peripheral
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
[M14 -> CI / Pro:Idiom] RF Parallel Out
[RF Tuner -> M14] RF Parallel In
IC101 TPO_CLK
LG1311-C1 TPO_SOP BIT [6/7] EU/CIS AJJA TAIWAN/COL CHINA/HONG KOREA NORTH AMERICA BRAZIL JAPAN
FE_DEMOD1_TS_CLK
TPO_VAL
FE_DEMOD1_TS_SYNC 0 / 0 T/C T/C T/C Default ATSC NIM+T2 Default(ATV_EXT) ISDB PIP Default
TPO_ERR
FE_DEMOD1_TS_VAL <0 / 1> T2/C/S2/ATV_EXT T2/C/ATV_EXT T2/C PIP Half NIM+T2(ATV_EXT) Default(ATV_EXT) ISDB
FE_DEMOD1_TS_ERROR AH30
TP_DVB_CLK TPIO_CLK
D28 TPO_ERR
AH32 E29 1 / 0 T2/C T2/C/ATV_SOC T2/C Half NIM(ATV_INT) ATV_INTERNAL
FE_DEMOD1_TS_DATA[0-7] AH31
TP_DVB_SOP TPIO_SOP
E28
TPO_DATA[0-7] 1 / 1 T2/C/S2/ATV_SOC T2/C/S2 ATSC PIP
TP_DVB_VAL TPIO_VAL
AH33 F28
TP_DVB_ERR TPIO_ERR
FE_DEMOD1_TS_DATA[7] AM33 D27 TPO_DATA[0]
FE_DEMOD1_TS_DATA[6] AL32
TP_DVB_DATA7 TPIO_DATA0
E27 TPO_DATA[1]
+3.3V_NORMAL
FE_DEMOD1_TS_DATA[5] AL33 F27 TPO_DATA[2]
FE_DEMOD1_TS_DATA[4]
AK32
AK33
TP_DVB_DATA4
TP_DVB_DATA3
TPIO_DATA3
TPIO_DATA4
E26
F26
TPO_DATA[3]
TPO_DATA[4]
Model Option
FE_DEMOD1_TS_DATA[2] AK31 E25 TPO_DATA[5]
FE_DEMOD1_TS_DATA[1] AJ30 D25 TPO_DATA[6]
NON_EXTERNAL_EDID
FE_DEMOD1_TS_DATA[0] AJ31 F25 TPO_DATA[7]
ODT_55_ohm
DDR3_1.5GB
AL31 AA5
TPI_CLK
DDR3_DDP
10K
STPI0_CLK EPI_SOE
10K
10K
SS_DDR
10K
BIT4_1
DDR_3G
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
AN32 AB5
BIT0_1
BIT3_1
BIT1_1
BIT2_1
BIT6_1
BIT7_1
BIT5_1
TPI_SOP STPI0_SOP EPI_MCLK
[Pro:Idiom -> M14] IP Sereal In AM32 AA7
TPI_VAL OPT 0 AN31
STPI0_VAL EPI_GCLK
AA6
R234
STPI0_ERR EPI_EO
AM31 AB6
R229
R221
R237
R227
TPI_DATA[0]
R201
R203
R205
R207
R209
R211
R213
R215
R217
R219
STPI0_DATA EPI_VST
AH28
STPI1_CLK
AJ28 AK8
TS_S_OUT_CLK AK30
STPI1_SOP TX_0N
AL8
TXB4N/TX0N
[M14 -> Pro:Idiom] IP Serial Out TS_S_OUT_SYNC OPT 0 AJ29
STPI1_VAL TX_0P
AK7
TXB4P/TX0P
R235
TS_S_OUT_VAL AG27
STPI1_ERR TX_1N
AL7
TXB3N/TX1N
TS_S_OUT_DATA STPI1_DATA TX_1P TXB3P/TX1P BIT0
AM6
A28
TX_2N
AN6
TXBCLKN/TX2N BIT1
TPI_CLK B28
TPI_CLK TX_2P
AK6
TXBCLKP/TX2P MODEL_OPT_11
TPI_SOP TPI_SOP TX_3N TXB2N/TX3N BIT2
B29 AL6
TPI_DATA[0-7] TPI_VAL TPI_VAL TX_3P TXB2P/TX3P MODEL_OPT_12
R236 0 C28 AK5 BIT3
OPT
TPI_ERR TX_4N TXB1N/TX4N
TPI_DATA[0] A27 AL5
BIT4 MODEL_OPT_13
TPI_DATA0 TX_4P TXB1P/TX4P
TPI_DATA[1] B27 AN4
TPI_DATA1 TX_5N TXB0N/TX5N BIT5
TPI_DATA[2] C27 AN3
TPI_DATA2 TX_5P TXB0P/TX5P
[CI / Pro:Idiom -> M14] RF Parallel In TPI_DATA[3] B26 AM2
BIT6
TPI_DATA3 TX_6N TXA4N/TX6N
TPI_DATA[4] C26 AM1
TPI_DATA4 TX_6P TXA4P/TX6P BIT7
TPI_DATA[5] B25 AM4
TPI_DATA5 TX_7N TXA3N/TX7N
TPI_DATA[6] A25 AM3
MODEL_OPT_8
TPI_DATA6 TX_7P TXA3P/TX7P
TPI_DATA[7] C25 AL4
TPI_DATA7 TX_8N TXACLKN/TX8N
TX_8P
AL3
TXACLKP/TX8P HD LVDS MODEL_OPT_9
AG13 AK2
MODEL_OPT_11 GPIO31 TX_9N TXA2N/TX9N MODEL_OPT_10
AJ19 AK1
DDR3_NON_DDP
SC_DET GPIO30 TX_9P TXA2P/TX9P
NON_DDR_3G
AG14 AK4
ODT_46_ohm
DDR3_2GB
HP_DET TXA1N/TX10N
EXTERNAL_EDID
GPIO29 TX_10N
NON_SS_DDR
10K
AG15 AK3
10K
10K
2D/3D_CTL TXA1P/TX10P
10K
BIT0_0
BIT3_0
BIT1_0
10K
10K
10K
10K
10K
10K
10K
10K
10K
GPIO28 TX_10P
BIT2_0
BIT4_0
BIT6_0
BIT7_0
10K
BIT5_0
R225 33 AJ15 AJ4
TP_SWITCH2 AH19
GPIO27 TX_11N
AJ3
TXA0N/TX11N
/TU_RESET1 AH18
GPIO26 TX_11P
AH2
TXA0P/TX11P
R220
R222
R218
TP_SWITCH GPIO25 TX_12N
R204
R206
R208
R210
R212
R214
R216
R230
R238
R228
R202
AG19 AH1
BT_RESET AH5
GPIO24 TX_12P
AH4
SOC_NEC_TX AJ5
GPIO23 TX_13N
AH3
SOC_NEC_RX AJ6
GPIO22 TX_13P
AG4
OPC_EN AH6
GPIO21 TX_14N
AG3
DEBUG AG6
GPIO20 TX_14P
AF2
INSTANT_BOOT AG5
GPIO19 TX_15N
AF1
AMP_RESET_N AF7
GPIO18 TX_15P
AF4
WARM_MODE AG7
GPIO17 TX_16N
AF3
EXT_SPK_DET AG24
GPIO16 TX_16P
AE4
MODEL_OPT_12 AH16
GPIO15 TX_17N
AE3
BIT0 V29
GPIO14 TX_17P
AD2 AREA OPTION BACK-END OPTION
EXT_SPK_VOL+ AJ21
GPIO13 TX_18N
AD1
EXT_SPK_VOL- GPIO12 TX_18P
AV_CVBS_DET
AH21
GPIO11 TX_19N
AD4 +3.3V_NORMAL
V28 AD3
MODEL_OPT_13 AG16
GPIO10 TX_19P
AC4
BIT1 GPIO9 TX_20N BIT [0/1] ATSC JP BIT[2/3/4/5] TYPE FHD FRC PANEL TYPE LOW HIGH
AJ24 AC3 DVB
BIT2 AH17
GPIO8 TX_20P
AB2 0 / 0 TAIWAN/COLOM N/AMERICA 0 / 0 / 0 / 0 EPI FHD, 120Hz, V14 (8 lane) MODEL_OPT_8 DDR3 <NON_DDP> DDP
BIT3 AG17
GPIO7 TX_21N
AB1 0 / 0 / 0 / 1
3.3K
0 / 1 CHINA/HONGKONG KOREA JAPAN EPI FHD, 120Hz, v14_32inch (6 lane)

BIT4
R223
GPIO6 TX_21P MODEL_OPT_9 DDR3 2GB <1.5GB>

AH13 AB4 SW201 EU/CIS S/AMERCIA/PH 0 / 0 / 1 / 0 EPI FHD, 120Hz, V13 (6 lane)
BIT5 AH15
GPIO5 TX_22N
AB3 JTP-1127WEM
<1 / 0>
FOR UD <NON_DDR3 3G> DDR3 3G
MODEL_OPT_10
BIT6 AG18
GPIO4 TX_22P
AA4 2 1 1 / 1 ASIA/AFRICA Sri Lanka 0 / 0 / 1 / 1 EPI FHD, 120Hz, V12 (6 lane)
BIT7 AH14
GPIO3 TX_23N
AA3 0 / 1 / 0 / 0 EPI FHD, 60Hz, V14_32 inch (6lane) Support
MODEL_OPT_8 AJ16
GPIO2 TX_23P 4 3 0 / 1 / 0 / 1 LVDS FHD, 120Hz
MODEL_OPT_11 EXTERNAL EDID EXTERNAL <NON_EXTERNAL>
DEBUG FOR HDMI2.0
MODEL_OPT_9 AH20
GPIO1
AM8 <0 / 1 / 1 / 0> LVDS FHD, 60Hz
MODEL_OPT_10 GPIO0 TX_LOCKN DEBUG MODEL_OPT_12 SS_DDR <NON_SS_DDR> SS_DDR
0 / 1 / 1 / 1 LVDS HD, 60Hz
MODEL_OPT_13 ODT <ODT_46_ohm> ODT_55_ohm
For ISP 1 / 0 / 0 / 0 LVDS FHD, 60Hz, CP BOX
1 / 0 / 0 / 1 LVDS HD, 60Hz SMALL SMART MODEL_OPT_14 Reserved
1 / 0 / 1 / 0 Vby1 FHD, 120Hz OLED MODEL_OPT_15 Reserved
1 / 0 / 1 / 1 LVDS FHD 120Hz OLED
1 / 1 / 0 / 0 ** MODEL_OPT_14/15 is ready for only consumer model
1 / 1 / 0 / 1
1 / 1 / 1 / 0
1 / 1 / 1 / 1

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. M14-Display In/Out 2 29
M14-Display In/Out
PLACE AT JACK SIDE IC101
LG1311-C1
Place JACK Side Place SOC Side
AL27 E22
TU_CVBS_SOC CVBS_IN1 SD_CLK SMARTCARD_CLK/SD_EMMC_DATA[0]
AK26 D22
SC_CVBS_IN_SOC CVBS_IN2 SD_CMD SMARTCARD_RST/SD_EMMC_DATA[2]
AM27 F22
AV1_CVBS_IN_SOC CVBS_IN3 SD_CD_N SMARTCARD_VCC/SD_EMMC_CMD
TP308 SC_CVBS_IN_SOC TP318 SCART_LOUT_SOC F24
SD_WP_N SMARTCARD_PWR_SEL/SD_EMMC_DATA[1]
TP310 SC_FB_SOC TP319 SCART_ROUT_SOC R356 68 C343 0.047uF AL26 D24
DDR3_OPT1
CVBS_VCM SD_DATA3
E24
TP311 SC_ID_SOC TP320 DTV/MNT_V_OUT_SOC SD_DATA2 DDR3_OPT2
R353 EU 0 AN27 F23
DTV/MNT_V_OUT_SOC BUF_OUT1 SD_DATA1 SMARTCARD_DET/SD_EMMC_DATA[3]
TP312 COMP1_PB_IN_SOC C339 R11031 10K E23
OPT SD_DATA0 SMARTCARD_DATA/SD_EMMC_CLK
TP313 COMP1_Y_IN_SOC 100pF OPT AL25
50V SC_ID_SOC SC1_SID
AM25 AK14
TP314 COMP1_Y_IN_SOC_SOY SC_FB_SOC SC1_FB RMII_REF_CLK EPHY_REFCLK
R11032 10K AK12
TP315 COMP1_PR_IN_SOC OPT AN23
RMII_CRS_DV
AL12
EPHY_CRS_DV
COMP1_Y_IN_SOC_SOY SOY1_IN RMII_MDIO EPHY_MDIO
TP316 AUAD_L_CH2_IN AL22 AK13
COMP1_Y_IN_SOC Y1_IN RMII_MDC EPHY_MDC
AK21 AL13
TP317 AUAD_R_CH2_IN COMP1_PB_IN_SOC PB1_IN RMII_TXEN EPHY_EN
AK22 AM13
COMP1_PR_IN_SOC PR1_IN RMII_TXD1 EPHY_TXD1
AN13
SMARTCARD_DATA/SD_EMMC_CLK RMII_TXD0 EPHY_TXD0
TP302 AL24 AL14 R315 33
SMARTCARD_VCC/SD_EMMC_CMD COMP2_Y_IN_SOC_SOY SOY2_IN RMII_RXD1 EPHY_RXD1
TP303 AK23 AK15 R316 33
SMARTCARD_DET/SD_EMMC_DATA[3] COMP2_Y_IN_SOC Y2_IN RMII_RXD0 EPHY_RXD0
TP304
R333 33 C322 0.047uF COMP TP305 SMARTCARD_RST/SD_EMMC_DATA[2] COMP2_PB_IN_SOC
AL23
AK24
PB2_IN
AE27
5V_HDMI_1
COMP1_Pb COMP2_PB_IN_SOC COMP2_PR_IN_SOC PR2_IN HDMI_1_SCL DDC_SCL_1
TP306 SMARTCARD_PWR_SEL/SD_EMMC_DATA[1] AF28
DDC_SDA_1 R372
TP307 SMARTCARD_CLK/SD_EMMC_DATA[0] HDMI_1_SDA 10
R357 68 C344 0.047uF AL21 AE29
ADC1_COM HDMI_1_HPD HDMI_HPD_1
R335 33 R358 68 C345 0.047uF AM23 AF27
C324 0.047uF AVDD25 ADC2_COM HDMI_1_5V_DET
COMP1_Pr COMP2_PR_IN_SOC R359 68 C346 0.047uF AN25 AE28
R318 1% 75
R326 1% 75
ADC3_COM HDMI_1_ARC SPDIF_OUT_ARC C356

R376
1uF
BLM15BD121SN1 10V 5.1K
AM21 AF33
1005
1005
AVSS25_COMP_REF HDMI_1_RX_0 D0+_HDMI1

L305 C349 AN21 AF32
L304 0.1uF AVDD25_COMP_REF HDMI_1_RX_0B D0-_HDMI1
BLM15BD121SN1 AE31
16V D1+_HDMI1
Placed as close as possible to LG1311 AK16
HDMI_1_RX_1
AE30
SCART_LOUT_SOC AUDA_SCART_OUTL HDMI_1_RX_1B D1-_HDMI1
AL16 AD31
SCART_ROUT_SOC AUDA_SCART_OUTR HDMI_1_RX_2 D2+_HDMI1
22K
22K
AD30
Tuner IF Filter EU EU AR301 HDMI_1_RX_2B D2-_HDMI1
C334 C336 0 AL19 AF31
AUAD_L_CH1_IN HDMI_1_RX_C CK+_HDMI1
EU
EU
0.01uF 0.01uF EU AK19 AF30
TU_ALL_2178B TU_ALL_2178B 50V AUAD_R_CH1_IN HDMI_1_RX_CB CK-_HDMI1
R329 100 C318 0.047uF 50V AN19
R351
R352
TU_CVBS TU_CVBS_SOC TU_ALL_IntDemod TU_ALL_IntDemod AUAD_L_CH2_IN AUAD_L_CH2_IN
AM19 AD28
C303 R344 C332 AUAD_R_CH2_IN AUAD_R_CH2_IN HDMI_2_SCL
150pF AN17 AD29
ADC_I_INN IF_N AUAD_L_CH3_IN AUAD_L_CH3_IN HDMI_2_SDA
50V 51 0.01uF AM17 AC27
OPT AUAD_R_CH3_IN AUAD_R_CH3_IN HDMI_2_HPD
TU_ALL_IntDemod C331 AL17 AD27
L303 AUAD_L_CH4_IN HDMI_2_5V_DET
To ADC 15pF AK17
50V OPT AUAD_R_CH4_IN
AC31
R345 C333 HDMI_2_RX_0
AK20 AC30
ADC_I_INP IF_P AUDA_OUTL AUDA_OUTL HDMI_2_RX_0B
51 0.01uF AL20 AB33
AUDA_OUTR AUDA_OUTR HDMI_2_RX_1
TU_ALL_IntDemod TU_ALL_IntDemod AB32
HDMI_2_RX_1B
AK18 AA31
AUAD_R_REF AUAD_L_REF HDMI_2_RX_2
C331 option AL18 AA30
AUAD_L_REF AUAD_R_REF HDMI_2_RX_2B
- TU_IntDemod_IF_22p -> EU/AJ All_IndDemod, US/KR/BR/TW/CO 2tuner All C347 10uF 10V AD32
- TU_IntDemod_IF_15p -> US/KR/BR/TW/CO 1tuner All HDMI_2_RX_C
C348 2.2uF AN15 AD33
10V AUD_VBG_EXT HDMI_2_RX_CB
AUDIO IN R360 33 AM15 AB28
SPDIF_OUT IEC958OUT HDMI_3_SCL
MAIN I2S_I/F
AB27
Placed as close as possible to IC101 AVDD25 R365 OPT 100 AN11
HDMI_3_SDA
AB29
AUDCLK_OUT HDMI_3_HPD
R309 27K C316 4.7uF R366 100 AK11 AC28
COMP1/AV1/DVI_L_IN 1%
AUAD_L_CH3_IN L307
AUD_LRCH
C342 AK10
DAC_LRCH HDMI_3_5V_DET
R322 10K 22pF DAC_SLRCH
OPT AL10 Y32
120-ohm DAC_CLFCH HDMI_3_RX_0
R374 R368 100 AL11 Y33
1% AUD_SCK DAC_SCK HDMI_3_RX_0B
R310 27K C317 4.7uF 51K 100 AM11 W31
R369
COMP1/AV1/DVI_R_IN AUAD_R_CH3_IN 1% C354 AUD_LRCK DAC_LRCK HDMI_3_RX_1
R387
R388
GOOGLE
GOOGLE
R380 10uF C335 C337 W30
1% R323 10K AUAD_L_REF 51K 22pF 33pF HDMI_3_RX_1B
10V R386 AD5 V33
1% OPT OPT I2S_AMP GOOGLE
PCMI3LRCH HDMI_3_RX_2
1% R378 C313 AE5 V32
47K 4.7uF PCMI3LRCK HDMI_3_RX_2B
AE7 Y31
1% 10V PCMI3SCK HDMI_3_RX_C
AE6 Y30
AUDCLK_IN HDMI_3_RX_CB
C312 0.1uF
AUAD_R_REF TU_SIF_TU AD6 Y27 5V_HDMI_4
TU_ALL_2178B FRC_LRSYNC HDMI_4_SCL DDC_SCL_4
C309 AA28
R381 C353 1000pF DDC_SDA_4
HDMI_4_SDA
47K 4.7uF 50V AK29 Y28 R375
TU_ALL_IntDemod AAD_ADC_SIF HDMI_4_CBUS_HPD HDMI_HPD_4
1% 10V OPT C351 0.1uF AL29 AA29 10
R350 AAD_ADC_SIFM HDMI_4_CD_SENSE MHL_DET
AM29 AA27
IF_AGC IFAGC HDMI_4_5V_DET
470 R395 C359
C338 0 AK27 T31 R379
1uF
0.47uF DMD_DAC_OUT HDMI_4_RX_0 D0+_HDMI4 5.1K
AL30 T30 10V
6.3V OPT DMD_SIF_OUT HDMI_4_RX_0B D0-_HDMI4
T32
HDMI_4_RX_1 D1+_HDMI4
AK28 T33
DDR3 VENDOR OPTION Close to IC101
ADC_I_INP
AL28
DMD_ADC_INP HDMI_4_RX_1B
R31
D1-_HDMI4
ADC_I_INN DMD_ADC_INN HDMI_4_RX_2 D2+_HDMI4
C352 0.1uF AN29 R30
DMD_ADC_INCOM HDMI_4_RX_2B D2-_HDMI4
U31
+3.3V_NORMAL HDMI_4_RX_C
U30
CK+_HDMI4
HDMI_4_RX_CB CK-_HDMI4
4.7K
4.7K
R382
R384
DDR3_OPT1
DDR3_OPT2
4.7K
4.7K
OPT
OPT
R383
R385
AUDIO OUT
R311 0
HP_LOUT/Ext_LOUT AUDA_OUTL
R303
C305
22K
0.01uF
50V
R312 0
HP_ROUT/Ext_ROUT AUDA_OUTR
C306
R304
22K
0.01uF
50V

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. M14-AV In/Out 3 29
M14-AV In/Out
M0_DDR_VREFCA M0_1_DDR_VREFCA
IC401 IC402
H5TQ4G63AFR-PBC H5TQ4G63AFR-PBC
M0_DDR_VREFDQ M0_1_DDR_VREFDQ
DDR3 DDR3
N3
A0
4Gbit M8 N3
4Gbit M8
VREF_M0_0 M0_DDR_A0 VREFCA M0_DDR_A0 A0 VREFCA
IC101 +1.5V_DDR VREF_M0_0 +1.5V_DDR VREF_M0_1 P7 (x16) P7
M0_DDR_A1 A1 M0_DDR_A1 A1 (x16)
LG1311-C1 P3 DDR_512MB_HYNIX_1600_29n P3 DDR_512MB_HYNIX_1600_29n
M0_DDR_A2 A2 M0_DDR_A2 A2
VREF_M0_1 N2 H1 N2 H1
R402 R415 M0_DDR_A3 A3 VREFDQ M0_DDR_A3 A3 VREFDQ
1K 1K P8 P8
1% 1%
M0_DDR_A4 A4 +1.5V_DDR M0_DDR_A4 A4 +1.5V_DDR
P2 P2
A22 M0_DDR_A5 A5 R418 M0_DDR_A5 A5 R419
M0_DDR_VREF1 R8 L8 R8 L8
A3 M0_DDR_A6 A6 ZQ M0_DDR_A6 A6 ZQ
M0_DDR_VREF2 R2 240 R2 240
T8 1% T8 1%
E13 R403 C401 R416 C408 M0_DDR_A8 A8 M0_DDR_A8 A8
M0_DDR_A0 M0_DDR_A0 1K 0.1uF 1K 0.1uF R3 B2 R3 B2
E11 M0_DDR_A9 A9 VDD_1 M0_DDR_A9 A9 VDD_1
M0_DDR_A1 M0_DDR_A1 1% OPT 1% OPT L7 D9 L7 D9
E15 M0_DDR_A10 A10/AP VDD_2 M0_DDR_A10 A10/AP VDD_2
M0_DDR_A2 M0_DDR_A2 R7 G7 R7 G7
M0_DDR_A3 M0_DDR_A3 N7 K2 N7 K2
D8 M0_DDR_A12 A12/BC VDD_4 M0_DDR_A12 A12/BC VDD_4
M0_DDR_A4 M0_DDR_A4 T3 K8 T3 K8
D16 M0_DDR_A13 A13 VDD_5 M0_DDR_A13 A13 VDD_5
M0_DDR_A5 M0_DDR_A5 T7 N1 T7 N1
D9 M0_DDR_A14 A14 VDD_6 M0_DDR_A14 A14 VDD_6
M0_DDR_A6 M0_DDR_A6 M7 N9 M7 N9
M0_DDR_A7 M0_DDR_A7 R1 R1
E9 VDD_8 VDD_8
M0_DDR_A8 M0_DDR_A8 M2 R9 M2 R9
E14 M0_DDR_BA0 BA0 VDD_9 M0_DDR_BA0 BA0 VDD_9
M0_DDR_A9 M0_DDR_A9 N8 N8
D7 M0_DDR_BA1 BA1 M0_DDR_BA1 BA1
M0_DDR_A10 M0_DDR_A10 M3 M3
D10 M0_DDR_BA2 BA2 M0_DDR_BA2 BA2
M0_DDR_A11 M0_DDR_A11 A1 A1
D11 +1.5V_DDR VDDQ_1 VDDQ_1
M0_DDR_A12 M0_DDR_A12 M0_DDR_CKE J7
CK
A8 J7 A8
D14 M0_D_CLK VDDQ_2 M0_U_CLK CK VDDQ_2
M0_DDR_A13 M0_DDR_A13 K7 C1 K7 C1
E10 M0_D_CLKN CK VDDQ_3 M0_U_CLKN CK VDDQ_3
M0_DDR_A14 M0_DDR_A14 R417 K9 C9 K9 C9
E12 M0_DDR_CKE CKE VDDQ_4 M0_DDR_CKE CKE VDDQ_4
M0_DDR_A15 M0_DDR_A15 10K D2 D2
R404 VDDQ_5 VDDQ_5
L2 E9 L2 E9
OPT
D17 10K CS VDDQ_6 CS VDDQ_6

M0_DDR_BA0 M0_DDR_BA0 K1 F1 K1 F1
E8 M0_DDR_ODT ODT VDDQ_7 M0_DDR_ODT ODT VDDQ_7
M0_DDR_BA1 M0_DDR_BA1 J3 H2 C413 1uF J3 H2
D13 M0_DDR_RESET_N M0_DDR_RASN RAS VDDQ_8 M0_DDR_RASN RAS VDDQ_8
M0_DDR_BA2 M0_DDR_BA2 K3 H9 C414 1uF K3 H9
M0_DDR_CASN CAS VDDQ_9 M0_DDR_CASN CAS VDDQ_9
L3 L3
C8 M0_DDR_WEN WE M0_DDR_WEN WE
M0_DDR_U_CLKP M0_U_CLK J1 J1
B8 NC_1 NC_1
M0_DDR_U_CLKN M0_U_CLKN T2 J9 T2 J9
C17 M0_DDR_RESET_N RESET NC_2 M0_DDR_RESET_N RESET NC_2
M0_DDR_D_CLKP M0_D_CLK L1 L1
B17 NC_3 NC_3
M0_DDR_D_CLKN M0_D_CLKN L9 L9
D12 M0_D_CLK M0_U_CLK NC_4 NC_4
M0_DDR_CKE M0_DDR_CKE F3 F3
M0_DDR_DQS0 DQSL M0_DDR_DQS2 DQSL
G3 G3
E19 R405 M0_DDR_DQS_N0 DQSL M0_DDR_DQS_N2 DQSL
M0_DDR_ODT R410
M0_DDR_ODT 100
D19 100
M0_DDR_RASN M0_DDR_RASN C7 A9 C7 A9
D18 M0_DDR_DQS1 DQSU VSS_1 M0_DDR_DQS3 DQSU VSS_1
M0_DDR_CASN M0_DDR_CASN B7 B3 B7 B3
E18 M0_D_CLKN M0_U_CLKN M0_DDR_DQS_N1 DQSU VSS_2 M0_DDR_DQS_N3 DQSU VSS_2
M0_DDR_WEN M0_DDR_WEN E1 E1
VSS_3 VSS_3
E7 G8 E7 G8
D15 M0_DDR_DM0 DML VSS_4 M0_DDR_DM2 DML VSS_4
M0_DDR_RESET_N M0_DDR_RESET_N D3 J2 D3 J2
M0_DDR_DM1 DMU VSS_5 M0_DDR_DM3 DMU VSS_5
J8 J8
B18 VSS_6 VSS_6 C429 1uF
M0_DDR_DQS_P0 M0_DDR_DQS0 E3 M1 E3 M1
C18 M0_DDR_DQ0 DQL0 VSS_7 M0_DDR_DQ16 DQL0 VSS_7 C430 1uF
M0_DDR_DQS_N0 M0_DDR_DQS_N0 F7 M9 F7 M9
B16 M0_DDR_DQ1 DQL1 VSS_8 M0_DDR_DQ17 DQL1 VSS_8
M0_DDR_DQS_P1 M0_DDR_DQS1 F2 P1 F2 P1
A16 M0_DDR_DQ2 DQL2 VSS_9 M0_DDR_DQ18 DQL2 VSS_9
M0_DDR_DQS_N1 M0_DDR_DQS_N1 F8 P9 F8 P9
B9 +1.5V_DDR +1.5V_DDR M0_DDR_DQ3 DQL3 VSS_10 M0_DDR_DQ19 DQL3 VSS_10
M0_DDR_DQS_P2 M0_DDR_DQS2 H3 T1 H3 T1
C9 M0_DDR_DQ4 DQL4 VSS_11 M0_DDR_DQ20 DQL4 VSS_11
M0_DDR_DQS_N2 M0_DDR_DQS_N2 H8 T9 H8 T9
B7 M0_DDR_DQ5 DQL5 VSS_12 M0_DDR_DQ21 DQL5 VSS_12
M0_DDR_DQS_P3 M0_DDR_DQS3 M0_DDR_VREFCA M0_1_DDR_VREFCA G2 G2
A7 M0_DDR_DQ6 DQL6 M0_DDR_DQ22 DQL6
M0_DDR_DQS_N3 M0_DDR_DQS_N3 H7 H7
R411 M0_DDR_DQ7 DQL7 M0_DDR_DQ23 DQL7
R406 1K B1 B1
A15 1K VSSQ_1 VSSQ_1
M0_DDR_DM0 M0_DDR_DM0 1% D7 B9 D7 B9
A18 1% M0_DDR_DQ8 DQU0 VSSQ_2 M0_DDR_DQ24 DQU0 VSSQ_2
M0_DDR_DM1 M0_DDR_DM1 C3 D1 C3 D1
A6 M0_DDR_DQ9 DQU1 VSSQ_3 M0_DDR_DQ25 DQU1 VSSQ_3
M0_DDR_DM2 M0_DDR_DM2 C8 D8 C8 D8
A9 M0_DDR_DQ10 DQU2 VSSQ_4 M0_DDR_DQ26 DQU2 VSSQ_4
M0_DDR_DM3 M0_DDR_DM3 C2 E2 C2 E2
M0_DDR_DQ11 DQU3 VSSQ_5 M0_DDR_DQ27 DQU3 VSSQ_5
A7 E8 A7 E8
B20 R407 C402 R412 C406 M0_DDR_DQ12 DQU4 VSSQ_6 M0_DDR_DQ28 DQU4 VSSQ_6
M0_DDR_DQ0 M0_DDR_DQ0 A2 F9 A2 F9
B13 1K 0.1uF 1K 0.1uF M0_DDR_DQ13 DQU5 VSSQ_7 M0_DDR_DQ29 DQU5 VSSQ_7
M0_DDR_DQ1 M0_DDR_DQ1 1% 1% B8 G1 B8 G1
C21 M0_DDR_DQ14 DQU6 VSSQ_8 M0_DDR_DQ30 DQU6 VSSQ_8
M0_DDR_DQ2 M0_DDR_DQ2 A3 G9 A3 G9
C14 M0_DDR_DQ15 DQU7 VSSQ_9 M0_DDR_DQ31 DQU7 VSSQ_9
M0_DDR_DQ3 M0_DDR_DQ3
A21
A13
B21
C13
B14
B19
C15
C20
C16
A19
M0_DDR_DQ13 M0_DDR_DQ13 +1.5V_DDR +1.5V_DDR
B15
C19
B11 M0_1_DDR_VREFDQ
M0_DDR_DQ16 M0_DDR_DQ16 M0_DDR_VREFDQ
C5
C12 R408 R413
M0_DDR_DQ18 M0_DDR_DQ18 1K 1K
B4 1%
M0_DDR_DQ19 M0_DDR_DQ19 1%
A12
A4
B12
C4
B5 R409 C403 R414 C407
M0_DDR_DQ24
B10
M0_DDR_DQ24 1K 0.1uF 1K 0.1uF DDR3_512MB_MICRON_29nm_1600_14Y DDR3_512MB_HYNIX_25nm_1866_15Y DDR3_512MB_SS_25nm_1600_15Y DDR3_512MB_SS_25nm_1866_15Y
M0_DDR_DQ25 1% 1%
M0_DDR_DQ25
C6
C11
M0_DDR_DQ27 M0_DDR_DQ27 IC401-*2
H5TQ4G63CFR_RDC
IC402-*2
H5TQ4G63CFR_RDC
IC401-*3
K4B4G1646D-BCK0
IC402-*3
K4B4G1646D-BCK0
IC401-*4
K4B4G1646D-BCMA
IC402-*4
K4B4G1646D-BCMA
C7 IC401-*1
IC402-*1
MT41K256M16HA-125:E
M0_DDR_DQ28 M0_DDR_DQ28 MT41K256M16HA-125:E N3
DDR_512MB_HYNIX_1866_25n
M8 N3
DDR_512MB_HYNIX_1866_25n
M8 N3
DDR_512MB_SS_1600_25n
M8 N3
DDR_512MB_SS_1600_25n
M8 N3
DDR_512MB_SS_1866_25n
M8 N3
DDR_512MB_SS_1866_25n
M8
A10 DDR_512MB_MICRON N3
DDR_512MB_MICRON
M8
P7
P3
A0
A1
VREFCA
P7
P3
A0
A1
VREFCA
P7
P3
A0
A1
VREFCA
P7
P3
A0
A1
VREFCA
P7
P3
A0
A1
VREFCA
P7
P3
A0
A1
VREFCA
M0_DDR_DQ29 M0_DDR_DQ29 N3
P7
A0 VREFCA
M8 P7
P3
A0
A1
VREFCA
N2
A2
A3 VREFDQ
H1 N2
A2
A3 VREFDQ
H1 N2
A2
A3 VREFDQ
H1 N2
A2
A3 VREFDQ
H1 N2
A2
A3 VREFDQ
H1 N2
A2
A3 VREFDQ
H1
B6 P3
A1
A2
N2
A2
A3 VREFDQ
H1
P8
P2
A4
P8
P2
A4
P8
P2
A4
P8
P2
A4
P8
P2
A4
P8
P2
A4
M0_DDR_DQ30 M0_DDR_DQ30 N2
P8
A3
A4
VREFDQ
H1 P8
P2
A4 R8
R2
A5
A6 ZQ
L8 R8
R2
A5
A6 ZQ
L8 R8
R2
A5
A6 ZQ
L8 R8
R2
A5
A6 ZQ
L8 R8
R2
A5
A6 ZQ
L8 R8
R2
A5
A6 ZQ
L8
C10 P2
R8
A5
L8
R8
R2
A5
A6 ZQ
L8
T8
A7
A8
T8
A7
A8
T8
A7
A8
T8
A7
A8
T8
A7
A8
T8
A7
A8
M0_DDR_DQ31 M0_DDR_DQ31 R2
T8
A6
A7
ZQ
T8
R3
A7
A8
B2
R3
L7
A9
A10/AP
VDD_1
VDD_2
B2
D9
R3
L7
A9
A10/AP
VDD_1
VDD_2
B2
D9
R3
L7
A9
A10/AP
VDD_1
VDD_2
B2
D9
R3
L7
A9
A10/AP
VDD_1
VDD_2
B2
D9
R3
L7
A9
A10/AP
VDD_1
VDD_2
B2
D9
R3
L7
A9
A10/AP
VDD_1
VDD_2
B2
D9
A8 A9 VDD_1 R7 G7 R7 G7 R7 G7 R7 G7 R7 G7 R7 G7
R3 B2 L7 D9 A11 VDD_3 A11 VDD_3 A11 VDD_3 A11 VDD_3 A11 VDD_3 A11 VDD_3
A9 VDD_1 A10/AP VDD_2 N7 K2 N7 K2 N7 K2 N7 K2 N7 K2 N7 K2
L7 D9 R7 G7 A12/BC VDD_4 A12/BC VDD_4 A12/BC VDD_4 A12/BC VDD_4 A12/BC VDD_4 A12/BC VDD_4
A10/AP VDD_2 A11 VDD_3 T3 K8 T3 K8 T3 K8 T3 K8 T3 K8 T3 K8
R7 G7
E7 R401 240 N7
T3
A11
A12/BC
VDD_3
VDD_4
K2
K8
N7
T3
A12/BC
A13
VDD_4
VDD_5
K2
K8
T7
M7
A13
A14
NC_5
VDD_5
VDD_6
VDD_7
N1
N9
T7
M7
A13
A14
NC_5
VDD_5
VDD_6
VDD_7
N1
N9
T7
M7
A13
A14
A15
VDD_5
VDD_6
VDD_7
N1
N9
T7
M7
A13
A14
A15
VDD_5
VDD_6
VDD_7
N1
N9 M7
A13
NC_5
VDD_5
VDD_6
VDD_7
N1
N9 M7
A13
NC_5
VDD_5
VDD_6
VDD_7
N1
N9
N1
M0_DDR_ZQCAL M7
A13 VDD_5
VDD_6
N1
N9
M7
NC_5
VDD_6
VDD_7
N9
M2
VDD_8
R1
R9 M2
VDD_8
R1
R9 M2
VDD_8
R1
R9 M2
VDD_8
R1
R9 M2
VDD_8
R1
R9 M2
VDD_8
R1
R9
1% M2
NC_5 VDD_7
VDD_8
R1
R9
M2
BA0
VDD_8
VDD_9
R1
R9
N8
M3
BA0
BA1
BA2
VDD_9
N8
M3
BA0
BA1
BA2
VDD_9
N8
M3
BA0
BA1
BA2
VDD_9
N8
M3
BA0
BA1
BA2
VDD_9
N8
M3
BA0
BA1
BA2
VDD_9
N8
M3
BA0
BA1
BA2
VDD_9
N8
BA0 VDD_9 BA1 A1 A1 A1 A1 A1 A1
N8 M3 VDDQ_1 VDDQ_1 VDDQ_1 VDDQ_1 VDDQ_1 VDDQ_1
BA1 BA2 J7 A8 J7 A8 J7 A8 J7 A8 J7 A8 J7 A8
M3 A1 CK VDDQ_2 CK VDDQ_2 CK VDDQ_2 CK VDDQ_2 CK VDDQ_2 CK VDDQ_2
BA2 VDDQ_1 K7 C1 K7 C1 K7 C1 K7 C1 K7 C1 K7 C1
A1 J7 A8 CK VDDQ_3 CK VDDQ_3 CK VDDQ_3 CK VDDQ_3 CK VDDQ_3 CK VDDQ_3
VDDQ_1 CK VDDQ_2 K9 C9 K9 C9 K9 C9 K9 C9 K9 C9 K9 C9
J7 A8 K7 C1 CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4
CK VDDQ_2 CK VDDQ_3 D2 D2 D2 D2 D2 D2
K7 C1 K9 C9 VDDQ_5 VDDQ_5 VDDQ_5 VDDQ_5 VDDQ_5 VDDQ_5
CK VDDQ_3 CKE VDDQ_4 L2 E9 L2 E9 L2 E9 L2 E9 L2 E9 L2 E9
K9 C9 D2 CS VDDQ_6 CS VDDQ_6 CS VDDQ_6 CS VDDQ_6 CS VDDQ_6 CS VDDQ_6
CKE VDDQ_4 VDDQ_5 K1 F1 K1 F1 K1 F1 K1 F1 K1 F1 K1 F1
D2 L2 E9 ODT VDDQ_7 ODT VDDQ_7 ODT VDDQ_7 ODT VDDQ_7 ODT VDDQ_7 ODT VDDQ_7
VDDQ_5 CS VDDQ_6 J3 H2 J3 H2 J3 H2 J3 H2 J3 H2 J3 H2
L2 E9 K1 F1 RAS VDDQ_8 RAS VDDQ_8 RAS VDDQ_8 RAS VDDQ_8 RAS VDDQ_8 RAS VDDQ_8
CS VDDQ_6 ODT VDDQ_7 K3 H9 K3 H9 K3 H9 K3 H9 K3 H9 K3 H9
K1 F1 J3 H2 CAS VDDQ_9 CAS VDDQ_9 CAS VDDQ_9 CAS VDDQ_9 CAS VDDQ_9 CAS VDDQ_9
ODT VDDQ_7 RAS VDDQ_8 L3 L3 L3 L3 L3 L3
J3 H2 K3 H9 WE WE WE WE WE WE
RAS VDDQ_8 CAS VDDQ_9 J1 J1 J1 J1 J1 J1
K3 H9 L3 NC_1 NC_1 NC_1 NC_1 NC_1 NC_1
CAS VDDQ_9 WE T2 J9 T2 J9 T2 J9 T2 J9 T2 J9 T2 J9
L3 J1 RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2
WE NC_1 L1 L1 L1 L1 L1 L1
J1 T2 J9 NC_3 NC_3 NC_3 NC_3 NC_3 NC_3
NC_1 RESET NC_2 L9 L9 L9 L9 L9 L9
T2 J9 L1 NC_4 NC_4 NC_4 NC_4 NC_4 NC_4
RESET NC_2 NC_3 F3 F3 F3 F3 F3 T7 F3 T7
L1 L9 DQSL DQSL DQSL DQSL DQSL NC_6 DQSL NC_6
NC_3 NC_4 G3 G3 G3 G3 G3 G3
L9 F3 T7 DQSL DQSL DQSL DQSL DQSL DQSL
NC_4 DQSL A14
F3 T7 G3
DQSL A14 DQSL C7 A9 C7 A9 C7 A9 C7 A9 C7 A9 C7 A9
G3 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1
DQSL B7 B3 B7 B3 B7 B3 B7 B3 B7 B3 B7 B3
C7 A9 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2
DQSU VSS_1 E1 E1 E1 E1 E1 E1
C7 A9 B7 B3 VSS_3 VSS_3 VSS_3 VSS_3 VSS_3 VSS_3
DQSU VSS_1 DQSU VSS_2 E7 G8 E7 G8 E7 G8 E7 G8 E7 G8 E7 G8
B7 B3 E1 DML VSS_4 DML VSS_4 DML VSS_4 DML VSS_4 DML VSS_4 DML VSS_4
DQSU VSS_2 VSS_3 D3 J2 D3 J2 D3 J2 D3 J2 D3 J2 D3 J2
E1 E7 G8 DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5
VSS_3 DML VSS_4 J8 J8 J8 J8 J8 J8
E7 G8 D3 J2 VSS_6 VSS_6 VSS_6 VSS_6 VSS_6 VSS_6
DML VSS_4 DMU VSS_5 E3 M1 E3 M1 E3 M1 E3 M1 E3 M1 E3 M1
D3 J2 J8 DQL0 VSS_7 DQL0 VSS_7 DQL0 VSS_7 DQL0 VSS_7 DQL0 VSS_7 DQL0 VSS_7
DMU VSS_5 VSS_6 F7 M9 F7 M9 F7 M9 F7 M9 F7 M9 F7 M9
J8 E3 M1 DQL1 VSS_8 DQL1 VSS_8 DQL1 VSS_8 DQL1 VSS_8 DQL1 VSS_8 DQL1 VSS_8
VSS_6 DQ0 VSS_7 F2 P1 F2 P1 F2 P1 F2 P1 F2 P1 F2 P1
E3 M1 F7 M9 DQL2 VSS_9 DQL2 VSS_9 DQL2 VSS_9 DQL2 VSS_9 DQL2 VSS_9 DQL2 VSS_9
DQ0 VSS_7 DQ1 VSS_8 F8 P9 F8 P9 F8 P9 F8 P9 F8 P9 F8 P9
F7 M9 F2 P1 DQL3 VSS_10 DQL3 VSS_10 DQL3 VSS_10 DQL3 VSS_10 DQL3 VSS_10 DQL3 VSS_10
DQ1 VSS_8 DQ2 VSS_9 H3 T1 H3 T1 H3 T1 H3 T1 H3 T1 H3 T1
F2 P1 F8 P9 DQL4 VSS_11 DQL4 VSS_11 DQL4 VSS_11 DQL4 VSS_11 DQL4 VSS_11 DQL4 VSS_11
DQ2 VSS_9 DQ3 VSS_10 H8 T9 H8 T9 H8 T9 H8 T9 H8 T9 H8 T9
F8 P9 H3 T1 DQL5 VSS_12 DQL5 VSS_12 DQL5 VSS_12 DQL5 VSS_12 DQL5 VSS_12 DQL5 VSS_12
DQ3 VSS_10 DQ4 VSS_11 G2 G2 G2 G2 G2 G2
H3 T1 H8 T9 DQL6 DQL6 DQL6 DQL6 DQL6 DQL6
DQ4 VSS_11 DQ5 VSS_12 H7 H7 H7 H7 H7 H7
H8 T9 G2 DQL7 DQL7 DQL7 DQL7 DQL7 DQL7
DQ5 VSS_12 DQ6 B1 B1 B1 B1 B1 B1
G2 H7 VSSQ_1 VSSQ_1 VSSQ_1 VSSQ_1 VSSQ_1 VSSQ_1
DQ6 DQ7 D7 B9 D7 B9 D7 B9 D7 B9 D7 B9 D7 B9
H7 B1 DQU0 VSSQ_2 DQU0 VSSQ_2 DQU0 VSSQ_2 DQU0 VSSQ_2 DQU0 VSSQ_2 DQU0 VSSQ_2
DQ7 VSSQ_1 C3 D1 C3 D1 C3 D1 C3 D1 C3 D1 C3 D1
B1 D7 B9 DQU1 VSSQ_3 DQU1 VSSQ_3 DQU1 VSSQ_3 DQU1 VSSQ_3 DQU1 VSSQ_3 DQU1 VSSQ_3
VSSQ_1 DQ8 VSSQ_2 C8 D8 C8 D8 C8 D8 C8 D8 C8 D8 C8 D8
D7 B9 C3 D1 DQU2 VSSQ_4 DQU2 VSSQ_4 DQU2 VSSQ_4 DQU2 VSSQ_4 DQU2 VSSQ_4 DQU2 VSSQ_4
DQ8 VSSQ_2 DQ9 VSSQ_3 C2 E2 C2 E2 C2 E2 C2 E2 C2 E2 C2 E2
C3 D1 C8 D8 DQU3 VSSQ_5 DQU3 VSSQ_5 DQU3 VSSQ_5 DQU3 VSSQ_5 DQU3 VSSQ_5 DQU3 VSSQ_5
DQ9 VSSQ_3 DQ10 VSSQ_4 A7 E8 A7 E8 A7 E8 A7 E8 A7 E8 A7 E8
C8 D8 C2 E2 DQU4 VSSQ_6 DQU4 VSSQ_6 DQU4 VSSQ_6 DQU4 VSSQ_6 DQU4 VSSQ_6 DQU4 VSSQ_6
DQ10 VSSQ_4 DQ11 VSSQ_5 A2 F9 A2 F9 A2 F9 A2 F9 A2 F9 A2 F9
C2 E2 A7 E8 DQU5 VSSQ_7 DQU5 VSSQ_7 DQU5 VSSQ_7 DQU5 VSSQ_7 DQU5 VSSQ_7 DQU5 VSSQ_7
DQ11 VSSQ_5 DQ12 VSSQ_6 B8 G1 B8 G1 B8 G1 B8 G1 B8 G1 B8 G1
A7 E8 A2 F9 DQU6 VSSQ_8 DQU6 VSSQ_8 DQU6 VSSQ_8 DQU6 VSSQ_8 DQU6 VSSQ_8 DQU6 VSSQ_8
DQ12 VSSQ_6 DQ13 VSSQ_7 A3 G9 A3 G9 A3 G9 A3 G9 A3 G9 A3 G9
A2 F9 B8 G1 DQU7 VSSQ_9 DQU7 VSSQ_9 DQU7 VSSQ_9 DQU7 VSSQ_9 DQU7 VSSQ_9 DQU7 VSSQ_9
DQ13 VSSQ_7 DQ14 VSSQ_8
B8 G1 A3 G9
DQ14 VSSQ_8 DQ15 VSSQ_9
A3 G9
DQ15 VSSQ_9

M14-DDR3(MAIN) 4 29
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
VREF_M1_0
IC101
+1.5V_DDR +1.5V_DDR
LG1311-C1
VREF_M1_1
VREF_M1_0 VREF_M1_1
R508 R515
A2 1K 1K
M1_DDR_VREF1 1% 1%
Y1
M1_DDR_VREF2
M5
M1_DDR_A0 M1_DDR_A0
N5 R509 C501 R516 C506
M1_DDR_A1 M1_DDR_A1
K5 1K 0.1uF 1K 0.1uF
M1_DDR_A2 M1_DDR_A2 1% OPT 1% OPT
H5
M1_DDR_A3 M1_DDR_A3
T4
M1_DDR_A4 M1_DDR_A4
H4
M1_DDR_A5 M1_DDR_A5
R4
M1_DDR_A6 M1_DDR_A6
J5
M1_DDR_A7 M1_DDR_A7
T5
M1_DDR_A8 M1_DDR_A8
L5
M1_DDR_A9 M1_DDR_A9
U4 +1.5V_DDR
M1_DDR_A10 M1_DDR_A10 +1.5V_DDR 1_2Gbit : T7(NC_6)
P4
M1_DDR_A11 M1_DDR_A11
P5
M1_DDR_A12 4Gbit : T7(A14)
M1_DDR_A12
M1_DDR_A13
K4
M1_DDR_A13
IC501 IC502
R5 +1.5V_DDR M1_DDR_VREFCA M1_1_DDR_VREFCA
N4 M1_DDR_CKE H5TQ4G63AFR-PBC H5TQ4G63AFR-PBC
G4 R517 M1_DDR_VREFDQ M1_1_DDR_VREFDQ

M1_DDR_BA0 M1_DDR_BA0
U5
M1_DDR_BA1
10K
M1_DDR_A0
N3 DDR3 M8
M1_DDR_A0
N3 DDR3 M8
M1_DDR_BA1 R502 A0 VREFCA A0 VREFCA
OPT
M1_DDR_BA2
L4
M1_DDR_BA2 10K M1_DDR_A1
P7
A1
4Gbit M1_DDR_A1
P7
A1
4Gbit
P3 DDR_512MB_HYNIX_1600_29n P3 DDR_512MB_HYNIX_1600_29n
R3
M1_U_CLK
M1_DDR_RESET_N M1_DDR_A3
N2 H1
M1_DDR_A3
N2 H1
M1_DDR_U_CLKP A3 VREFDQ A3 VREFDQ
R2 P8 P8
M1_DDR_U_CLKN M1_U_CLKN M1_DDR_A4 A4 M1_DDR_A4 A4
F3 P2 P2
M1_DDR_D_CLKP M1_D_CLK M1_DDR_A5 A5 M1_DDR_A5 A5
F2 R8 L8 R518 240 R8 L8 R519 240
M1_DDR_D_CLKN M1_D_CLKN M1_DDR_A6 A6 ZQ M1_DDR_A6 A6 ZQ
M4 R2 R2
M1_DDR_CKE M1_DDR_CKE M1_DDR_A7 A7 M1_DDR_A7 A7
+1.5V_DDR
+1.5V_DDR
T8 T8
F5 R3 B2 R3 B2
M1_DDR_ODT M1_DDR_ODT M1_D_CLK M1_U_CLK M1_DDR_A9 A9 VDD_1 M1_DDR_A9 A9 VDD_1
: Place these caps near Memory

E4 L7 D9 L7 D9
: Place these caps near Memory

M1_DDR_RASN M1_DDR_RASN M1_DDR_A10 A10/AP VDD_2 M1_DDR_A10 A10/AP VDD_2
F4 R503 R7 G7 R7 G7
M1_DDR_CASN M1_DDR_CASN R510 M1_DDR_A11 A11 VDD_3 M1_DDR_A11 A11 VDD_3
G5 100 N7 K2 N7 K2
M1_DDR_WEN M1_DDR_WEN 100 M1_DDR_A12 A12/BC VDD_4 M1_DDR_A12 A12/BC VDD_4
T3 K8 T3 K8
M1_DDR_A13 A13 VDD_5 M1_DDR_A13 A13 VDD_5
J4 T7 N1 T7 N1
M1_DDR_RESET_N M1_DDR_RESET_N M1_D_CLKN M1_U_CLKN M1_DDR_A14 A14 VDD_6 M1_DDR_A14 A14 VDD_6
M7 N9 M7 N9
M1_DDR_A15 A15 VDD_7 M1_DDR_A15 A15 VDD_7
E2 R1 R1
M1_DDR_DQS0
DDR3 1.5V bypass Cap

M1_DDR_DQS_P0 VDD_8 VDD_8
E3 M2 R9 M2 R9
DDR3 1.5V bypass Cap

M1_DDR_DQS_N0 M1_DDR_DQS_N0 M1_DDR_BA0 BA0 VDD_9 M1_DDR_BA0 BA0 VDD_9
G2 N8 N8
M1_DDR_DQS_P1 M1_DDR_DQS1 M1_DDR_BA1 BA1 M1_DDR_BA1 BA1
G1 M3 M3
M1_DDR_DQS_N1 M1_DDR_DQS_N1 M1_DDR_BA2 BA2 M1_DDR_BA2 BA2
P2 A1 A1
M1_DDR_DQS_P2 M1_DDR_DQS2 VDDQ_1 VDDQ_1
P3
M1_DDR_DQS_N2
+1.5V_DDR +1.5V_DDR M1_D_CLK
J7 A8
M1_U_CLK
J7 A8
M1_DDR_DQS_N2 CK VDDQ_2 CK VDDQ_2
T2 K7 C1 K7 C1
M1_DDR_DQS_P3 M1_DDR_DQS3 M1_D_CLKN CK VDDQ_3 M1_U_CLKN CK VDDQ_3
T1 K9 C9 K9 C9
M1_DDR_DQS_N3 M1_DDR_DQS_N3 M1_DDR_VREFCA M1_1_DDR_VREFCA M1_DDR_CKE CKE VDDQ_4
D2
M1_DDR_CKE CKE VDDQ_4
D2
VDDQ_5 VDDQ_5
H1 L2 E9 L2 E9
M1_DDR_DM0 M1_DDR_DM0 R504 R511 CS VDDQ_6 CS VDDQ_6
E1 1K K1 F1 K1 F1
M1_DDR_DM1 M1_DDR_DM1 1K M1_DDR_ODT ODT VDDQ_7 M1_DDR_ODT ODT VDDQ_7
U1 1% 1% J3 H2 1uF J3 H2 1uF
M1_DDR_DM2 M1_DDR_RASN C524 C540
M1_DDR_DM2 RAS VDDQ_8 M1_DDR_RASN RAS VDDQ_8
P1 K3 H9 C525 1uF K3 H9 C541 1uF
M1_DDR_DM3 M1_DDR_DM3 M1_DDR_CASN CAS VDDQ_9 M1_DDR_CASN CAS VDDQ_9
L3 L3
M1_DDR_WEN WE M1_DDR_WEN WE
C2 J1 J1
M1_DDR_DQ0 M1_DDR_DQ0 NC_1 NC_1
K2 T2 J9 T2 J9
M1_DDR_DQ1 M1_DDR_DQ1 R505 C502 R512 C507 M1_DDR_RESET_N RESET NC_2 M1_DDR_RESET_N RESET NC_2
B3 1K 1K 0.1uF L1 L1
M1_DDR_DQ2 M1_DDR_DQ2 0.1uF NC_3 NC_3
J3 1% 1% L9 L9
M1_DDR_DQ3 M1_DDR_DQ3 NC_4 NC_4
B1 F3 F3
M1_DDR_DQ4 M1_DDR_DQ4 M1_DDR_DQS0 DQSL M1_DDR_DQS2 DQSL
K1 G3 G3
M1_DDR_DQ5 M1_DDR_DQ5 M1_DDR_DQS_N0 DQSL M1_DDR_DQS_N2 DQSL
B2
K3 C7 A9 C7 A9
M1_DDR_DQ7 M1_DDR_DQ7 M1_DDR_DQS1 DQSU VSS_1 M1_DDR_DQS3 DQSU VSS_1
J2 B7 B3 B7 B3
M1_DDR_DQ8 M1_DDR_DQ8 M1_DDR_DQS_N1 DQSU VSS_2 M1_DDR_DQS_N3 DQSU VSS_2
D2 E1 E1
M1_DDR_DQ9 M1_DDR_DQ9 VSS_3 VSS_3
H3 E7 G8 E7 G8
M1_DDR_DQ10 M1_DDR_DQ10 M1_DDR_DM0 DML VSS_4 M1_DDR_DM2 DML VSS_4
C3 D3 J2 D3 J2
M1_DDR_DQ11 M1_DDR_DQ11 M1_DDR_DM1 DMU VSS_5 M1_DDR_DM3 DMU VSS_5
G3 J8 J8
M1_DDR_DQ12 M1_DDR_DQ12 VSS_6 VSS_6
D1 E3 M1 E3 M1
M1_DDR_DQ13 M1_DDR_DQ13 M1_DDR_DQ0 DQL0 VSS_7 M1_DDR_DQ16 DQL0 VSS_7
H2 F7 M9 F7 M9
D3 F2 P1 F2 P1
M2
M1_DDR_DQ16
+1.5V_DDR +1.5V_DDR M1_DDR_DQ3
F8 P9
M1_DDR_DQ19
F8 P9
M1_DDR_DQ16 DQL3 VSS_10 DQL3 VSS_10
V3 H3 T1 H3 T1
L3 H8 T9 H8 T9
M1_DDR_DQ18 M1_DDR_DQ18 M1_1_DDR_VREFDQ M1_DDR_DQ5 DQL5 VSS_12 M1_DDR_DQ21 DQL5 VSS_12
W2 M1_DDR_VREFDQ G2 G2
M1_DDR_DQ19 M1_DDR_DQ19 M1_DDR_DQ6 DQL6 M1_DDR_DQ22 DQL6
L1 H7 H7
M1_DDR_DQ20 M1_DDR_DQ20 R506 R513 M1_DDR_DQ7 DQL7 M1_DDR_DQ23 DQL7
W1 1K 1K B1 B1
M1_DDR_DQ21 M1_DDR_DQ21 1% 1% VSSQ_1 VSSQ_1
L2 D7 B9 D7 B9
M1_DDR_DQ22 M1_DDR_DQ22 M1_DDR_DQ8 DQU0 VSSQ_2 M1_DDR_DQ24 DQU0 VSSQ_2
W3 C3 D1 C3 D1
V2 C8 D8 C8 D8
N2 C2 E2 C2 E2
U3 R507 R514 C508 A7 E8 A7 E8
M1_DDR_DQ26 M1_DDR_DQ26 C503 M1_DDR_DQ12 DQU4 VSSQ_6 M1_DDR_DQ28 DQU4 VSSQ_6
M3 1K 0.1uF 1K 0.1uF A2 F9 A2 F9
M1_DDR_DQ27 M1_DDR_DQ27 1% 1% M1_DDR_DQ13 DQU5 VSSQ_7 M1_DDR_DQ29 DQU5 VSSQ_7
T3 B8 G1 B8 G1
N1 A3 G9 A3 G9
U2
N3
E5 R501 240
M1_DDR_ZQCAL
1%
DDR3_512MB_SS_1600_25nm_15Y DDR3_512MB_HYNIX_1866_25nm_15Y DDR3_512MB_MICRON_1600_29nm_14Y DDR_512MB_SAMSUNG_1866_25n_15Y

DDR3_256MB_HYNIX_1600_29nm_14Y DDR3_256MB_MICRON_1600_29nm_14Y DDR3_256MB_SS_1600_35nm_15Y DDR3_256MB_SS_1866_35nQ_15Y
IC501-*6
K4B4G1646D-BCK0 IC502-*6 IC501-*4 IC502-*4 IC501-*1 IC502-*1 IC501-*7 IC502-*7
K4B4G1646D-BCK0 H5TQ4G63CFR_RDC H5TQ4G63CFR_RDC MT41K256M16HA-125:E MT41K256M16HA-125:E K4B4G1646D-BCMA K4B4G1646D-BCMA IC501-*2 IC502-*2 IC501-*3 IC502-*3 IC501-*5 IC502-*5 IC501-*8 IC502-*8
DDR_512MB_SS_1600_25n H5TQ2G63FFR-PBC H5TQ2G63FFR-PBC MT41K128M16JT-125:K MT41K128M16JT-125:K K4B2G1646Q-BCK0 K4B2G1646Q-BCK0 K4B2G1646Q-BCMA K4B2G1646Q-BCMA
N3 M8 DDR_512MB_SS_1600_25n DDR_512MB_HYNIX_1866_25n DDR_512MB_HYNIX_1866_25n DDR_512MB_MICRON DDR_512MB_MICRON DDR_512MB_SS_1866_25n DDR_512MB_SS_1866_25n
A0 VREFCA N3 M8 N3 M8 N3 M8 N3 M8 N3 M8 N3 M8 N3 M8 DDR_256MB_SS_1866_35n DDR_256MB_SS_1866_35n
P7 DDR_256MB_HYNIX_1600_29n DDR_256MB_HYNIX_1600_29n DDR_256MB_MICRON DDR_256MB_MICRON DDR_256MB_SS_1600_35n DDR_256MB_SS_1600_35n
A1 A0 VREFCA A0 VREFCA A0 VREFCA A0 VREFCA A0 VREFCA A0 VREFCA A0 VREFCA N3 M8 N3 M8
P3 P7 P7 P7 P7 P7 P7 P7 N3 M8 N3 M8 N3 M8 N3 M8 N3 M8 N3 M8
A1 A1 A1 A1 A1 A1 A1 A0 VREFCA A0 VREFCA
A2 P3 P3 P3 P3 P3 P3 P3 A0 VREFCA A0 VREFCA A0 VREFCA A0 VREFCA A0 VREFCA A0 VREFCA P7 P7
N2 H1 P7 P7 P7 P7 P7 P7 A1 A1
A3 VREFDQ A2 A2 A2 A2 A2 A2 A2 A1 A1 A1 A1 A1 A1 P3 P3
P8 N2 H1 N2 H1 N2 H1 N2 H1 N2 H1 N2 H1 N2 H1 P3 P3 P3 P3 P3 P3
A3 VREFDQ A3 VREFDQ A3 VREFDQ A3 VREFDQ A3 VREFDQ A3 VREFDQ A3 VREFDQ A2 A2
A4 P8 P8 P8 P8 P8 P8 P8 A2 A2 A2 A2 A2 A2 N2 H1 N2 H1
P2 N2 H1 N2 H1 N2 H1 N2 H1 N2 H1 N2 H1 A3 VREFDQ A3 VREFDQ
A5 A4 A4 A4 A4 A4 A4 A4 A3 VREFDQ A3 VREFDQ A3 VREFDQ A3 VREFDQ A3 VREFDQ A3 VREFDQ P8 P8
R8 L8 P2 P2 P2 P2 P2 P2 P2 P8 P8 P8 P8 P8 P8
A5 A5 A5 A5 A5 A5 A5 A4 A4
A6 ZQ R8 L8 R8 L8 R8 L8 R8 L8 R8 L8 R8 L8 R8 L8 A4 A4 A4 A4 A4 A4 P2 P2
R2 P2 P2 P2 P2 P2 P2 A5 A5
A7 A6 ZQ A6 ZQ A6 ZQ A6 ZQ A6 ZQ A6 ZQ A6 ZQ A5 A5 A5 A5 A5 A5 R8 L8 R8 L8
T8 R2 R2 R2 R2 R2 R2 R2 R8 L8 R8 L8 R8 L8 R8 L8 R8 L8 R8 L8
A7 A7 A7 A7 A7 A7 A7 A6 ZQ A6 ZQ
A8 T8 T8 T8 T8 T8 T8 T8 A6 ZQ A6 ZQ A6 ZQ A6 ZQ A6 ZQ A6 ZQ R2 R2
R3 B2 R2 R2 R2 R2 R2 R2 A7 A7
A9 VDD_1 A8 A8 A8 A8 A8 A8 A8 A7 A7 A7 A7 A7 A7 T8 T8
L7 D9 R3 B2 R3 B2 R3 B2 R3 B2 R3 B2 R3 B2 R3 B2 T8 T8 T8 T8 T8 T8
A9 VDD_1 A9 VDD_1 A9 VDD_1 A9 VDD_1 A9 VDD_1 A9 VDD_1 A9 VDD_1 A8 A8
A10/AP VDD_2 L7 D9 L7 D9 L7 D9 L7 D9 L7 D9 L7 D9 L7 D9 A8 A8 A8 A8 A8 A8 R3 B2 R3 B2
R7 G7 R3 B2 R3 B2 R3 B2 R3 B2 R3 B2 R3 B2 A9 VDD_1 A9 VDD_1
A11 VDD_3 A10/AP VDD_2 A10/AP VDD_2 A10/AP VDD_2 A10/AP VDD_2 A10/AP VDD_2 A10/AP VDD_2 A10/AP VDD_2 A9 VDD_1 A9 VDD_1 A9 VDD_1 A9 VDD_1 A9 VDD_1 A9 VDD_1 L7 D9 L7 D9
N7 K2 R7 G7 R7 G7 R7 G7 R7 G7 R7 G7 R7 G7 R7 G7 L7 D9 L7 D9 L7 D9 L7 D9 L7 D9 L7 D9
A11 VDD_3 A11 VDD_3 A11 VDD_3 A11 VDD_3 A11 VDD_3 A11 VDD_3 A11 VDD_3 A10/AP VDD_2 A10/AP VDD_2
A12/BC VDD_4 N7 K2 N7 K2 N7 K2 N7 K2 N7 K2 N7 K2 N7 K2 A10/AP VDD_2 A10/AP VDD_2 A10/AP VDD_2 A10/AP VDD_2 A10/AP VDD_2 A10/AP VDD_2 R7 G7 R7 G7
T3 K8 R7 G7 R7 G7 R7 G7 R7 G7 R7 G7 R7 G7 A11 VDD_3 A11 VDD_3
A13 VDD_5 A12/BC VDD_4 A12/BC VDD_4 A12/BC VDD_4 A12/BC VDD_4 A12/BC VDD_4 A12/BC VDD_4 A12/BC VDD_4 A11 VDD_3 A11 VDD_3 A11 VDD_3 A11 VDD_3 A11 VDD_3 A11 VDD_3 N7 K2 N7 K2
T7 N1 T3 K8 T3 K8 T3 K8 T3 K8 T3 K8 T3 K8 T3 K8 N7 K2 N7 K2 N7 K2 N7 K2 N7 K2 N7 K2
A13 VDD_5 A13 VDD_5 A13 VDD_5 A13 VDD_5 A13 VDD_5 A13 VDD_5 A13 VDD_5 A12/BC VDD_4 A12/BC VDD_4
A14 VDD_6 T7 N1 T7 N1 T7 N1 N1 N1 N1 N1 A12/BC VDD_4 A12/BC VDD_4 A12/BC VDD_4 A12/BC VDD_4 A12/BC VDD_4 A12/BC VDD_4 T3 K8 T3 K8
M7 N9 T3 K8 T3 K8 T3 K8 T3 K8 T3 K8 T3 K8 A13 VDD_5 A13 VDD_5
A15 VDD_7 A14 VDD_6 A14 VDD_6 A14 VDD_6 VDD_6 VDD_6 VDD_6 VDD_6 A13 VDD_5 A13 VDD_5 A13 VDD_5 A13 VDD_5 A13 VDD_5 A13 VDD_5 N1 N1
R1 M7 N9 M7 N9 M7 N9 M7 N9 M7 N9 M7 N9 M7 N9 N1 N1 N1 N1 N1 N1
A15 VDD_7 NC_5 VDD_7 NC_5 VDD_7 NC_5 VDD_7 NC_5 VDD_7 NC_5 VDD_7 NC_5 VDD_7 VDD_6 VDD_6
VDD_8 R1 R1 R1 R1 R1 R1 R1 VDD_6 VDD_6 VDD_6 VDD_6 VDD_6 VDD_6 M7 N9 M7 N9
M2 R9 M7 N9 M7 N9 M7 N9 M7 N9 M7 N9 M7 N9 NC_5 VDD_7 NC_5 VDD_7
BA0 VDD_9 VDD_8 VDD_8 VDD_8 VDD_8 VDD_8 VDD_8 VDD_8 NC_5 VDD_7 NC_5 VDD_7 NC_5 VDD_7 NC_5 VDD_7 NC_5 VDD_7 NC_5 VDD_7 R1 R1
N8 M2 R9 M2 R9 M2 R9 M2 R9 M2 R9 M2 R9 M2 R9 R1 R1 R1 R1 R1 R1
BA0 VDD_9 BA0 VDD_9 BA0 VDD_9 BA0 VDD_9 BA0 VDD_9 BA0 VDD_9 BA0 VDD_9 VDD_8 VDD_8
BA1 N8 N8 N8 N8 N8 N8 N8 VDD_8 VDD_8 VDD_8 VDD_8 VDD_8 VDD_8 M2 R9 M2 R9
M3 M2 R9 M2 R9 M2 R9 M2 R9 M2 R9 M2 R9 BA0 VDD_9 BA0 VDD_9
BA2 BA1 BA1 BA1 BA1 BA1 BA1 BA1 BA0 VDD_9 BA0 VDD_9 BA0 VDD_9 BA0 VDD_9 BA0 VDD_9 BA0 VDD_9 N8 N8
A1 M3 M3 M3 M3 M3 M3 M3 N8 N8 N8 N8 N8 N8
BA2 BA2 BA2 BA2 BA2 BA2 BA2 BA1 BA1
VDDQ_1 A1 A1 A1 A1 A1 A1 A1 BA1 BA1 BA1 BA1 BA1 BA1 M3 M3
J7 A8 M3 M3 M3 M3 M3 M3 BA2 BA2
CK VDDQ_2 VDDQ_1 VDDQ_1 VDDQ_1 VDDQ_1 VDDQ_1 VDDQ_1 VDDQ_1 BA2 BA2 BA2 BA2 BA2 BA2 A1 A1
K7 C1 J7 A8 J7 A8 J7 A8 J7 A8 J7 A8 J7 A8 J7 A8 A1 A1 A1 A1 A1 A1
CK VDDQ_2 CK VDDQ_2 CK VDDQ_2 CK VDDQ_2 CK VDDQ_2 CK VDDQ_2 CK VDDQ_2 VDDQ_1 VDDQ_1
CK VDDQ_3 K7 C1 K7 C1 K7 C1 K7 C1 K7 C1 K7 C1 K7 C1 VDDQ_1 VDDQ_1 VDDQ_1 VDDQ_1 VDDQ_1 VDDQ_1 J7 A8 J7 A8
K9 C9 J7 A8 J7 A8 J7 A8 J7 A8 J7 A8 J7 A8 CK VDDQ_2 CK VDDQ_2
CKE VDDQ_4 CK VDDQ_3 CK VDDQ_3 CK VDDQ_3 CK VDDQ_3 CK VDDQ_3 CK VDDQ_3 CK VDDQ_3 CK VDDQ_2 CK VDDQ_2 CK VDDQ_2 CK VDDQ_2 CK VDDQ_2 CK VDDQ_2 K7 C1 K7 C1
D2 K9 C9 K9 C9 K9 C9 K9 C9 K9 C9 K9 C9 K9 C9 K7 C1 K7 C1 K7 C1 K7 C1 K7 C1 K7 C1
CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4 CK VDDQ_3 CK VDDQ_3
VDDQ_5 D2 D2 D2 D2 D2 D2 D2 CK VDDQ_3 CK VDDQ_3 CK VDDQ_3 CK VDDQ_3 CK VDDQ_3 CK VDDQ_3 K9 C9 K9 C9
L2 E9 K9 C9 K9 C9 K9 C9 K9 C9 K9 C9 K9 C9 CKE VDDQ_4 CKE VDDQ_4
CS VDDQ_6 VDDQ_5 VDDQ_5 VDDQ_5 VDDQ_5 VDDQ_5 VDDQ_5 VDDQ_5 CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4 D2 D2
K1 F1 L2 E9 L2 E9 L2 E9 L2 E9 L2 E9 L2 E9 L2 E9 D2 D2 D2 D2 D2 D2
CS VDDQ_6 CS VDDQ_6 CS VDDQ_6 CS VDDQ_6 CS VDDQ_6 CS VDDQ_6 CS VDDQ_6 VDDQ_5 VDDQ_5
ODT VDDQ_7 K1 F1 K1 F1 K1 F1 K1 F1 K1 F1 K1 F1 K1 F1 VDDQ_5 VDDQ_5 VDDQ_5 VDDQ_5 VDDQ_5 VDDQ_5 L2 E9 L2 E9
J3 H2 L2 E9 L2 E9 L2 E9 L2 E9 L2 E9 L2 E9 CS VDDQ_6 CS VDDQ_6
RAS VDDQ_8 ODT VDDQ_7 ODT VDDQ_7 ODT VDDQ_7 ODT VDDQ_7 ODT VDDQ_7 ODT VDDQ_7 ODT VDDQ_7 CS VDDQ_6 CS VDDQ_6 CS VDDQ_6 CS VDDQ_6 CS VDDQ_6 CS VDDQ_6 K1 F1 K1 F1
K3 H9 J3 H2 J3 H2 J3 H2 J3 H2 J3 H2 J3 H2 J3 H2 K1 F1 K1 F1 K1 F1 K1 F1 K1 F1 K1 F1
RAS VDDQ_8 RAS VDDQ_8 RAS VDDQ_8 RAS VDDQ_8 RAS VDDQ_8 RAS VDDQ_8 RAS VDDQ_8 ODT VDDQ_7 ODT VDDQ_7
CAS VDDQ_9 K3 H9 K3 H9 K3 H9 K3 H9 K3 H9 K3 H9 K3 H9 ODT VDDQ_7 ODT VDDQ_7 ODT VDDQ_7 ODT VDDQ_7 ODT VDDQ_7 ODT VDDQ_7 J3 H2 J3 H2
L3 J3 H2 J3 H2 J3 H2 J3 H2 J3 H2 J3 H2 RAS VDDQ_8 RAS VDDQ_8
WE CAS VDDQ_9 CAS VDDQ_9 CAS VDDQ_9 CAS VDDQ_9 CAS VDDQ_9 CAS VDDQ_9 CAS VDDQ_9 RAS VDDQ_8 RAS VDDQ_8 RAS VDDQ_8 RAS VDDQ_8 RAS VDDQ_8 RAS VDDQ_8 K3 H9 K3 H9
J1 L3 L3 L3 L3 L3 L3 L3 K3 H9 K3 H9 K3 H9 K3 H9 K3 H9 K3 H9
WE WE WE WE WE WE WE CAS VDDQ_9 CAS VDDQ_9
NC_1 J1 J1 J1 J1 J1 J1 J1 CAS VDDQ_9 CAS VDDQ_9 CAS VDDQ_9 CAS VDDQ_9 CAS VDDQ_9 CAS VDDQ_9 L3 L3
T2 J9 L3 L3 L3 L3 L3 L3 WE WE
RESET NC_2 NC_1 NC_1 NC_1 NC_1 NC_1 NC_1 NC_1 WE WE WE WE WE WE J1 J1
L1 T2 J9 T2 J9 T2 J9 T2 J9 T2 J9 T2 J9 T2 J9 J1 J1 J1 J1 J1 J1
RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2 NC_1 NC_1
NC_3 L1 L1 L1 L1 L1 L1 L1 NC_1 NC_1 NC_1 NC_1 NC_1 NC_1 T2 J9 T2 J9
L9 T2 J9 T2 J9 T2 J9 T2 J9 T2 J9 T2 J9 RESET NC_2 RESET NC_2
NC_4 NC_3 NC_3 NC_3 NC_3 NC_3 NC_3 NC_3 RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2 L1 L1
F3 L9 L9 L9 L9 L9 L9 L9 L1 L1 L1 L1 L1 L1
NC_4 NC_4 NC_4 NC_4 NC_4 NC_4 NC_4 NC_3 NC_3
DQSL F3 F3 F3 F3 T7 F3 T7 F3 T7 F3 T7 NC_3 NC_3 NC_3 NC_3 NC_3 NC_3 L9 L9
G3 L9 L9 L9 L9 L9 L9 NC_4 NC_4
DQSL DQSL DQSL DQSL DQSL A14 DQSL A14 DQSL NC_6 DQSL NC_6 NC_4 NC_4 NC_4 NC_4 NC_4 NC_4 F3 T7 F3 T7
G3 G3 G3 G3 G3 G3 G3 F3 T7 F3 T7 F3 T7 F3 T7 F3 T7 F3 T7
DQSL DQSL DQSL DQSL DQSL DQSL DQSL DQSL NC_6 DQSL NC_6
DQSL NC_6 DQSL NC_6 DQSL NC_6 DQSL NC_6 DQSL NC_6 DQSL NC_6 G3 G3
C7 A9 G3 G3 G3 G3 G3 G3 DQSL DQSL
DQSU VSS_1 C7 A9 C7 A9 C7 A9 C7 A9 C7 A9 C7 A9 C7 A9 DQSL DQSL DQSL DQSL DQSL DQSL
B7 B3
DQSU VSS_2 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 C7 A9 C7 A9
E1 B7 B3 B7 B3 B7 B3 B7 B3 B7 B3 B7 B3 B7 B3 C7 A9 C7 A9 C7 A9 C7 A9 C7 A9 C7 A9
DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_1 DQSU VSS_1
VSS_3 E1 E1 E1 E1 E1 E1 E1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 B7 B3 B7 B3
E7 G8 B7 B3 B7 B3 B7 B3 B7 B3 B7 B3 B7 B3 DQSU VSS_2 DQSU VSS_2
DML VSS_4 VSS_3 VSS_3 VSS_3 VSS_3 VSS_3 VSS_3 VSS_3 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 E1 E1
D3 J2 E7 G8 E7 G8 E7 G8 E7 G8 E7 G8 E7 G8 E7 G8 E1 E1 E1 E1 E1 E1
DML VSS_4 DML VSS_4 DML VSS_4 DML VSS_4 DML VSS_4 DML VSS_4 DML VSS_4 VSS_3 VSS_3
DMU VSS_5 D3 J2 D3 J2 D3 J2 D3 J2 D3 J2 D3 J2 D3 J2 VSS_3 VSS_3 VSS_3 VSS_3 VSS_3 VSS_3 E7 G8 E7 G8
J8 E7 G8 E7 G8 E7 G8 E7 G8 E7 G8 E7 G8 DML VSS_4 DML VSS_4
VSS_6 DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5 DML VSS_4 DML VSS_4 DML VSS_4 DML VSS_4 DML VSS_4 DML VSS_4 D3 J2 D3 J2
E3 M1 J8 J8 J8 J8 J8 J8 J8 D3 J2 D3 J2 D3 J2 D3 J2 D3 J2 D3 J2
VSS_6 VSS_6 VSS_6 VSS_6 VSS_6 VSS_6 VSS_6 DMU VSS_5 DMU VSS_5
DQL0 VSS_7 E3 M1 E3 M1 E3 M1 E3 M1 E3 M1 E3 M1 E3 M1 DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5 J8 J8
F7 M9 J8 J8 J8 J8 J8 J8 VSS_6 VSS_6
DQL1 VSS_8 DQL0 VSS_7 DQL0 VSS_7 DQL0 VSS_7 DQ0 VSS_7 DQ0 VSS_7 DQL0 VSS_7 DQL0 VSS_7 VSS_6 VSS_6 VSS_6 VSS_6 VSS_6 VSS_6 E3 M1 E3 M1
F2 P1 F7 M9 F7 M9 F7 M9 F7 M9 F7 M9 F7 M9 F7 M9 E3 M1 E3 M1 E3 M1 E3 M1 E3 M1 E3 M1
DQL1 VSS_8 DQL1 VSS_8 DQL1 VSS_8 DQ1 VSS_8 DQ1 VSS_8 DQL1 VSS_8 DQL1 VSS_8 DQL0 VSS_7 DQL0 VSS_7
DQL2 VSS_9 F2 P1 F2 P1 F2 P1 F2 P1 F2 P1 F2 P1 F2 P1 DQL0 VSS_7 DQL0 VSS_7 DQ0 VSS_7 DQ0 VSS_7 DQL0 VSS_7 DQL0 VSS_7 F7 M9 F7 M9
F8 P9 F7 M9 F7 M9 F7 M9 F7 M9 F7 M9 F7 M9 DQL1 VSS_8 DQL1 VSS_8
DQL3 VSS_10 DQL2 VSS_9 DQL2 VSS_9 DQL2 VSS_9 DQ2 VSS_9 DQ2 VSS_9 DQL2 VSS_9 DQL2 VSS_9 DQL1 VSS_8 DQL1 VSS_8 DQ1 VSS_8 DQ1 VSS_8 DQL1 VSS_8 DQL1 VSS_8 F2 P1 F2 P1
H3 T1 F8 P9 F8 P9 F8 P9 F8 P9 F8 P9 F8 P9 F8 P9 F2 P1 F2 P1 F2 P1 F2 P1 F2 P1 F2 P1
DQL4 VSS_11 H3 T1 H3 T1 H3 T1 H3 T1 H3 T1 H3 T1 H3 T1 DQL2 VSS_9 DQL2 VSS_9 DQ2 VSS_9 DQ2 VSS_9 DQL2 VSS_9 DQL2 VSS_9 F8 P9 F8 P9
H8 T9 F8 P9 F8 P9 F8 P9 F8 P9 F8 P9 F8 P9 DQL3 VSS_10 DQL3 VSS_10
DQL5 VSS_12 DQL4 VSS_11 DQL4 VSS_11 DQL4 VSS_11 DQ4 VSS_11 DQ4 VSS_11 DQL4 VSS_11 DQL4 VSS_11 DQL3 VSS_10 DQL3 VSS_10 DQ3 VSS_10 DQ3 VSS_10 DQL3 VSS_10 DQL3 VSS_10 H3 T1 H3 T1
G2 H8 T9 H8 T9 H8 T9 H8 T9 H8 T9 H8 T9 H8 T9 H3 T1 H3 T1 H3 T1 H3 T1 H3 T1 H3 T1
DQL6 G2 G2 G2 G2 G2 G2 G2 DQL4 VSS_11 DQL4 VSS_11 DQ4 VSS_11 DQ4 VSS_11 DQL4 VSS_11 DQL4 VSS_11 H8 T9 H8 T9
H7 H8 T9 H8 T9 H8 T9 H8 T9 H8 T9 H8 T9 DQL5 VSS_12 DQL5 VSS_12
DQL7 DQL6 DQL6 DQL6 DQ6 DQ6 DQL6 DQL6 DQL5 VSS_12 DQL5 VSS_12 DQ5 VSS_12 DQ5 VSS_12 DQL5 VSS_12 DQL5 VSS_12 G2 G2
B1 H7 H7 H7 H7 H7 H7 H7 G2 G2 G2 G2 G2 G2
DQL7 DQL7 DQL7 DQ7 DQ7 DQL7 DQL7 DQL6 DQL6
VSSQ_1 B1 B1 B1 B1 B1 B1 B1 DQL6 DQL6 DQ6 DQ6 DQL6 DQL6 H7 H7
D7 B9 H7 H7 H7 H7 H7 H7 DQL7 DQL7
DQU0 VSSQ_2 VSSQ_1 VSSQ_1 VSSQ_1 VSSQ_1 VSSQ_1 VSSQ_1 VSSQ_1 DQL7 DQL7 DQ7 DQ7 DQL7 DQL7 B1 B1
C3 D1 D7 B9 D7 B9 D7 B9 D7 B9 D7 B9 D7 B9 D7 B9 B1 B1 B1 B1 B1 B1
DQU0 VSSQ_2 DQU0 VSSQ_2 DQU0 VSSQ_2 DQ8 VSSQ_2 DQ8 VSSQ_2 DQU0 VSSQ_2 DQU0 VSSQ_2 VSSQ_1 VSSQ_1
DQU1 VSSQ_3 C3 D1 C3 D1 C3 D1 C3 D1 C3 D1 C3 D1 C3 D1 VSSQ_1 VSSQ_1 VSSQ_1 VSSQ_1 VSSQ_1 VSSQ_1 D7 B9 D7 B9
C8 D8 D7 B9 D7 B9 D7 B9 D7 B9 D7 B9 D7 B9 DQU0 VSSQ_2 DQU0 VSSQ_2
DQU2 VSSQ_4 DQU1 VSSQ_3 DQU1 VSSQ_3 DQU1 VSSQ_3 DQ9 VSSQ_3 DQ9 VSSQ_3 DQU1 VSSQ_3 DQU1 VSSQ_3 DQU0 VSSQ_2 DQU0 VSSQ_2 DQ8 VSSQ_2 DQ8 VSSQ_2 DQU0 VSSQ_2 DQU0 VSSQ_2 C3 D1 C3 D1
C2 E2 C8 D8 C8 D8 C8 D8 C8 D8 C8 D8 C8 D8 C8 D8 C3 D1 C3 D1 C3 D1 C3 D1 C3 D1 C3 D1
DQU2 VSSQ_4 DQU2 VSSQ_4 DQU2 VSSQ_4 DQ10 VSSQ_4 DQ10 VSSQ_4 DQU2 VSSQ_4 DQU2 VSSQ_4 DQU1 VSSQ_3 DQU1 VSSQ_3
DQU3 VSSQ_5 C2 E2 C2 E2 C2 E2 C2 E2 C2 E2 C2 E2 C2 E2 DQU1 VSSQ_3 DQU1 VSSQ_3 DQ9 VSSQ_3 DQ9 VSSQ_3 DQU1 VSSQ_3 DQU1 VSSQ_3 C8 D8 C8 D8
A7 E8 C8 D8 C8 D8 C8 D8 C8 D8 C8 D8 C8 D8 DQU2 VSSQ_4 DQU2 VSSQ_4
DQU4 VSSQ_6 DQU3 VSSQ_5 DQU3 VSSQ_5 DQU3 VSSQ_5 DQ11 VSSQ_5 DQ11 VSSQ_5 DQU3 VSSQ_5 DQU3 VSSQ_5 DQU2 VSSQ_4 DQU2 VSSQ_4 DQ10 VSSQ_4 DQ10 VSSQ_4 DQU2 VSSQ_4 DQU2 VSSQ_4 C2 E2 C2 E2
A2 F9 A7 E8 A7 E8 A7 E8 A7 E8 A7 E8 A7 E8 A7 E8 C2 E2 C2 E2 C2 E2 C2 E2 C2 E2 C2 E2
DQU5 VSSQ_7 A2 F9 A2 F9 A2 F9 A2 F9 A2 F9 A2 F9 A2 F9 DQU3 VSSQ_5 DQU3 VSSQ_5 DQ11 VSSQ_5 DQ11 VSSQ_5 DQU3 VSSQ_5 DQU3 VSSQ_5 A7 E8 A7 E8
B8 G1 A7 E8 A7 E8 A7 E8 A7 E8 A7 E8 A7 E8 DQU4 VSSQ_6 DQU4 VSSQ_6
DQU6 VSSQ_8 DQU5 VSSQ_7 DQU5 VSSQ_7 DQU5 VSSQ_7 DQ13 VSSQ_7 DQ13 VSSQ_7 DQU5 VSSQ_7 DQU5 VSSQ_7 DQU4 VSSQ_6 DQU4 VSSQ_6 DQ12 VSSQ_6 DQ12 VSSQ_6 DQU4 VSSQ_6 DQU4 VSSQ_6 A2 F9 A2 F9
A3 G9 B8 G1 B8 G1 B8 G1 B8 G1 B8 G1 B8 G1 B8 G1 A2 F9 A2 F9 A2 F9 A2 F9 A2 F9 A2 F9
DQU7 VSSQ_9 A3 G9 A3 G9 A3 G9 A3 G9 A3 G9 A3 G9 A3 G9 DQU5 VSSQ_7 DQU5 VSSQ_7 DQ13 VSSQ_7 DQ13 VSSQ_7 DQU5 VSSQ_7 DQU5 VSSQ_7 B8 G1 B8 G1
DQU7 B8 G1 B8 G1 B8 G1 B8 G1 B8 G1 B8 G1 DQU6 VSSQ_8 DQU6 VSSQ_8
VSSQ_9 DQU7 VSSQ_9 DQU7 VSSQ_9 DQ15 VSSQ_9 DQ15 VSSQ_9 DQU7 VSSQ_9 DQU7 VSSQ_9 DQU6 VSSQ_8 DQU6 VSSQ_8 DQ14 VSSQ_8 DQ14 VSSQ_8 DQU6 VSSQ_8 DQU6 VSSQ_8 A3 G9 A3 G9
A3 G9 A3 G9 A3 G9 A3 G9 A3 G9 A3 G9 DQU7 VSSQ_9 DQU7 VSSQ_9
DQU7 VSSQ_9 DQU7 VSSQ_9 DQ15 VSSQ_9 DQ15 VSSQ_9 DQU7 VSSQ_9 DQU7 VSSQ_9

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. M14-DDR3(DE) 5 29
IC101
+3.3V_Bypass Cap +1.1V_Bypass Cap LG1311-C1
+1.1V_VDD
B22 P19
GND_1 GND_114
+3.3V_NORMAL DVDD33 +3.3V_NORMAL AVDD33 B24
GND_2 GND_115
P22
C22 P26
GND_3 GND_116
C23 P30
L601 GND_4 GND_117
C24 R7
BLM18PG121SN1D L606 GND_5 GND_118
C617 C618 C619 C620 C623 C626 C627 C628 D4 R8
4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 0.1uF 0.1uF 0.1uF GND_6 GND_119
10V 10V 10V 10V 10V D5 R11
BLM18PG121SN1D 16V 16V 16V GND_7 GND_120
D6 R12
GND_8 GND_121
C614 C615 D20 R22
DVDD33 IC101 +1.1V_VDD C601 C604 C607
4.7uF 0.1uF GND_9 GND_122
4.7uF 4.7uF 0.1uF D21 R26
LG1311-C1 10V 10V 16V 10V 16V GND_10 GND_123
E6 R27
GND_11 GND_124
E20 T6
GND_12 GND_125
TP5209 E21 T7
L18 M20 GND_13 GND_126
DVDD33_1 DVDD11_1 F6 T8
L21 M21 GND_14 GND_127
L22 N13 GND_15 GND_128
L23 N14 GND_16 GND_129
M23 N15 GND_17 GND_130
T11 N16 GND_18 GND_131
Y23 N17 GND_19 GND_132
AA23 N18 GND_20 GND_133
DVDD33_8 DVDD11_8 G7 T19
AC12 P20 GND_21 GND_134
DVDD33_9 DVDD11_9 G8 T22
GND_22 GND_135
AC13
AC14
DVDD33_10 DVDD11_10
P21
R13
+2.5V_Bypass Cap AFE 3CH Power G9
GND_23 GND_136
T26
DVDD33_11 DVDD11_11 G10 T27
AC15 R14 GND_24 GND_137
DVDD33_12 DVDD11_12 G11 U6
AC11 R15 GND_25 GND_138
AVDD33_BT_USB DVDD11_13 G12 U7
VDD3V3_HDMI P23 R16 GND_26 GND_139
AVDD33_USB_1 DVDD11_14 G13 U8
R23 R17 GND_27 GND_140
AVDD33_USB_2 DVDD11_15 G14 U11
T23 R18 +2.5V_NORMAL AVDD25 +2.5V_NORMAL AVDD25_C4TX GND_28 GND_141
G15 U12
U23
AVDD33_HDMI_1 DVDD11_16
R19 +1.1V_VDD AVDD11_DMD GND_29 GND_142
AVDD33 AVDD33_HDMI_2 DVDD11_17 G16 U13
C637 V23 R20 GND_30 GND_143
AVDD33_HDMI_3 DVDD11_18 L602 L604 G17 U22
0.1uF R21 GND_31 GND_144
16V BLM18PG121SN1D BLM18PG121SN1D G20 U26
DVDD11_19
AF22 T13 GND_32 GND_145
AVDD33_CVBS DVDD11_20 L607 G21 V4
T20 GND_33 GND_146
DVDD11_21 G22 V5
T21 GND_34 GND_147
DVDD11_22 BLM18PG121SN1D G23 V6
+1.5V_DDR F9 U14 C602 C605 C608 C610 C613 C616 GND_35 GND_148
DVDD15_M0_1 DVDD11_23 4.7uF 4.7uF 0.1uF 0.1uF 4.7uF 0.1uF C622 C625 G24 V7
TP5207
F10 U15 16V GND_36 GND_149

DVDD15_M0_2 DVDD11_24 10V 10V 16V 10V 16V 4.7uF 0.1uF G25 V8
F11 U16 10V 16V GND_37 GND_150
DVDD15_M0_3 DVDD11_25 G26 V14
F12 U17 GND_38 GND_151
DVDD15_M0_4 DVDD11_26 G27 V15
F13 U18 GND_39 GND_152
DVDD15_M0_5 DVDD11_27 H7 V16
F14 U19 GND_40 GND_153
DVDD15_M0_6 DVDD11_28 H8 V17
F15 U20 GND_41 GND_154
DVDD15_M0_7 DVDD11_29 H9 V18
F16 U21 GND_42 GND_155
DVDD15_M0_8 DVDD11_30 H10 V19
F17 V13 GND_43 GND_156
DVDD15_M0_9 DVDD11_31 H11 V22
V20 GND_44 GND_157
DVDD11_32 H12 V26
+1.5V_DDR G6 V21 GND_45 GND_158
DVDD15_M1_1 DVDD11_33 +2.5V_NORMAL AVDD25_AUD H13 V30
TP5208
H6 W13 GND_46 GND_159

DVDD15_M1_2 DVDD11_34 H14 V31
J6 W14 GND_47 GND_160
DVDD15_M1_3 DVDD11_35 H15 W4
K6 W15 L603 GND_48 GND_161
DVDD15_M1_4 DVDD11_36 BLM18PG121SN1D H16 W8
L6 W16 GND_49 GND_162
DVDD15_M1_5 DVDD11_37 H17 W20
M6 W17 GND_50 GND_163
DVDD15_M1_6 DVDD11_38 H21 W21
N6 W18 GND_51 GND_164
DVDD15_M1_7 DVDD11_39 H22 W22
P6 W19 GND_52 GND_165
DVDD15_M1_8 DVDD11_40 C603 C606 C609 H23 W23
R6 Y13 4.7uF 4.7uF 0.1uF GND_53 GND_166
AVDD25_C4TX DVDD15_M1_9 DVDD11_41 H24 W26
Y20 10V 10V 16V GND_54 GND_167
DVDD11_42 H25 W27
Y21 GND_55 GND_168
DVDD11_43 H26 Y2
V11 AA13 GND_56 GND_169
AVDD25_C4TX_1 DVDD11_44 H27 Y3
W11 AA14 GND_57 GND_170
AVDD25_C4TX_2 DVDD11_45 H31 Y4
Y11 AA15 GND_58 GND_171
AVDD25_C4TX_3 DVDD11_46 J7 Y8
AVDD25 AA11
AVDD25_C4TX_4 DVDD11_47
AA17
J8
GND_59 GND_172
Y14
AC18 AA18 GND_60 GND_173
AVDD25_COMP_1 DVDD11_48 J26 Y15
AC19
AC20
AVDD25_COMP_2 DVDD11_49
AA19
AA20
+1.5V_Bypass Cap J27
GND_61
GND_62
GND_174
GND_175
Y16
AVDD25_CVBS_1 DVDD11_50 K7 Y17
AC21 AA21 GND_63 GND_176
AVDD25_CVBS_2 DVDD11_51 K8 Y18
AC22 AB21 GND_64 GND_177
AVDD25_DMD AVDD11_APLL K26 Y19
AC23 AB19 GND_65 GND_178
AVDD25_AAD AVDD11_COMP_LLPLL K27 Y22
G19 V12 GND_66 GND_179
DVDD25_XTAL AVDD11_C4TX_1 L7 Y26
H19 W12 GND_67 GND_180
AVDD25_DR3PLL AVDD11_C4TX_2 L8 AA8
AVDD25_AUD H20 Y12 GND_68 GND_181
SP_VQPS AVDD11_C4TX_3 +1.5V_DDR L11 AA16
AA12 GND_69 GND_182
AVDD11_C4TX_4 L12 AA22
AC17 +1.1V_VDD GND_70 GND_183
AVDD25_AUD L13 AA26
AB23 GND_71 GND_184
AVDD25_APLL L14 AB11
G18 GND_72 GND_185
DVDD11_XTAL L15 AB12
H18 GND_73 GND_186
DVDD11_DR3PLL L16 AB13
TP5210
GND_74 GND_187
AVDD11_DMD L17 AB14
AF23 OPT GND_75 GND_188
DVDD11_CVBSPLL L19 AB15
AF24 C629 C631 C633 GND_76 GND_189
AVDD11_DMD_1 L20 AB16
AF25 22uF 0.1uF 0.1uF GND_77 GND_190
AVDD11_DMD_2 10V 16V 16V L27 AB17
GND_78 GND_191
DVDD18_EMMC M7 AB18
GND_79 GND_192
M8 AB20
L26 GND_80 GND_193
DVDD18_EMMC_1 M11 AB22
M26 GND_81 GND_194
DVDD18_EMMC_2 M12 AB26
GND_82 GND_195
M13 AB30
GND_83 GND_196
M14 AB31
GND_84 GND_197
M15 AC16
+1.5V_DDR GND_85 GND_198
M16 AC26
GND_86 GND_199
M17 AD26
GND_87 GND_200
M18 AE26
GND_88 GND_201
M19 AF6
GND_89 GND_202
M22 AF8
GND_90 GND_203
M27 AF9
GND_91 GND_204
OPT N7 AF10
GND_92 GND_205
C630 C632 C634 N8 AF11
22uF 0.1uF 0.1uF GND_93 GND_206
N11 AF12
10V 16V 16V GND_94 GND_207
N12 AF13
GND_95 GND_208
N19 AF14
GND_96 GND_209
N20 AF15
GND_97 GND_210
N21 AF16
GND_98 GND_211
N22 AF17
GND_99 GND_212
N23 AF18
GND_100 GND_213
N26 AF19
GND_101 GND_214
N27 AF20
GND_102 GND_215
N30 AF21
GND_103 GND_216
P7 AF26
GND_104 GND_217
P8 AG20
GND_105 GND_218
GND JIG POINT P11 AG25
GND_106 GND_219
P12 AG31
GND_107 GND_220
P13 AH25
GND_108 GND_221
P14 AJ25
GND_109 GND_222
P15 AK9
JP601
JP602
JP603
JP604
GND_110 GND_223
P16 AK25
GND_111 GND_224
P17 AL9
GND_112 GND_225
P18 AL15
GND_113 GND_226

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. M14-POWER 6 29
11/05/31
+5V_CI_ON
C701 C702 CI_DATA[0-7]

0.1uF 4.7uF
16V 10V
CI CI JK701
10125901-015LF
CI /PCM_CE1 AR713 CI 33
35 1 CI_DATA[0] EB_DATA[0]
R715 100 36 2 CI_DATA[3]
/CI_CD1 CI_DATA[1] EB_DATA[1]
CI 37 3 CI_DATA[4]
CI_TS_DATA[3] CI_DATA[2] EB_DATA[2]
38 4 CI_DATA[5]
39 5 CI_DATA[6]
CI_TS_DATA[5]
EB_DATA[0-7]
40 6 CI_DATA[7]
CI_TS_DATA[6] CI
41 7 R720 33 AR714 33
42 8 CI CI_ADDR[10]
/PCM_IORD /PCM_CE2 CI_ADDR[10] CI_DATA[5] EB_DATA[5]
/PCM_IOWR 43 9 /PCM_OE CI_DATA[6] EB_DATA[6]
44 10 CI_ADDR[11]
CI_ADDR[11] +5V_CI_ON CI_DATA[7] EB_DATA[7]
CI_IN_TS_DATA[0-7] 45 11 CI_ADDR[9]
CI_ADDR[9]
46 12 CI_ADDR[8]
CI_ADDR[8]
CI_IN_TS_DATA[0] 47 13 CI_ADDR[13]
CI_ADDR[13] R722
CI_IN_TS_DATA[1] 48 14 CI_ADDR[14] 10K
CI_ADDR[14] CI CI_DATA[0-7] EB_DATA[0-7]
CI_IN_TS_DATA[2] 49 15 /PCM_WE
CI_IN_TS_DATA[3] 50 16 R721 33
/PCM_IRQA
51 17 C704 0.1uF C705 OPT
0.1uF
+5V_CI_ON 52 18 CI 16V
CI_IN_TS_DATA[4] 53 19 CI
CI_IN_TS_DATA[5] 54 20
CI_IN_TS_DATA[6] 55 21 CI_ADDR[12]
R707 CI_ADDR[12]
10K CI_IN_TS_DATA[7] 56 22 CI_ADDR[7]
CI CI_ADDR[7]
57 23 CI_ADDR[6]
CI_TS_CLK CI_ADDR[6]
R702 33 CI 58 24 CI_ADDR[5]
PCM_RESET CI_ADDR[5]
R703 33 CI 59 25 CI_ADDR[4]
/PCM_WAIT CI_ADDR[4]
R701 33 OPT 60 26 CI_ADDR[3]
PCM_INPACK CI_ADDR[3]
61 27 CI_ADDR[2]
/PCM_REG CI_ADDR[2]
62 28 CI_ADDR[1]
CI_TS_VAL CI_ADDR[1]
CI_TS_SYNC 63 29 CI_ADDR[0]
CI_ADDR[0]
64 30 CI_DATA[0]
CI_TS_DATA[0]
65 31 CI_DATA[1]
CI_TS_DATA[1]
66 32 CI_DATA[2]
CI_TS_DATA[2]
PCM_INPACK /CI_CD2 R716 100 67 33
CI 68 34
/PCM_CE2
G2 69 G1
AR709 CI 33 CI
AR712 33
CI_ADDR[0] EB_ADDR[0] CI_ADDR[12] EB_ADDR[12]
CI_IN_TS_VAL
CI_ADDR[1] EB_ADDR[1] CI_ADDR[13] EB_ADDR[13]
CI_IN_TS_CLK CI_ADDR[2] EB_ADDR[2] CI_ADDR[14] EB_ADDR[14]
CI_IN_TS_SYNC CI_ADDR[3] EB_ADDR[3] /PCM_REG CAM_REG_N
C703 CI
AR710 33
12pF
CI_ADDR[4] EB_ADDR[4] CI
50V AR708 33
OPT CI_ADDR[5] EB_ADDR[5] /PCM_OE EB_OE_N
CI_ADDR[6] EB_ADDR[6] /PCM_WE EB_WE_N
CI_ADDR[7] EB_ADDR[7] /PCM_IORD EB_BE_N1
TPO_DATA[0-7] /PCM_IOWR EB_BE_N0
CI
TPO_DATA[0] AR701 33
CI_IN_TS_DATA[0] AR711 CI 33
TPO_DATA[1]
CI_IN_TS_DATA[1] CI_ADDR[8] EB_ADDR[8]
TPO_DATA[2]
TPO_DATA[3]
TPO_DATA[4]
TPO_DATA[5]
CI_IN_TS_DATA[5]
TPO_DATA[6]
CI_IN_TS_DATA[6]
TPO_DATA[7]
CI_IN_TS_DATA[7]
AR702 33
CI
CI
AR703 33
TPO_CLK CI_IN_TS_CLK
TPO_SOP CI_IN_TS_SYNC
TPO_VAL CI_IN_TS_VAL
+5V_NORMAL
CI
CI
R725 R726
10K 10K CI
AR704 100
/PCM_WAIT CAM_WAIT_N
/PCM_IRQA CAM_IREQ_N
/CI_CD2 CAM_CD2_N CI POWER ENABLE CONTROL
/CI_CD1 CAM_CD1_N
C706 C707
0.1uF 0.1uF +5V_NORMAL IC700 +5V_CI_ON
16V 16V
AP2151WG-7
CI CI
CI
AR705 100
PCM_INPACK CAM_INPACK_N IN OUT
5 1
CI_TS_CLK CI_OUT_CLK
C709 CI
CI_TS_VAL CI_OUT_VAL R708 0.1uF C710
C708 10K GND 1uF
CI_TS_SYNC CI_OUT_SOP 50V 2
12pF OPT CI 25V
50V CI R706
OPT 10K
R705 100 EN FLG CI
PCM_5V_CTL 4 3
CI
CI R704
AR706 100 10K
CI_TS_DATA[7] CI_OUT_DATA7 CI
CI_TS_DATA[6] CI_OUT_DATA6
CI
AR707 100

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. CI SLOT 7 29
+3.5V_ST
+3.5V_ST
E
Q2303-*1
PANEL_POWER
R2343 0 R2366
B 2N3906S-RTK
RL_ON_KEC
POWER UP SEQUENCE
R2301 OPT
R2367
10K
10K E C Q2302 Change: Diodes --> NXP, 131118
Q2303
10K C
B MMBT3906(NXP)
+13V 3.3V->5V->1.5V->1.1V->2.5V
RL_ON
R2300 B Q2300
MMBT3904(NXP)
RL_ON_NXP +13V PANEL_VCC
C
10K Default_NXP
L2303
R2362
ADUC 20S 02 010L
E UBW2012-121F Q2302
10K
ICVS0505201FR
OPT PMV48XP
Multi_Innochips
L2313
VA23001-*1
D
ZD2301
20V C2307 C2367 C2368
POWER_WAFER_12PIN 0.1uF UBW2012-121F
Default_Amotech P2300 0.1uF 4.7uF
C2333
ADUC 20S 02 010L

VA23002
C2331 R2317
OPT
50V 25V 50V
OPT
VA23001 SMAW200-H12S5K(BK)(LTR) 0.1uF 36K 0.1uF G
OPT OPT C2363 C2347
LVDS_DISCHARGE
5.6V 50V 50V
AMOTECH CO., LTD. 10uF 10uF
R2346
25V 25V
3.3K
+13V_A
L2304
PWR ON
GND
1
3
2
4
PDIM2
D13V
PWM_DIM2
R2318
Power_DET
D13V 5 6 D13V
UBW2012-121F 150K
A13V 7 8 A13V
GND 9 10 GND
C +13V
DRV-ON PDIM1 R2337
C2369 C2306 11 12 PWM_DIM +3.5V_ST
Q2301 100K
ZD2303
0.1uF 0.1uF GND GND B

13 14 PANEL_CTL
20V
OPT
25V 50V GND SCLK R2354 MMBT3904(NXP) Multi_AOS R2338

15 13 16 R2355 R2314 RESET IC_ROHM
OPT L/DIM0_VS 4.7K 4.7K 10K
VSYNC SIN 10K E Q2302-*1 R2325 IC2307
17 18 L/DIM0_SCLK OPT C2359 OPT
10K
R2361
OPT AO3435 14K
4.7uF BD48K28G
L/DIM0_MOSI 1%
D
10V R2350 POWER_DET
+3.3V_NORMAL R2330
1K P2301
OPT VDD 3 2 VOUT 100
.
OPT SMAW200-H18S5
G
POWER_WAFER_18PIN C2355 1
C2370 R2326 0.1uF GND
R2306 0.1uF 5.1K 25V
1K 25V
INV_CTL R2307
1%
C2365
OPT
100 0.1uF
16V
R2334
10K
OPT
+2.5V RESET IC_DIODES_APX803D29 RESET_IC_DIODES_NEW_APX803E29
IC2307-*1 IC2307-*2 not to RESET at 8kV ESD
IC2302 APX803D29 APX803E29
TJ2132GDP [EP]GND
POWER_ON/OFF2_1 R1 VCC 3 2 RESET VCC 3 2 RESET
8.2K
1 1
1%
1/16W
R2321
+3.3V - eMMC 4.41/4.51 POK
1 8
GND
+2.5V_NORMAL GND GND
THERMAL
12V-->3.58V
+3.3V_NORMAL R2315 EN FB
9
2 7 R2 ST_3.5V-->3.5V
+3.3V_NORMAL
26.1K
3.3V_EMMC C2328
1%
1/16W
R2322
10K
0.01uF
+5V_NORMAL IN
3 6
OUT 50V
BIAS SS C2354 C2357
ZD2305
L2302 4 5
2A
OPT
10uF
5V
0.1uF
10V 16V
BLM18PG121SN1D
C2305
0.1uF
C2300
22uF
C2332
2700pF
50V
DDR MAIN 1.5V
16V 10V C2321
10uF
10V
R2324
POWER_ON/OFF2_2
10K
OPT
C2361
0.1uF
16V
+3.5V_ST +1.5V_DDR
Vout=0.6*(1+R2/R1) C2341
0.1uF
[EP]FIN
16V
AVIN
BOOT
L2308
PGD
EN
VLS5045EXT-2R2N
+1.8V - eMMC 4.51 L2309
16
15
14
13
2.2uH
R2316 PVIN_1 SW_3
100
1/16W
+1.1V_CORE C2339 C2340
PVIN_2
1
2
THERMAL
17
12
11 SW_2
ZD2302
1% 10uF 0.1uF C2345 C2349
2.5V
PGND_1 3 IC2303 10 SW_1
R2320 10V 16V 22uF 22uF
C2327 BD9A300MUV
POWER_ON/OFF2_3 560K C2342 10V 10V
OPT
DVDD18_EMMC PGND_2 4 9 SS
1/10W 3A
1%
1/16W
430K
330pF 0.01uF
+3.3V_NORMAL IC2301
R2319
8
5% 50V 50V
1%
1/16W
16K
R2332
MP8762HGLE-Z
+1.1V_VDD R1
AGND
FB
ITH
MODE
LPBN8050T-1R0N
L2307 R2331
R2310 1/16W 330K 5%
1K EN SW_2 1.0uH
1 16
R2329
OPT 8.2K C2344
IC2306
C2366
ZD2304
AZ1117EH-ADJTRG1 FREQ SW_1

R2308
1/16W
R1 1% 1/16W
2.5V
0.1uF 2 15 C2337 C2356 50V 2700pF

OPT
C2346 R2
18K
16V 22uF 22uF

1%
22uF
IN OUT 10V 10V 10V
FB IN_2
R2347 3 14
1%
1/16W
18K
R2333
ADJ/GND R2347-*1 0
1
D2302
1%
1/16W
75
2.5V
R2309
1/16W
OPT
ESR_1ohm R2
3A
R2357
ESR_0ohm SS PGND_4
22K
4 13
1%
C2318
C2301 C2308 0.033uF
10uF 10uF 50V AGND PGND_3
Vout=0.8*(1+R1/R2)
1%
1/16W
33
5 12
R2358
10V 10V
R2311
100K PG PGND_2
C2316
6 11 +13V
1/16W
1uF 1% VCC PGND_1
7 10
10V
BST
8 9
IN_1
L2312
+5.0V normal & USB
1%
R2341150K 1%
R2
R2335 16K 1%
C2334 OPT
2200pF C2335 C2336
R2340 16K
C2325 C2326
+13V 50V
1%
1/16W
6.8K
R2345
10uF 10uF 100pF 0.047uF
R2313 C2319 50V 25V
4.7 25V 25V R2342
10K
+13V +3.3V_NORMAL 1/16W

5%
0.1uF
16V
Vout=0.611*(1+R1/R2)
C2348 C2351 C2352
RSET2
RSET1
22uF 22uF 10uF
[EP]
AGND
RLIM
COMP
+3.3V_NORMAL 10V 10V 10V
C2343 R1
FB
SS
L2310
120-ohm 82pF
R2352
1%
1/16W
51K
L2300 50V
28
27
26
25
24
23
22
BLM18PG121SN1D
VIN_1 1 21 LX_3 L2311
THERMAL 4.7uH
C2302 C2303 +3.5V_ST

+3.5V_ST C2309 C2311 C2329 VIN_3
VIN_2 2
3
29 20
19
LX_2
LX_1 C2338
+5V_NORMAL

0.1uF 0.047uF
3.3V_Diode_SEMTECH
10uF 10uF 10uF L2311 Change, 131120

0.1uF 50V PGND_1 IC2304 BST 25V
3.3V_Diode_KEC
25V IC2300 25V 25V 4 18 for Currnet UP

ZD2300-*1
25V SN1302001(TPS65286RHDR)
BD9D320EFJ [EP]FIN OPT
ZD2300
PGND_2 5 17 SW_IN2
IC2305
0.1uF
5V
5V
C2350
R2344
1/16W
TPS563200
100K
100K
R2353
PGND_3 SW_IN1
1/16W
R2304
C2353
16V
POWER_ON/OFF1 6 16 1uF
5%
5%
10K EN
1 8
VIN
16V
V7V 7 6A 15 NFAULT1
10V
THERMAL
C2360 0.1uF GND VBST
/USB_OCD3
R2302 R2303 R1 +13V 1 6
25V
1uF
C2324
10
11
12
13
14
0.1uF 68K FB BOOT C2313
9
5.1K
9
16V 2 7 NR8040T2R0N L2306

OPT 4.7uH
MODE/SYNC
EN
SW_OUT2
SW_OUT1
SW_EN2
SW_EN1
NFAULT2
1/16W 1/16W L2301 SW EN R1
1% 1% 2uH 2 5
C2304
100pF
VREG
3 6
SW
VIN
3A VFB
1% 1%
1/16W 1/16W
50V 3 4
SS GND R2
/USB_OCD2
R2
3A
BLM18PG121SN1D
L2305
4 5 C2314 C2315 24.9K 11K

22uF 22uF R2327 R2328
R2360
4.7K
4.7K
1/16W
R2305
USB_CTL2 R2359
C2323 C2330
1/16W
R2323
10V
R2312
POWER_ON/OFF2_4
C2317 C2320
OPT
OPT
+5V_USB_3
10V C2322
R2339
Vout=0.6*(1+R1/R2)
10K
22uF 0.0068uF
22K
10K
10K
C2310 C2312 10uF 0.1uF 22uF

1%
1%
25V 25V 10V 10V 50V

1uF 2200pF
50V
10pF
C2358
OPT
10V 50V
5.1V:R1-51K, R2-6.8K
USB_CTL3
L2314
Vout=0.765*(1+R1/R2) CB3216PA501E
Vout=0.765*(1+R1/R2) Non_Cruise
+5V_USB_2

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN POWER 8 29
HDMI (REAR 1 ARC / SIDE 1 MHL)
HDMI_1(ARC) HDMI_2(MHL/IR_OUT)
HDMI_EXT_EDID
MMBT3904(NXP)
5V_HDMI_1 VA3208-*1
Q3204
ESD_HDMI_Innochips
HDMI_EXT_EDID
5V_HDMI_4
C
VA3215-*1
R3261 0
1K ESD_HDMI_Innochips HDMI_HPD_4 MHL
HDMI_EXT_EDID
R3268
+5V_NORMAL
MHL +5V_NORMAL IC3201
BD2242G
B
VA3215 VA3216-*1
ESD_HDMI_Amotech VA3206-*1 D3202 D3202-*1
ESD_HDMI_Innochips R3261-*1
1K
R3269
ESD_HDMI_Innochips 33 MBR230LSFT1G SS2040LL-LG

ESD_HDMI_Amotech
R3275 VIN VOUT 30V 40V

R3251 VA3212-*1 10K 1 6
NON_MHL
VA3208
33 BODY_SHIELD
R3265
100K
HDMI_HPD_1 VA3207-*1 ESD_HDMI_Innochips MHL D MHL_ONSEMI MHL_SUZHOU

+3.3V_NORMAL C3201
HDMI_INT_EDID ESD_HDMI_Innochips Q3207 GND ILIM C3203
HDMI_EXT_EDID G 0.1uF R3204
ESD_HDMI_Amotech
5V_HDMI_4 SI1012CR-T1-GE3 D3201 2 5 C3228
R3270 GND MHL 100K 10uF
MHL MHL 22uF
R3200
4.7K R3274 R3201 MHL 10V
VA3213-*1 S 10V
14K
MHL
20 1K MHL 10K EN OC MHL
SHIELD A1 3 4 OPT
ESD_HDMI_Amotech
ESD_HDMI_Innochips 1/16W C R3273
AR3200 HP_DET 1K C MHL
19 5% Q3208 MHL_DET
B
NON_MHL
MHL
R3267
20
VA3216
VA3212
A2
100K
DDC_SCL_1 5V AR3202 MMBT3904(NXP)
HP_DET DDC_SDA_1 18 33 MHL R3202
19
ESD_HDMI_Amotech
ESD_HDMI_Amotech
GND 1/16W E 330K

5V 33
ESD_HDMI_Amotech
ESD_HDMI_Amotech
5V_HDMI_1 17
18 1/16W ARC DDC_DATA DDC_SCL_4
MHL
VA3206
VA3207
GND R3248 16 DDC_SDA_4

17 1K
VA3210
VA3211
DDC_CLK
DDC_DATA OPT 15
16 VA3210-*1
DDC_CLK C3202 1uF NC
SPDIF_OUT_ARC 14 IR_OUT_HDMI1 ESD_HDMI_Innochips
15
10V CE_REMOTE
ARC R3249 13 CEC_REMOTE
14 C3226 VA3211-*1 20
VA3213 3.9K 0.1uF CK- D3215
CE_REMOTE 12 IP4294CZ10-TBR ESD_HDMI_Innochips
13 ESD_HDMI_Amotech OPT 16V 19
CEC_REMOTE
EAG63530101
OPT CK_GND 1 10
CK- 11 AR3215 CK-_HDMI4 18
12 AR3207 5.1 2 9
EAG59023302
CK+ CK+_HDMI4
CK_GND 5.1 D3210 10 AR3215-*1 AR3214-*1 17
11 1/16W IP4294CZ10-TBR 3 8 0 0 16
1 10 D0- 1/16W 1/16W
CK+ CK-_HDMI1 9 4 7 15
10 2 9 D0-_HDMI4
D0_GND
D0- CK+_HDMI1 8 5 6 14
9 3 8 AR3207-*1 AR3208-*1 D0+_HDMI4
D0+ 13
0 0
D0_GND 7 EOS_5.1OHM ESD_HDMI_TMDS
8 4 7 1/16W 1/16W 12
D0-_HDMI1 D1- +3.5V_ST
D0+ EOS_5.1OHM 5 6 6 11
7 D0+_HDMI1 D3214 EOS_0OHM EOS_0OHM
D1_GND IP4294CZ10-TBR 10
D1- 5
6 ESD_HDMI_TMDS 1 10 9
D1+ AR3214 D1-_HDMI4 R3246
D1_GND 4 5.1 2 9 10K 8
5 D1+_HDMI4
MHL
AR3208 EOS_0OHM EOS_0OHM D2- 7
D1+ 3 3 8 MHL E
4 5.1 D3211 R3243 Q3201 6
1/16W IP4294CZ10-TBR D2_GND 4 7 R3247 10K
D2- 1K MMBT3906(NXP)
1 10 2 D2-_HDMI4 MHL B MHL 5
3 D1-_HDMI1 5 6
D2+ 1/16W
D2_GND 2 9 1 D2+_HDMI4 C3223 C C
4
2 D1+_HDMI1 5%
EOS_5.1OHM 0.047uF 3
D2+ 3 8 ESD_HDMI_TMDS 25V B
MHL_DET 2
1 4 7 R3277 MHL
D2-_HDMI1 0 VA3217 Q3200 1
EOS_5.1OHM 5 6 JK3203 1/16W 5.6V MMBT3904(NXP) E
D2+_HDMI1 DAADR019A 5%
NON_MHL MHL_AMOTECH
MHL HDMI2 With MHL JK3203-*1
JK3202 HDMI_JACK_FOOSUNG 5501-56219
ESD_HDMI_TMDS HDMI_JACK_CNPLUS
Multi_MHL_Innochips
YKF45-7058V
VA3217-*1
ICVS0505201FR HDMI LEAKAGE Workaround in MTK A2(A0) (Default= with HDMI_LEAKAGE)
EDID +5V_NORMAL For CEC

A1
A2
+3.5V_ST +3.3V_NORMAL
5V_HDMI_4 +3.5V_ST D3203-*1
KDS184
IC3203-*1 HDMI_SW_KEC R3255
C
0
A1
A2
A1
A2
OPT
BR24G02FJ-3GTE2
D3203 D3205
1/16W
A1
A2
MMBD6100 MMBD6100
HDMI_SW_SUZHOU HDMI_SW_SUZHOU 5%
D3205-*1
C
A0 VCC KDS184
1 8 R3209 PANEL_VCC
HDMI_SW_KEC 27K
C
AR3205
1/16W
A1 WP R3210
47K
2 7 120K R3254
10K
D3208 VDD3V3_HDMI
BAT54_SUZHO
A2 SCL
G
3 6 DDC_SDA_4
G
From HDMI Connector To NEC MICOM

DDC_SCL_4
GND SDA CEC_REMOTE HDMI_CEC
D
4 5
D
Q3210 NTR4501NT1G
G
RUE003N02 Q3202
Q3210-*1 HDMI_CEC_FET_ROHM
5V_HDMI_1 SI1012CR-T1-GE3 C3227
HDMI_EXT_EDID_ROHM +3.5V_ST 0.1uF
HDMI_CEC_FET_VISHAY
D
+5V_NORMAL 16V
R3253
4.7K
OPT
A1
A2
A1
A2
IC3203 D3216 D3216-*1

M24C02-RMN6T MMBD6100 KDS184
HDMI_SW_SUZHOU HDMI_SW_KEC
C
R3278 4.7K
E0 VCC HDMI_EXT_EDID
1 8
AR3206
1/16W
E1 WC
47K
2 7
E2 SCL R3258 33
3 6
DDC_SCL_1
HDMI_EXT_EDID
VSS SDA R3259 33
4 5 DDC_SDA_1
HDMI_EXT_EDID
HDMI_EXT_EDID_ST
C
R3271 10K B Q3209
EDID_WP MMBT3904(NXP)
R3272 HDMI_EXT_EDID
HDMI_EXT_EDID
10K E
OPT

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. HDMI(MHL) 9 29
SPDIF OUT
Default_Solteam Multi_Foxconn
+3.3V_NORMAL JK3401 JK3401-*1
JST1223-001 2F01TC1-CLM97-4F
GND GND 1
Fiber Optic
Fiber Optic
VCC VCC 2
2
VINPUT VIN 3
SPDIF_OUT
3
4
4
SHIELD
C3402 C3400
47pF 0.1uF
50V 16V
AV/COMPONENT REAR
Place JACK Side Place SOC Side
R3404 100 C3403 0.047uF
AV1_CVBS_IN_SOC
+3.3V_NORMAL C3401 3216
R3403
VA3406 150pF 75 R3405 33
OPT C3404 0.047uF
5.5V COMP2_Y_IN_SOC
PPJ245N2-01
JK3402 R3406 C3405 1000pF
10K COMP2_Y_IN_SOC_SOY
[ GN/YL]E-LUG
6A
R3401
1K
5A AV_CVBS_DET
[GN/YL]O-SPRING
Default_Amotech
4A
[GN/YL]CONTACT VA3403 Multi_Innochips
5.6V VA3403-*1
5B [BL]O-SPRING +3.3V_NORMAL
COMP1_Pb ICVS0505201FR
7C [RD1]E-LUG-S VA3404
5.5V
5C R3410
[RD1]O-SPRING 10K
COMP1_Pr
VA3405 R3402 R3499
4C [RD1]CONTACT 1K
5.5V 0
COMP1_DET COMP1_DET SC_DET
5D Default_Amotech
[WH]O-SPRING VA3400
COMP1/AV1/DVI_L_IN 5.6V
Default_Amotech Multi_Innochips
4E [RD2]CONTACT
VA3401 VA3400-*1
Multi_Innochips
5.6V VA3401-*1 ICVS0505201FR
5E [RD2]O-SPRING
ICVS0505201FR
6E [RD2]E-LUG
COMP1/AV1/DVI_R_IN
Default_Amotech
VA3402
5.6V Multi_Innochips
VA3402-*1
ICVS0505201FR

FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS xxLX761H-GA 2015.02.02
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR SPDIF/Comp 10 29
RS232C EXT UART SWITCH
DBG_SW CONNECTION
UART_SW2 CONNECTION
L B0 - A M14 ADJ.
1A@5V /1A@12V FOR COMMERCIAL(RS-232C POWER) L B0 - A NEC INTERACTIVE
H B1 - A M14 DEBUG
H B1 - A CPU INTERACTIVE
EXT_5V EXT_12V
10
5 UART_SW1
UART_SW2
9 IC3811
NLASB3157DFT2G IC3802
IR_OUT_RS232C 4 NLASB3157DFT2G
+3.5V_ST
+3.5V_ST +3.5V_ST
IC3800 8 SELECT B1 R3801 22 R3805
6 1 SOC_DBG_TX B1 SELECT
MAX3232CDR R3820 100 22
SOC_NEC_TX 1 6
3 ON SEMICONDUCTOR
VCC ANALOG SWITCH GND ON SEMICONDUCTOR
7 5 2 ANALOG SWITCH
GND VCC
C3800 0.1uF C1+ VCC R3821 100 C3822 2 5
1 16 2
C3804 0.1uF A B0 C3811
R3802 22
SOC_TX 4 3 RS232_TX B0 A 0.1uF
C3801 0.1uF V+ GND 6 R3854 0 3 4 R3855 0
2 15 0.1uF D3804 D3805 NEC_TX RS232_TX
20V 20V 1 EAN38256201
OPT OPT EAN38256201
C1- DOUT1
3 14
+3.5V_ST
SPG09-DB-009
C3802 0.1uF C2+ RIN1
4 13 JK3803 IC3812
R3834
50V NLASB3157DFT2G IC3804
1K
NLASB3157DFT2G
C2- ROUT1
5 12
BAP70-02 SELECT B1 R3803 22
+3.5V_ST 6 1 R3806
D3803 SOC_DBG_RX 22 B1 SELECT
C3803 0.1uF V- DIN1 SOC_NEC_RX 1 6
6 11 ON SEMICONDUCTOR
VCC ANALOG SWITCH GND ON SEMICONDUCTOR
5 2 GND ANALOG SWITCH VCC
DOUT2 DIN2 R3811 R3814 C3823 2 5
7 10 C3813
4.7K 4.7K 0.1uF A B0 R3804 22 0.1uF
RS232_RX SOC_RX 4 3 RS232_RX B0 A
RIN2 ROUT2 R3858 0 3 4 R3859 0
8 9 NEC_RX RS232_RX
EAN38256201
RS232_TX EAN38256201
EAN41348201
UART DBG SWITCH EXT_SPK_CONTROL & DBG OUT

UART_DBG_SW CONNECTION DBG_SW CONNECTION
+3.3V_NORMAL
L B0 - A Debug NEC DBG_SW L B0 - A DEBUG_NEC/M14
H B1 - A Debug M14 IC3806 H B1 - A EXT.SPK VOL Control
R3849 NLASB3157DFT2G +3.5V_ST
+3.5V_ST UART_DBG_SW 3.6K
IC3805
NLASB3157DFT2G B1 SELECT
EXT_SPK_VOL+ 1 6
R3844 R3845
4.7K 4.7K ON SEMICONDUCTOR
OPT +3.5V_ST ANALOG SWITCH
B1 SELECT GND VCC
SOC_DBG_TX 1 6 2 5
ON SEMICONDUCTOR C3816
GND ANALOG SWITCH VCC B0 A 0.1uF
2 5 JK_DBG_TX 3 4
C3814
B0 A 0.1uF EAN38256201
NEC_DBG_TXD 3 4 JK_DBG_TX JK3801
EAN38256201 PEJ027-04
+3.3V_NORMAL E_SPRING 3
JP3801
IC3808 T_TERMINAL1 6A
R3851 NLASB3157DFT2G +3.5V_ST
IC3807 3.6K
NLASB3157DFT2G B_TERMINAL1 7A
B1 SELECT OPT
1 6 OPT
EXT_SPK_VOL- C3818 D3806 R_SPRING
B1 SELECT 1000pF 4
1 6 ON SEMICONDUCTOR C3817 50V 5.6V
SOC_DBG_RX GND ANALOG SWITCH VCC 0.1uF
2 5 T_SPRING
JP3802
ON SEMICONDUCTOR 5
GND ANALOG SWITCH VCC
2 5
C3815 B0 A B_TERMINAL2 7B
JK_DBG_RX 3 4
0.1uF
B0 A OPT
NEC_DBG_RXD 3 4 EAN38256201 C3819 D3807 T_TERMINAL2 6B
JK_DBG_RX
1000pF 5.6V
EAN38256201 50V OPT
EXT_SPK

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. RS232/UART/VOL_CTL 11 29
P4000
+3.5V_WIFI
SMAW200-H18S5 L4000 Delete for voltage drop, 131120
C4006
C4005 22uF
0.1uF
GND 1 2 +3.5V_WIFI 10V
R4001 R4018
BT_RESET
100 BT_RESET 3 4 USB_DM 10
WIFI_DM
RCLAMP0502BA
C4003 R4033 R4019
+3.5V_ST
WOL/WIFI_POWER_ON 0.1uF 2K NC 5 6 USB_DP 10
WIFI_DP
OPT +3.5V_ST
R4002 Place Near Wafer
WOL GND
D4000
I2C_SDA2
R4012 100
EYE_Q_CPU
100
7 8 C4016
5pF
C4015
5pF
AR4001
R4005 100
C4004
0.1uF
SDA 9 10 GND OPT
50V 50V
WIFI_DMDP_5pF WIFI_DMDP_5pF R4008 R4009
3.3K 10K 10K
EYE_SDA R4006
5%
EYE_SCL SCL 11 12 KEY1 5% 5%
100
EYE_Q_MICOM KEY1
R4007
R4013 100
GND 13 14 KEY2 100
I2C_SCL2 KEY2
EYE_Q_CPU
R4034 22
IR 15 16 +3.5V_ST +3.5V_ST
IR
C4007 C4001 C4002
100pF ZD4000 D4001
LED_R 17 18 GND C4008
1000pF
0.1uF
OPT
0.1uF
OPT
50V 5.48VTO5.76V 5.6V 50V
OPT OPT
19
GND
R4015
1.8K
LED_R
OPT
C4009
0.1uF
16V
IR OUT +3.5V_ST
R4024 +3.5V_ST
1K
IR_OUT_RS232C
Q4001 R4026
2SC3052 1K
IR_OUT_ISAHAYA C R4025 10K
B
E
C R4027 33K
B WIFI POWER ENABLE CONTROL
E
+3.5V_ST Q4002
2SC3052
IR_OUT_ISAHAYA
+3.5V_WIFI
+3.5V_ST IC4001
R4029
AP2191WG-7
1K
IR_OUT_HDMI1
IN OUT
5 1
C R4030 10K
B R4035 C4010
Q4003
E 10K 0.1uF GND
2SC3052 OPT 2
C IR_OUT_ISAHAYA Q4004
R4031 2K R4032
IR_OUT_CTRL B 2SC3052
30K
E IR_OUT_ISAHAYA EN FLG OPT
R4022 33 4 3
WIFI_EN
R4021 C4017
10K 0.1uF
16V
OPT
Q4001-*1 Q4002-*1 Q4003-*1 Q4004-*1

2N3904S 2N3904S 2N3904S 2N3904S
C C C IR_OUT_KEC C
IR_OUT_KEC IR_OUT_KEC IR_OUT_KEC
B B B B
E E E E

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. IR / KEY 12 29
+5V_USB_3
USB2 Side(Side Up)
USB_ESD_SEMTECH
USB_ESD_KEC
D4302-*1
C4308 C4306
D4302
5V
10uF 22uF
5V
10V 10V 3AU04S-305-ZC-(LG)
JK4300
1
USB DOWN STREAM
EOS_2.2ohm
R4302 2.2
2
USB_DM3
USB_ESD_0582B
EOS_2.2ohm
RCLAMP0582B
R4301 2.2
3
USB_DP3
D4301
EOS_0ohm
4
R4302-*1 0
5
EOS_0ohm
R4301-*1 0
Multi_Toshiba USB_ESD_0502BA
D4301-*2 D4301-*1
DF3D6.8MS RCLAMP0502BA
+5V_USB_2
USB1 SIDE(Side Down)

USB_ESD_SEMTECH
USB_ESD_KEC
D4303-*1
C4307 C4304
D4303
10uF 22uF
5V
5V
10V 10V
3AU04S-305-ZC-(LG)
JK4302
1
USB DOWN STREAM
EOS_2.2ohm
R4304 2.2 2
USB_DM2
EOS_2.2ohm
R4303 2.2
3
USB_DP2
USB_ESD_0582B
RCLAMP0582B
EOS_0ohm
4
R4304-*1 0
5
EOS_0ohm
D4300
R4303-*1 0
Multi_Toshiba USB_ESD_0502BA
D4300-*2 D4300-*1
DF3D6.8MS RCLAMP0502BA

USB1/2 13 29
AUDIO AMP(NTP7514)
Near AMP
Instant_Power_On AMP_RESET_N
R5618 100
R5619
C5624
4.7K
+13V_A 1000pF
50V
+13V_AMP
AMP_EN_OLD
L5607 +3.3V_NORMAL
Q5602
UBW2012-121F
AO3407B
S D
C5629 C5630 L5601 L5604

R5615 C5631 10.0uH
0.01uF 0.1uF G BLM18PG121SN1D
33K 4.7uF C5633 SPK_L+
50V 50V 50V 0.1uF NRS6045T100MMGK
50V
50V
AUD_SCK +13V_AMP R5603
22000pF
AMP_EN_NEW 3.3
C5604
R5616 1/10W
Q5602-*1 C5618 R5607
47K
SSM3J332R 0.1uF 4.7K
C5603 50V
D
C5611
[EP]GND
C
S
0.1uF C5606 390pF
VDD_IO
GND_IO
PGND1A
PVDD1A
PVDD1B
R5614 10K B Q5600 50V
AMP_PWR_EN 16V 10uF
CLK_I
RESET
BST1A
OUT1A
MMBT3904(NXP) 25V C5616
G
R5613 E
0.47uF SPEAKER_L
50V
10K
AD
C5612
390pF
50V C5619 R5608
0.1uF
50V 4.7K
R5604
40
39
38
37
36
35
34
33
32
31
3.3
1/10W
L5605
NC_1 1 30 OUT1B 10.0uH
SPK_L-
+13V_A +13V_AMP NRS6045T100MMGK
VDD_PLL 2 29 PGND1B C5608
THERMAL 22000pF
L5606 NC_2 3 41 28 BST1B 50V
UBW2012-121F C5601
1uF
10V GND 4 27 VDR1
OPT
NC_3 5 IC5600 26 NC_5
C5602
1uF
10V
DVDD 6 NTP7515 25 AGND
AUD_LRCH
SDATA 7 24 VDR2
WCK 0x54 BST2A
C5610
1uF
C5615
1uF
AUD_LRCK 8 23 10V 10V
AR5601 NC_4 9 22 PGND2A C5609

100 22000pF
1/16W
I2C_SDA1
SDA 10 21 OUT2A 50V
I2C_SCL1
11
12
13
14
15
16
17
18
19
20
C5622 C5623
33pF 33pF L5602
50V 50V 10.0uH
SCL
FAULT
MONITOR_0
MONITOR_1
MONITOR_2
BST2B
PGND2B
OUT2B
PVDD2B
PVDD2A
SPK_R+
NRS6045T100MMGK
+3.3V_NORMAL +13V_AMP
R5605
3.3
1/10W C5620
R5601 0.1uF R5609
10K C5613 50V 4.7K
AMP_MUTE_MICOM 390pF C5617
50V 0.47uF
C5607 50V
22000pF
R5602 100 10uF

C5614
SPEAKER_R
C AMP_MUTE_MICOM 25V 390pF
AMP_MUTE_MICOM
50V C5621
0.1uF R5610
R5600 10K B Q5601 4.7K
50V
AMP_MUTE MMBT3904(NXP) R5606 50V

AMP_MUTE_MICOM AMP_MUTE_MICOM C5600 3.3
C5605
1000pF 1/10W L5603

I2S_AMP
E
50V 10.0uH
WOOFER_MUTE
SPK_R-
NRS6045T100MMGK
R5690 100
POWER_DET
AMP_MUTE_PWR_DET
WAFER-ANGLE
TP5601 WOOFER_MUTE
SPK_L+
4
SPK_L-
3
SPK_R+
2
SPK_R-
1
P5600
Black : Box_Type

ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR AUDIO AMP(MAIN) 15 29
FE_DEMOD1_TS_ERROR
1. should be guarded by ground

2. No via on both of them
3. Signal Width >= 12mils
close to Tuner Signal to Signal Width = 12mils
+3.3V_NORMAL Ground Width >= 24mils
L6500
BLM18PG121SN1D
1 +3.3V_LNA_TU C6501
0.1uF
TU_ALL_IntDemod_H15
R6506 1K
3 IF_AGC_TU IF_AGC
C6502 close to Tuner TU_ALL_IntDemod
0.1uF
16V +3.3V_NORMAL
AR6500 AR6500-*1
TU_ALL_2178B
33 200
1/16W 1/16W
4 I2C_SCL6_TU I2C_SCL6
L6506
C6505
47pF I2C_SDA6
5 50V TU_ALL 1608 perallel
I2C_SDA6_TU TU_W_BR/TW
C6503 OPT because of derating
47pF TU_ALL_2178B
50V C6521 TU_ALL_2178B
TU_SIF_TU 1uF TU_ALL_2178B
OPT R6516 R6517
10V 200 200
R6504
10
6 IF_P_TU
TU_ALL_IntDemod C6519 IF_P TU_CVBS
33pF should be guarded by ground,Match GND VIA
R6505 E
10
7 IF_N_TU C6520 IF_N
TU_ALL_IntDemod 33pF TU_ALL_2178B
B Q6502
MMBT3906(NXP)
C
8 TU_SIF_TU
TU_M_KR/EU // W_ALL
9 TU_CVBS_TU
L6501 +3.3V_NORMAL
Global F/E Option Name BLM18PG121SN1D
1. TU 10
2. Tuner Name = TDJ’H’,TDj’M’... C6510
3. Country Name = KR,US,BR,EU ... 0.1uF
11 +3.3V_TU
TU_M_KR/EU // W_ALL
Example of Option name
12 close to Tuner

TU_ALL_IntDemod = All Tuner type for Internal demod FE_DEMOD1_TS_ERROR
TU_M/W = apply TDSM&TDSW Type Tuner FE_DEMOD1_TS_ERROR

14 FE_DEMOD1_TS_CLK FE_DEMOD1_TS_CLK
14’ Tuner Type for Global

TDJ’H’-G101D : Half NIM for EU,AJJA 15 FE_DEMOD1_TS_SYNC FE_DEMOD1_TS_SYNC
TDJ’H’-H101F : Half NIM for US, KR
TDJ’K’-T101F : Half NIM for TW 16 FE_DEMOD1_TS_VAL FE_DEMOD1_TS_VAL
TDJ’M’-C301D,F : FULL NIM for China
TDJ’M’-B101F : Brazil NIM with Isolater Type
17 FE_DEMOD1_TS_DATA[0]
TDJ’M’-K101F : colombia NIM
TDJ’M’-G101D,G105D,G151D : EU Combo&Full NIM
18 FE_DEMOD1_TS_DATA[1] FE_DEMOD1_TS_DATA[0-7]
TDJ’M’-H101F,H151F : Korea PIP tuner
TDJ’W’-A151D : AJJA T2 PIP FE_DEMOD1_TS_DATA[0]
19 FE_DEMOD1_TS_DATA[2] FE_DEMOD1_TS_DATA[1]
FE_DEMOD1_TS_DATA[5] FE_DEMOD1_TS_DATA[7]
22
TU_M/W
R6501
TU_M/W 100 /TU_RESET1 +3.3V_NORMAL
25 /TU_RESET1_TU
C6507
TU_M/W
L6503
16V BLM18PG121SN1D
0.1uF
26 +3.3V_DEMOD_TU
C6511 TU_M/W TU_M/W
0.1uF AR6501
33
27
I2C_SCL4_TU I2C_SCL4
OPT
C6513
I2C_SDA4
28 18pF
50V
29 LNB_TX LNB_TX
30 I2C_SDA4_TU
OPT
C6512
31 LNB_OUT LNB_OUT 18pF
50V

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. TUNER 17 29
TU_H_EU TU_M_EU
TU6701 TU6702
TDJH-G301D TDJM-G301D
TU_M_BR TU_CHINA
TU6702-*1 TU6702-*2
TDJM-B301F TDJM-C401D
+3.3V +3.3V
1
+3.3V
1
+3.3V 1 1 +3.3V_LNA_TU 1
NC_1 NC_1
2 2
3
NC_2
3
NC_2 NC_1 NC_1
4
SCL_RF
4
SCL_RF 2 2
SDA_RF SDA_RF
5 5
6
NC_3
6
NC_3 IF_AGC AIF_AGC
7
NC_4 NC_4 3 3 IF_AGC_TU
8
SIF
7
8
SIF
3
9
CVBS
9
CVBS SCL_RF SCL_RF
10
NC_5
10
NC_5 4 4 I2C_SCL6_TU 4
+3.3V_RF +3.3V_RF
11 11
12
ERROR
12
ERROR SDA_RF SDA_RF
13
GND_1
13
GND_1 5 5 I2C_SDA6_TU 5
MCLK MCLK
14 14
15
SYNC
15
SYNC IF[P] AIF[P]
16
VAILD
16
VAILD 6 6 IF_P_TU 6
D0 D0
17 17
18
D1
18
D1 IF[N] AIF[N]
19
D2
19
D2 7 7 IF_N_TU 7
D3 D3
20 20
21
D4
21
D4 SIF SIF
22
D5
22
D5 8 8 TU_SIF_TU 8
D6 D6
23 23
24
D7
24
D7 CVBS CVBS
25
RESET_DEMOD
25
RESET_DEMOD 9 9 TU_CVBS_TU 9
+3.3V_DEMOD +3.3V_DEMOD
26 26
27
SCL_DEMOD
27
SCL_DEMOD NC_2
28
+1.2V_DEMOD
28
+1.2V_DEMOD 10 10
NC_6 NC_6
29 29
30
SDA_DEMOD
30
SDA_DEMOD A1 B1 +3.3V_RF
A1 B1 11 +3.3V_TU
A1
A1 B1
B1 A1
A1 B1
B1
11
47 47 47 ERROR
SHIELD 12 FE_DEMOD1_TS_ERROR
TU_GND_B
SHIELD
12
GND_1
SHIELD 13
13
MCLK
14 FE_DEMOD1_TS_CLK
14
SYNC
15 FE_DEMOD1_TS_SYNC
VALID
16 FE_DEMOD1_TS_VAL
16
D0
17 FE_DEMOD1_TS_DATA[0] 17
D1
18
D2
19
D3
20
D4
21
D5
22
D6
23
D7
24
RESET_DEMOD
25 /TU_RESET1_TU
25
+3.3V_DEMOD
26 +3.3V_DEMOD_TU
26
SCL_DEMOD
27 I2C_SCL4_TU
27
+1.2V_DEMOD
TU_GND_B
28 D_Demod_Core
LNB
NC_3 R6721
29 LNB_TX
0
SDA_DEMOD
30 I2C_SDA4_TU
LNB 30
TU_H/M_EU/CN LNB
TU_H/W_EU/JP
R6722
C6701
TU_H/M_EU TU_H/M_CN 31 LNB_OUT 31
1000pF C6710 C6702 0
0
R6701
GND
R6712-*1
630V 1000pF
630V
1000pF 32 32
TU_H/M_BR
TU_EU/CN
630V
R6712
22
A1 B1
A1 B1
47 47
TU_GND_B
SHIELD
DVB-T GND DVB-S JACK GND
D_Demod_Core
TU_M/W_1.2V
TU_M/W
POWER_ON/OFF2_1
R6703-*1 R6704-*1
IC6700
TU_M/W_1.1V TU_M/W_1.1V
TJ2132GDP [EP]GND
10.5K
TU_M/W
10K
10K
R6703 R6704
+3.5V_ST POK GND R1

R6705 1 8
THERMAL
10.5K
9.1K
TU_M/W_1.2V
EN FB R2
9
2 7
L6701 C6706
BLM18PG121SN1D 0.01uF
IN OUT 50V
TU_M/W 3 6
TU_M/W C6703
TU_M/W C6708
10uF
0.1uF
10V +5V_NORMAL
BIAS
4 2A 5
SS
TU_M/W
C6705 C6707
2700pF 10uF
50V 10V
TU_M/W
C6704
1uF
10V
Vout=0.6*(1+R2/R1)

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. TU_SYMBOL 18 29
DVB-S2 LNB Part Allegro Input trace widths should be sized to conduct at least 3A
Ouput trace widths should be sized to conduct at least 2A
(Option:LNB)
LNB
+13V Q6901 +13V_M
PMV48XP
D
LNB LNB LNB
C6913 R6908 C6914
0.1uF 36K 0.1uF
G
50V 50V
+13V_M
LNB
R6909
2A D6904-*1
Max 1.3A +3.3V_NORMAL LNB
150K
C
R6910 LNB
40V 10K B Q6902
LNB_SUZHOU LNB_TSC LNB_SX34 MMBT3904(NXP)
D6902-*2 D6902 1/16W LNB
D6902-*1 3.0A
SS2040LL-LG SS23L LNB_ONSEMI D6904
3A 5% C6915
4.7uF
10V
E
40V 30V 30V 40V
LNB
LPH6050T-150M-R
15uH
L6900
LNB_SMAB34
C6909
10uF
C6903 C6905 C6906 C6907 25V
0.01uF 10uF 10uF 10uF LNB
50V 25V 25V 25V
LNB LNB LNB LNB
C6908 0.1uF
close to Boost pin(#1)
LNB_Allegro
A_GND A_GND
40V 30V close to VIN pin(#15) Caution!! need isolated GND
BOOST
R6904
[EP]
NC_4
NC_3
PGND
SS2040LL-LG SS23L C6910 0
A_GND
LX
D6901-*2 D6901-*1 0.1uF
50V LNB
LNB_SUZHOU LNB_TSC
20
19
18
17
16
LNB
D6901 NC_1 1 15 VIN
MBR230LSFT1G THERMAL A_GND
LNB 2 14 GND
LNB_OUT 21
30V LNB
D6903 NC_2 3 13 VREG
LNB_ONSEMI C6904
0.1uF LNB_SMAB34 IC6900 R6903
C6900 C6901 R6900 TDI ISET 39K
2.2K LNB 50V 40V 4 DT1803 12
0.1uF 33pF LNB_DMBT
LNB LNB D6900 1W C6902 TDO TCAP C6912 1/16W
LNB LNB 0.22uF 5 11 1%
LNB 25V D6903-*1
10
LNB
LNB_SX34
6
0.1uF
40V
IRQ
SCL
SDA
ADD
TONECTRL
0.22uF
Close to Tuner A_GND
A_GND
Surge protectioin
LNB
C6911
LNB
33
AR6901
LNB_NON_Tx
LNB_Tx
0
R6911
0
R6912
LNB_TX
GND
LNB_TX
I2C_SCL4
I2C_SDA4
[EP]GND
BOOST
GNDLX
NC_3
NC_2
LX
20
19
18
17
16
LNB_Allegro
VCP 1 15 VIN
THERMAL
LNB 2 14 GND
21
NC_1 3 13 VREG
IC6900-*1
TDI A8303SESTR-T(4M)
4 12 ISET
TDO 5 11 TCAP
10
6
9
IRQ
SCL
SDA
ADD
TONECTRL
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. LNB 19 29
LVDS
[51Pin FHD LVDS Connector_FLIP TYPE]
P7201
SP14-11592-01-51Pin
NC R7210 33
1 2D/3D_CTL
NC OPT
2
LVDS_SEL
NC
3
NC CP_BOX R7200 0 +3.3V_NORMAL
4 I2C_SDA1
NC CP_BOX R7201 0
5 I2C_SCL1
NC OPT R7204 0 R7217
6
3.3K
LVDS_SEL LVDS_SEL_HIGH
7
NC R7218 33
8 PWM_DIM R7215
NC LGD_T-Con_Scanning 10K
9 LVDS_SEL_LOW
R7220 33
L/DIM_ENABLE
10 OPT
R7219 33
GND OPC_EN
11
OPT
RA0N
12 TXA0N/TX11N
RA0P
13 TXA0P/TX11P
RA1N
14 TXA1N/TX10N
RA1P
15 TXA1P/TX10P
RA2N
16 TXA2N/TX9N
RA2P
17 TXA2P/TX9P
GND
18
RACLKN
19 TXACLKN/TX8N
20
RACLKP H or FLOAT : 10-bit
TXACLKP/TX8P <L : 8-bit>
GND
21 BIT_SEL
RA3N
22 TXA3N/TX7N
RA3P
23 TXA3P/TX7P +3.3V_NORMAL
RA4N
24 TXA4N/TX6N
RA4P
25 TXA4P/TX6P R7213
GND R7221 3.3K
26 MO_FHD_non_55CSOT
BIT_SEL_HIGH
BIT_SEL0
27
RB0N
28 TXB0N/TX5N
RB0P R7214
29 TXB0P/TX5P 10K
RB1N
30 TXB1N/TX4N BIT_SEL_LOW
RB1P
31 TXB1P/TX4P
RB2N
32 TXB2N/TX3N
RB2P
33 TXB2P/TX3P
GND
34
RBCLKN
35 TXBCLKN/TX2N
RBCLKP
36 TXBCLKP/TX2P
GND
37
RB3N
38 TXB3N/TX1N
RB3P
39 TXB3P/TX1P
RB4N
40 TXB4N/TX0N
RB4P
41 TXB4P/TX0P
GND R7222
GND 0
R7223
GND 0
44
GND PANEL_VCC
45
GND L7200
46
UBW2012-121F
NC
47
VLCD AUO_SHARP
48
VLCD
49
C7200 C7201 C7202
VLCD
50 0.1uF 22uF 22uF
25V 25V 25V
VLCD
51 OPT OPT OPT
52
GND

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. LVDS INTERFACE 20 29
eMMC I/F
DVDD18_EMMC 3.3v power delete, 131120
R8117
R8116
1/16W
10K
AR8103
1/16W
10K
AR8104
10K
10K
IC8100
THGBMBG5D1KBAIL
EMMC5.0 for 15Y
EMMC_DATA[0-7] AR8100
22
1/16W
EMMC_DATA[0] A3 C7
DAT0 NC_22
EMMC_DATA[1] A4 C8
DAT1 NC_23
EMMC_DATA[2] A5 C9 IC8100-*1 IC8100-*3 IC8100-*5
DAT2 NC_24 THGBMBG6D1KBAIL H26M41103HPR H26M31001HPR
EMMC_DATA[3] B2 C10
EMMC_DATA[4] DAT3 NC_25
B3 C11 A3
A4
DAT0 NC_23
C8
C9
A3
A4
DAT0 NC_22
C7
C8
A3
A4
DAT0 NC_22
C8
C9
EMMC_DATA[5] DAT4 NC_26 A5
DAT1 NC_24
C10 A5
DAT1 NC_23
C9 A5
DAT1 NC_23
C10
B4 C12 B2
DAT2 NC_25
C11 B2
DAT2 NC_24
C10 B2
DAT2 NC_24
C11
EMMC_DATA[6] DAT5 NC_27 B3

DAT3
DAT4
NC_26
NC_27
C12 B3
DAT3
DAT4
NC_25
NC_26
C11 B3
DAT3
DAT4
NC_25
NC_26
C12
B5 C13 B4
DAT5 NC_28
C13 B4
DAT5 NC_27
C12 B4
DAT5 NC_27
C13
EMMC_DATA[7] AR8101 DAT6 NC_28 B5

B6
DAT6 NC_29
C14
D1
B5
B6
DAT6 NC_28
C13
C14
B5
B6
DAT6 NC_28
C14
D1
22 B6 C14 DAT7 NC_30
D2
DAT7 NC_29
D1
DAT7 NC_29
D2
1/16W DAT7 NC_29 NC_31

NC_32
D3
NC_30
NC_31
D2
NC_30
NC_31
D3
D1 M6
CLK NC_33
D4 M6
CLK NC_32
D3 M6
CLK NC_32
D4
NC_30 DAT5 M5
CMD NC_34
D12
D13
M5
CMD NC_33
D4
D12
M5
CMD NC_33
D12
D13
D2 NC_35
D14
NC_34
D13
NC_34
D14
NC_36 NC_35 NC_35
NC_31 A6
VSS_1 NC_37
E1 A7
RFU_1 NC_36
D14 A6
RFU_1 NC_36
E1
M6 D3 A7
C5
RFU_2 NC_38
E2
E3
E5
E8
RFU_2 NC_37
E1
E2
A7
C5
RFU_2 NC_37
E2
E3
CLK NC_32 E5
NC_21 NC_39
E12
VSF_1 NC_38
E3 E5
RFU_3 NC_38
E12
M5 D4 E8
RFU_4 NC_40
E13 G3
NC_39
E12 E8
RFU_4 NC_39
E13
CMD NC_33 E9
RFU_5
VSF_1
NC_41
NC_42
E14 G10
RFU_3
VSF_5
NC_40
NC_41
E13 E9
RFU_5
RFU_6
NC_40
NC_41
E14
D12 E10
F10
VSF_2 NC_43
F1
F2
K6
K7
RFU_4 NC_42
E14
F1
E10
F10
RFU_7 NC_42
F1
F2
NC_34 G3
VSF_3 NC_44
F3 K10
RFU_5 NC_43
F2 G3
RFU_8 NC_43
F3
D13 G10
RFU_9
RFU_10
NC_45
F12 P7
VSF_6 NC_44
F3 G10
RFU_9 NC_44
F12
NC_46 NC_102 NC_45 RFU_10 NC_45
NC_35 H5
DS NC_47
F13 P10
VSF_7 NC_46
F12 H5
RFU_11 NC_46
F13
A7 D14 J5
K6
VSS_5 NC_48
F14
G1 H5
NC_47
F13
F14
J5
K6
RFU_12 NC_47
F14
G1
RFU_2 NC_36 K7
RFU_13 NC_49
G2
DS NC_48
G1 K7
RFU_13 NC_48
G2
E5 E1 K10
RFU_14 NC_50
G12 E9
NC_49
G2 K10
RFU_14 NC_49
G12
RFU_4 NC_37 P7
RFU_15
RFU_16
NC_51
NC_52
G13 E10
VSF_2
VSF_3
NC_50
NC_51
G12 P7
RFU_15
RFU_16
NC_50
NC_51
G13
E8 E2 P10 G14 F10 G13 P10 G14
EMMC5.0_8G_TOSHIBA
EMMC5.0_8G_SKHYNIX
EMMC5.0_4G_SKHYNIX
RFU_17 NC_53 VSF_4 NC_52 RFU_17 NC_52
H1 G14 H1
RFU_5 NC_38 NC_54
H2
NC_53
H1
NC_53
H2
E3 K5
RSTN
NC_55
H3 K5
NC_54
H2 K5
NC_54
H3
NC_56 RSTN NC_55 RSTN NC_55
NC_39 NC_57
H12
NC_56
H3
NC_56
H12
G3 E12 C6
NC_58
H13
H14 C6
NC_57
H12
H13 C6
NC_57
H13
H14
RFU_9 NC_40 M4
VCCQ_1 NC_59
J1 M4
VCCQ_1 NC_58
H14 M4
VCCQ_1 NC_58
J1
AR8102 22 G10 E13 N4

VCCQ_2 NC_60
J2 N4
VCCQ_2 NC_59
J1 N4
VCCQ_2 NC_59
J2
EMMC_CLK RFU_10 NC_41 P3
VCCQ_3
VCCQ_4
NC_61
NC_62
J3 P3
VCCQ_3
VCCQ_4
NC_60
NC_61
J2 P3
VCCQ_3
VCCQ_4
NC_60
NC_61
J3
K6 E14 P5
VCCQ_5 NC_63
J12 P5
VCCQ_5 NC_62
J3 P5
VCCQ_5 NC_62
J12
DAT7
EMMC_CMD RFU_13 NC_42 NC_64
J13
J14
NC_63
J12
J13
NC_63
J13
J14
K7 F1 E6
NC_65
K1 E6
NC_64
J14 E6
NC_64
K1
EMMC_RST RFU_14 NC_43 DAT6 F5
VCC_1
VCC_2
NC_66
NC_67
K2 F5
VCC_1
VCC_2
NC_65
NC_66
K1 F5
VCC_1
VCC_2
NC_65
NC_66
K2
K10 F2 J10
K9
VCC_3 NC_68
K3
K12
J10
K9
VCC_3 NC_67
K2
K3
J10
K9
VCC_3 NC_67
K3
K12
EMMC5.0_4G_TOSHIBA
RFU_15 NC_44 VCC_4 NC_69
K13
VCC_4 NC_68
K12
VCC_4 NC_68
K13
P7 F3 NC_70
K14
NC_69
K13
NC_69
K14
RFU_16 NC_45 C2
VDDI
NC_71
NC_72
L1 C2
VDDI
NC_70
NC_71
K14 C2
VDDI
NC_70
NC_71
L1
P10 F12 NC_73
L2
L3
NC_72
L1
L2
NC_72
L2
L3
RFU_17 NC_46 E7
NC_74
L12 C4
NC_73
L3 C4
NC_73
L12
F13 G5
VSS_2 NC_75
L13 N2
VSSQ_1 NC_74
L12 E7
VSSQ_1 NC_74
L13
C8107 NC_47 H10
VSS_3
VSS_4
NC_76
NC_77
L14 N5
VSSQ_2
VSSQ_3
NC_75
NC_76
L13 G5
VSS_1
VSS_2
NC_75
NC_76
L14
OPT 10pF H5 F14 K8

C4
VSS_6 NC_78
M1
M2
P4
P6
VSSQ_4 NC_77
L14
M1
H10
K8
VSS_3 NC_77
M1
M2
DS NC_48 N2
VSSQ_1 NC_79
M3 A6
VSSQ_5 NC_78
M2 N2
VSS_4 NC_78
M3
50V G1 N5
VSSQ_2 NC_80
M7 E7
VSS_1 NC_79
M3 N5
VSSQ_2 NC_79
M7
VSSQ_3 NC_81 VSS_2 NC_80 VSSQ_3 NC_80
NC_49 P4
VSSQ_4 NC_82
M8 G5
VSS_3 NC_81
M7 P4
VSSQ_4 NC_81
M8
E9 G2 P6
VSSQ_5 NC_83
M9
M10
H10
J5
VSS_4 NC_82
M8
M9
P6
VSSQ_5 NC_82
M9
M10
VSF_1 NC_50 NC_84
M11 K8
VSS_5 NC_83
M10
NC_83
M11
E10 G12 NC_85
M12
VSS_6 NC_84
M11
NC_84
M12
VSF_2 NC_51 A1
NC_1
NC_86
NC_87
M13
NC_85
NC_86
M12 A1
NC_1
NC_85
NC_86
M13
F10 G13 A2
A8
NC_2 NC_88
M14
N1
A1
A2
NC_1 NC_87
M13
M14
A2
A8
NC_2 NC_87
M14
N1
VSF_3 NC_52 A9
NC_3 NC_89
N3 A8
NC_2 NC_88
N1 A9
NC_3 NC_88
N3
G14 A10
NC_4
NC_5
NC_90
N6 A9
NC_3
NC_4
NC_89
N3 A10
NC_4
NC_5
NC_89
N6
NC_91 NC_90 NC_90
NC_53 A11
NC_6 NC_92
N7 A10
NC_5 NC_91
N6 A11
NC_6 NC_91
N7
H1 A12
A13
NC_7 NC_93
N8
N9
A11
A12
NC_6 NC_92
N7
N8
A12
A13
NC_7 NC_92
N8
N9
NC_54 A14
NC_8 NC_94
N10 A13
NC_7 NC_93
N9 A14
NC_8 NC_93
N10
K5 H2 B1
NC_9 NC_95
N11 A14
NC_8 NC_94
N10 B1
NC_9 NC_94
N11
RSTN NC_55 B7
NC_10
NC_11
NC_96
NC_97
N12 B1
NC_9
NC_10
NC_95
NC_96
N11 B7
NC_10
NC_11
NC_95
NC_96
N12
H3 B8 N13 B7 N12 B8 N13
C8100 DVDD18_EMMC NC_56 B9

NC_12
NC_13
NC_98
NC_99
N14 B8
NC_11
NC_12
NC_97
NC_98
N13 B9
NC_12
NC_13
NC_97
NC_98
N14
B10 P1 B9 N14 B10 P1
OPT 0.1uF H12 B11

NC_14
NC_15
NC_100
P2 B10
NC_13
NC_14
NC_99
P1 B11
NC_14
NC_15
NC_99
P2
NC_101 NC_100 NC_100
NC_57 B12
NC_16 NC_102
P8 B11
NC_15 NC_101
P2 B12
NC_16 NC_101
P8
16V C6 H13 B13
B14
NC_17 NC_103
P9
P11
B12
B13
NC_16 NC_103
P8
P9
B13
B14
NC_17 NC_102
P9
P11
VCCQ_1 NC_58 C1
NC_18 NC_104
P12 B14
NC_17 NC_104
P11 C1
NC_18 NC_103
P12
3.3V_EMMC M4 H14 C3
NC_19 NC_105
P13 C1
NC_18 NC_105
P12 C3
NC_19 NC_104
P13
VCCQ_2 NC_59 C7
NC_20
NC_22
NC_106
NC_107
P14 C3
NC_19
NC_20
NC_106
NC_107
P13 C7
NC_20
NC_21
NC_105
NC_106
P14
N4 J1 C5
NC_21 NC_108
P14
VCCQ_3 NC_60
P3 J2
VCCQ_4 NC_61
P5 J3
VCCQ_5 NC_62
DAT3
DAT5
DAT6
EMMC_CLK_BALL
EMMC_CMD_BALL
EMMC_RESET_BALL
DAT4
J12
C8105 C8106 NC_63
0.1uF 2.2uF J13
NC_64
16V 10V E6 J14 EMMC_RESET_BALL
VCC_1 NC_65
F5 K1 IC8100-*2 IC8100-*4
VCC_2 NC_66 THGBMBG7D2KBAIL KLM4G1YEMD-B031
J10 K2
VCC_3 NC_67 A3 C7 A3 C7
K9 K3 A4
DAT0
DAT1
NC_22
NC_23
C8 A4
DAT0
DAT1
NC_22
NC_23
C8
VCC_4 NC_68 A5
DAT2 NC_24
C9 A5
DAT2 NC_24
C9
K12 B2
B3
DAT3 NC_25
C10
C11
B2
B3
DAT3 NC_25
C10
C11
NC_69 B4
DAT4 NC_26
C12 B4
DAT4 NC_26
C12
EMMC_VDDI K13 B5
DAT5
DAT6
NC_27
NC_28
C13 B5
DAT5
DAT6
NC_27
NC_28
C13
pattern 0.2mm NC_70 B6

DAT7 NC_29
C14 B6
DAT7 NC_29
C14
C2 K14 NC_30
D1
D2
NC_30
D1
D2
VDDI NC_71 M6
NC_31
D3 M6
NC_31
D3
L1 M5
CLK NC_32
D4 M5
CLK NC_32
D4
C8104 NC_72 CMD NC_33
NC_34
D12
CMD NC_33
NC_34
D12
1uF L2 A7
NC_35
D13
D14 A7
NC_35
D13
D14
NC_73 E5
RFU_2 NC_36
E1 E5
RFU_2 NC_36
E1
10V C4 L3 E8
RFU_4
RFU_5
NC_37
NC_38
E2 E8
RFU_3
RFU_4
NC_37
NC_38
E2
VSSQ_1 NC_74 NC_39

E3
NC_39
E3
N2 L12 G3
G10
RFU_9 NC_40
E12
E13
G3
G10
RFU_5 NC_40
E12
E13
VSSQ_2 NC_75 K6
RFU_10 NC_41
E14 K6
RFU_6 NC_41
E14
N5 L13 K7
RFU_13
RFU_14
NC_42
NC_43
F1 K7
RFU_7
RFU_8
NC_42
NC_43
F1
VSSQ_3 NC_76 K10

RFU_15 NC_44
F2 K10
RFU_9 NC_44
F2
P4 L14 P7
P10
RFU_16 NC_45
F3
F12
P7
P10
RFU_10 NC_45
F3
F12
VSSQ_4 NC_77 RFU_17 NC_46
F13
RFU_11 NC_46
F13
C8102 C8103 P6 M1 H5
DS
NC_47
NC_48
F14 H5
DATASTROBE
NC_47
NC_48
F14
0.1uF 2.2uF VSSQ_5 NC_78 NC_49

G1
NC_49
G1
A6 M2 E9
E10
VSF_1 NC_50
G2
G12
E9
E10
RFU_12 NC_50
G2
G12
16V 10V VSS_1 NC_79 F10
VSF_2 NC_51
G13 F10
RFU_13 NC_51
G13
E7 M3
EMMC5.0_16G_TOSHIBA
EMMC5.0_4G_SAMSUNG
VSF_3 NC_52 RFU_14 NC_52
EMMC_CLK_BALL NC_53
G14
NC_53
G14
VSS_2 NC_80 NC_54

H1
NC_54
H1
G5 M7 K5
RSTN NC_55
H2
H3
K5
RSTN NC_55
H2
H3
VSS_3 NC_81 NC_56
H12
NC_56
H12
H10 M8 C6
VCCQ_1
NC_57
NC_58
H13 C6
VDD_1
NC_57
NC_58
H13
VSS_4 NC_82 M4
VCCQ_2 NC_59
H14 M4
VDD_2 NC_59
H14
J5 M9 N4
P3
VCCQ_3 NC_60
J1
J2
N4
P3
VDD_3 NC_60
J1
J2
VSS_5 NC_83 P5
VCCQ_4 NC_61
J3 P5
VDD_4 NC_61
J3
K8 M10 VCCQ_5 NC_62
NC_63
J12
VDD_5 NC_62
NC_63
J12
VSS_6 NC_84 NC_64

J13
NC_64
J13
M11 E6
F5
VCC_1 NC_65
J14
K1
E6
F5
VDDF_1 NC_65
J14
K1
NC_85 J10
VCC_2 NC_66
K2 J10
VDDF_2 NC_66
K2
M12 K9
VCC_3
VCC_4
NC_67
NC_68
K3 K9
VDDF_3
VDDF_4
NC_67
NC_68
K3
NC_86 NC_69
K12
NC_69
K12
A1 M13 C2
NC_70
K13
C2
NC_70
K13
DAT3 NC_1 NC_87 VDDI NC_71

K14
L1
VDDI NC_71
K14
L1
A2 M14 NC_72
L2
NC_72
L2
DAT4 NC_2 NC_88 C4
VSSQ_1
NC_73
NC_74
L3 C4
VSS_1
NC_73
NC_74
L3
A8 N1 N2
N5
VSSQ_2 NC_75
L12 N2
N5
VSS_2 NC_75
L12
DAT7 NC_3 NC_89 P4

VSSQ_3 NC_76
L13
L14 P4
VSS_3 NC_76
L13
L14
A9 N3 EMMC_CMD_BALL P6
VSSQ_4
VSSQ_5
NC_77
NC_78
M1 P6
VSS_4
VSS_5
NC_77
NC_78
M1
NC_4 NC_90 A6
VSS_1 NC_79
M2 A6
VSS_6 NC_79
M2
A10 N6 E7
G5
VSS_2 NC_80
M3
M7
E7
G5
VSS_7 NC_80
M3
M7
NC_5 NC_91 H10
VSS_3 NC_81
M8 H10
VSS_8 NC_81
M8
A11 N7 J5
VSS_4
VSS_5
NC_82
NC_83
M9 J5
VSS_9
VSS_10
NC_82
NC_83
M9
NC_6 NC_92 K8
VSS_6 NC_84
M10 K8
VSS_11 NC_84
M10
A12 N8 NC_85
M11
M12
NC_85
M11
M12
NC_7 NC_93 A1
NC_86
M13 A1
NC_86
M13
A13 N9 A2
NC_1
NC_2
NC_87
NC_88
M14 A2
NC_1
NC_2
NC_87
NC_88
M14
NC_8 NC_94 A8
NC_3 NC_89
N1 A8
NC_3 NC_89
N1
A14 N10 A9
A10
NC_4 NC_90
N3
N6
A9
A10
NC_4 NC_90
N3
N6
NC_9 NC_95 A11
NC_5 NC_91
N7 A11
NC_5 NC_91
N7
B1 N11 A12
NC_6
NC_7
NC_92
NC_93
N8 A12
NC_6
NC_7
NC_92
NC_93
N8
NC_10 NC_96 A13

NC_8 NC_94
N9 A13
NC_8 NC_94
N9
B7 N12 A14
B1
NC_9 NC_95
N10
N11
A14
B1
NC_9 NC_95
N10
N11
NC_11 NC_97 B7
NC_10 NC_96
N12 B7
NC_10 NC_96
N12
B8 N13 B8
NC_11
NC_12
NC_97
NC_98
N13 B8
NC_11
NC_12
NC_97
NC_98
N13
NC_12 NC_98 B9
NC_13 NC_99
N14 B9
NC_13 NC_99
N14
B9 N14 B10
B11
NC_14 NC_100
P1
P2
B10
B11
NC_14 NC_100
P1
P2
NC_13 NC_99 B12
NC_15 NC_101
P8 B12
NC_15 NC_101
P8
B10 P1 B13
NC_16
NC_17
NC_102
NC_103
P9 B13
NC_16
NC_17
NC_102
NC_103
P9
NC_14 NC_100 B14

NC_18 NC_104
P11 B14
NC_18 NC_104
P11
B11 P2 C1
C3
NC_19 NC_105
P12
P13
C1
C3
NC_19 NC_105
P12
P13
NC_15 NC_101 C5
NC_20 NC_106
C5
NC_20 NC_106
Don’t Connect Power At VDDI

P14 P14
B12 P8 NC_21 NC_107 NC_21 NC_107
NC_16 NC_102
EMMC_VDDI B13 P9
NC_17 NC_103
B14 P11
NC_18 NC_104
(Just Interal LDO Capacitor) C1
C3
NC_19 NC_105
P12
P13
DAT5 NC_20 NC_106
C5 P14
NC_21 NC_107

21 29
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. eMMC
Ethernet HUB(RTL8305N-CG)
STRAPPING PIN CONFIG
Place Close To RTL8305N
C8440 C8441
15pF 15pF
50V 50V
25.0MHz
Ethernet Power X8400 LAN_ACT0
LAN_ACT2
LAN_ACT3
ETNHUB_ENDEFER
ETNHUB_AVDD18
/ETHERNET_RESET
ETNHUB_AVDD33
GYSPD
+3.5V_ST_LAN ETNHUB_DVDD33 ETNHUB_AVDD33 ETNHUB_DVDD33 ETNHUB_AVDD33
L8403 L8401 ETNHUB_DVDD18
1K OPT
1K OPT
1K OPT
1K OPT
1K OPT
1K OPT
BLM18PG121SN1D BLM18PG121SN1D
C8405 R8424 R8423 Place Close To RTL8305N
AVDD18_6
AVDD18_5
0.1uF
[EP]GND
TXON[0]
TXOP[0]
RXIP[0]
RXIN[0]
C8422 C8426 C8429
C8419 C8425 16V
AVDD33
0.1uF 0.1uF 1.69K 270
IBREF
VCTRL
0.1uF 0.1uF
22uF 1% 1% ETNHUB_DVDD33
OSCI
16V 16V 16V 16V
10V
X2
X1
R8444
R8446
R8448
R8450
R8451
R8454
1.96K
48
47
46
45
44
43
42
41
40
39
38
37
AVDD18_1 1 36 LED_ACT[0]/BCINDROP
LAN_ACT0
TXON[1] 2 35 LED_ACT[1]/GYSPD100
ETNHUB_EPHY_RXIN1 THERMAL GYSPD
TXOP[1] 3 34 LED_ACT[2]/P4ANEG
ETNHUB_EPHY_RXIP1 49 LAN_ACT2
LAN1 RXIP[1] 4 33 P4FLCTRL/CPU_INTT R8440 100
ETNHUB_EPHY_TXOP1 IC8401 ETNHUB_INT
RXIN[1] 5 32 RESET Realtek WOL R8452 22
ETNHUB_EPHY_TXON1 /ETHERNET_RESET LED_ACT[2]/P4ANEG : Auto-negotiation Enable/Disable
AVDD18_2 6 RTL8305N_REALTEK31 DVDD18_4
RXIN[2] 7 30 LED_ACT[3]/EN48PASS1
ETNHUB_EPHY_TXON2
RXIP[2] LED_ACT[4]
LAN_ACT3 All Strapping Pins are internal pull-up
ETNHUB_EPHY_TXOP2 8 29
TO PHY Chip TXOP[2] 9 28 DVDD33
ETNHUB_EPHY_RXIP2
TXON[2] 10 27 SDA_MDIO R8434 33
ETNHUB_EPHY_RXIN2 EPHY_MDIO
TXON[3] 11 26 SCL_MDC R8435 33
ETNHUB_EPHY_RXIN3 EPHY_MDC
LAN2 TXOP[3] 12 25 ENEEPROM
ETNHUB_EPHY_RXIP3
R8436 1K
13
14
15
16
17
18
19
20
21
22
23
24
IC8400
ETNHUB_AVDD33 MP20045DQ-LF-Z
RXIP[3]
RXIN[3]
TXOP[4]
TXON[4]
AVDD18_3
DVDD18_1
RXIP[4]
RXIN[4]
AVDD18_4
DVDD18_2
DVDD18_3
LDIND/DISLD
EP[GND]
Differential 100 ohm

R8407 No Via
VIN_1 EN 10K
1 8 Close to
THERMAL
C8400
2.2uF R8408
VIN_2 PG 100K
9
25V 2 7 ETNHUB_DVDD33
Realtek WOL
22
VOUT_1 GND ETNHUB_DVDD18 ETNHUB_AVDD18
R8458
3 6
R8465
1.5K
1.5K
R8427
R8409
VOUT_2 FB 10K 1% L8406 L8407
4 5 BLM18PG121SN1D
BLM18PG121SN1D
Vout
R2
R8406 C8435 C8438 EPHY_MDC
R1 2K C8430 0.1uF 22uF
2.2uF 16V 10V EPHY_MDIO
1%
Vout=1.5*(1+R1/R2) 25V OPT
ETNHUB_ENDEFER
ETNHUB_EPHY_TXOP3
ETNHUB_EPHY_TXON3
ETNHUB_AVDD18
ETNHUB_DVDD18 LAN2
C8406 C8410 C8407 C8411 C8418 C8424

0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
PHY TO RTL matching

ETNHUB_AVDD18 L8408-*1
UBW2012-121F
SHENCHEN_NEW
L8408
MAG_NEW
TR0P ETNHUB_EPHY_TXOP2
C8442
0.1uF R8416
49.9
C8446 R8417
0.1uF 49.9
TR0N ETNHUB_EPHY_TXON2
C8443
0.1uF
TR1P ETNHUB_EPHY_RXIP2
C8444
R8418
0.1uF
49.9
C8447
R8419
0.1uF 49.9
TR1N ETNHUB_EPHY_RXIN2
C8445
0.1uF
Place close to chip

Place to center position between two chips

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Ethernet HUB 22 29
EXT_SPEAKER_AMP EXT_AMP_15Y_CI
IC8600-*1
PAM8124
+3.5V_ST PVCCL_1
1 24
PGNDL_2
SD PGNDL_1
2 23
+13V_AMP
R8629
47K
PVCCL_2
3 22
LOUT
EXT_SPK OUT(Single End)
UBW2012-121F
MUTE BSL
4 21
OPT
LIN AVCC_2
5 20
EXT_SPK
R8631 0
EXT_SPK_DET
L8600
OPT C
RIN
6 19
AVCC_1
BYPASS GAIN0
Q8602 7 18
R8630 47K B
HP_DET P MMBT3904(NXP) AGND_1 GAIN1
OPT OPT
8 17
E EXT_SPK AGND_2
9 16
BSR
C8611 C8609 C8610

0.1uF 0.1uF 10uF
PVCCR_1
10 15
ROUT
R8603 50V
50V 35V VCLAMP PGNDR_2
EXT_AMP_/SD EXT_SPK
11 14
100 EXT_SPK EXT_SPK

PVCCR_2 PGNDR_1
Close to Pin3 12 13
+3.5V_ST Close to Pin1 JK8600
EXT_AMP_14Y
PEJ034-01
R8602 IC8600
GND
15K TPA3124D2PWPR
OPT
EXT_OUT_R
C PVCCL_1 PGNDL_2
1 24 C8618
C8616 1uF
R8601 47K B Q8601 Close to IC8600
AMP_RESET_N MMBT3904(NXP) 47uF 10V
OPT SD PGNDL_1 25V OPT
OPT 2 23 EXT_OUT_L R
EXT_SPK
E EXT_SPK OPT EXT_SPK
L8602 EXT_SPK EXT_SPK
R8608 C8612 C8614
PVCCL_2 LOUT 22.0uH
4.7K 0.47uF 0.47uF R8616 L
R8610 1K 3 22
50V 50V 10K EXT_OUT_L
OPT C8607
0.22uF OPT DETECT
R8613 10K
MUTE
4 21
BSL
50V EXT_SPK EXT_SPK
C8613 C8615
C8619
EXT_SPK_MUTE R8609 1uF
EXT_SPK L8603 0.47uF 0.47uF C8617 10V
4.7K GND
22.0uH 50V 50V 47uF OPT
LIN AVCC_2 25V
C8600 EXT_SPK 5 20
HP_LOUT/Ext_LOUT 1uF EXT_SPK EXT_OUT_R
EXT_SPK
10V EXT_SPK
RIN AVCC_1 +3.5V_ST
C8601 EXT_SPK R8617
HP_ROUT/Ext_ROUT 6 19
1uF 10K
10V R8604 EXT_SPK
BYPASS GAIN0 10K GAIN1 GAIN0 AMP GAIN R8612
Close to IC8600 OPT R8606
7 18 10K 15K
0 0 20dB
OPT
AGND_1 GAIN1 0 1 26dB R8611 100
8 17 EXT_SPK_DET
1 0 32dB EXT_SPK EXT_SPK_DET
R8605 R8607
AGND_2 BSR 10K 10K 1 1 36dB
9 16 EXT_SPK VA8600-*1 VA8600
EXT_SPK EXT_SPK ICVS0505201FR 5.6V Connected Disconnected
C8608
0.22uF Multi_Innochips Default_Amotech
PVCCR_1 ROUT 50V High
10 15 Low
VCLAMP PGNDR_2
11 14
C8632
0.1uF
PVCCR_2 PGNDR_1 50V
12 13 EXT_SPK
C8602 Close to Pin19,20

C8603 C8604
1uF 1uF 0.1uF
50V 50V 50V
EXT_SPK EXT_SPK EXT_SPK
Close to Pin10
HEAD PHONE AMP HP OUT
HP_OUT
IC8601 C8626-*1
1uF
C8620-*1 TPA6138A2 10V
1uF
10V Place at JACK SIDE HP_Jack_6pie
others
C8621 C8625 JK8601
others 18pF +INR +INL 18pF
1 14 PJ752-F04L3BE-A
C8620 50V 50V C8626 L8605
2.2uF HP_OUT HP_OUT 2.2uF BLM18PG121SN1D R8627 150 3 3
10V
R8618 10K R8619 43K -INR -INL 10V HP_LOUT_AMP HP_LOUT HP_ROUT HP_OUT
2 13 R8622 43K 1% R8623 10K
HP_ROUT/Ext_ROUT HP_LOUT/Ext_LOUT HP_OUT
HP_OUT HP_OUT HP_OUT HP_OUT R8625 150 2 2
HP_OUT C8630
CN_DRA R8620
43K C8622 OUTR
C8629
10pF
CN_DRA
0.22uF
HP_LOUT HP_OUT
OUTL R8624
10pF 3 12 50V 10V 4 4
HP_OUT 50V HP_OUT 43K 1%
HP_OUT +3.5V_ST
HP_OUT
GND_1 UVP 1 1
+3.3V_NORMAL 4 11
HP_ROUT_AMP HP_LOUT_AMP R8628
R8621 L8606 10K
4.7K MUTE GND_2 BLM18PG121SN1D
5 10 HP_OUT
HP_OUT +3.3V_NORMAL HP_ROUT_AMP HP_ROUT
HP_OUT R8626 100
SIDE_HP_MUTE VSS VDD C8631 HP_DET HP_OUT
6 9 0.22uF HP_Jack_5pie
10V JK8601-*1
C8627 C8628 VA8601-*1 VA8601
1uF 0.1uF HP_OUT
CN CP ICVS0505201FR 5.6V PJ-3596T
7 8 10V 16V Multi_Innochips
HP_OUT HP_OUT Default_Amotech 3 3
C8623
1uF
10V
HP_OUT 2 2
C8624 1uF 10V 4 4
HP_OUT
1 1
HP_DET
Connected Disconnected
High Low

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. EXT_SPK/HP 23 29
NEC MICOM UPDATE
REAL TIME CLOCK(RTC)
+3.5V_ST
P8701
12507WS-06L
MICOM_RESET
+3.5V_ST
1
R8709 R8710
4.7K 4.7K
MICOM_RESET 2
RTC RTC
FLMD0
IC8702 C8703
0.1uF 3
PCF8523T 16V
TOOL0
C8721 +3.5V_ST
3.3pF
RTC 4
OSCI VDD
32.768KHz
1 8
X8702
R8783
RTC
C8722 47K
3.3pF OSCO INT1/CLKOUT TOOL1 5
2 7 R8798 SW8700
100K
RTC
R8706 1K 2 1 6
1K VBAT SCL FLMD0
3 6 RTC_SCL C8715
1
RTC RTC 2.2uF 4 3 7
R8785
BA8700 10V
VSS SDA
BATTERY 4 5 RTC_SDA Closed to Crystal
2
C8711
C8710
13pF
13pF
MODEL1_OPT_5
MODEL1_OPT_4
+3.5V_ST
22
TOOL0
X8701 TOOL1
+3.5V_ST
LOGO_LIGHT LOGO_LIGHT
R8784
10MHz
MODEL1_OPT_3
R8786
+3.5V_ST MODEL1_OPT_2
1M MODEL1_OPT_1
MODEL1_OPT_0
P46/INTP1/TI05/TO05
C8712
4.7K
R87011 22
4.7K
0.1uF EYE_SCL
10K
10K
P120/INTP0/EXLVI
16V R8792 22
OPT
OPT
EYE_SDA
P122/X2/EXCLK
P42/TI04/TO04
P121/X1 0.1uF
C8713
R87036 0
RTC_SCL
AR8700
R8716
R8717
R8714
R8715
P40/TOOL0
P41/TOOL1
P43/SCK01
P47/INTP2
3.3K
P123/XT1
P124/XT2
P44/SI01
P45/SO01
R87037 0
RTC_SDA
EVDD0
EVSS0
FLMD0
RESET
REGC
MICOM MODEL OPTION
VDD
VSS
+3.5V_ST
R87038 0 R8720 33
RTC_SCL
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
+3.5V_ST OPT
R87039 0 R8721 33
RTC_SDA P60/SCL0 1 80 P140/PCLBUZ0/INTP6
OPT P61/SDA0 P141/PCLBUZ1/INTP7
2 79
P62 3 78 P142/SCK20/SCL20
SCL_SoC_Micom POWER_ON/OFF2_3
model_bit5_1
model_bit4_1
model_bit3_1
model_bit2_1
model_bit1_1
model_bit0_1
10K
10K
10K
10K
10K
10K
10K
P63 4 77 P143/SI20/RXD2/SDA20 R8772 22

POWER_ON/OFF2_4 NEC_DBG_RXD
SDA_SoC_Micom R87007 100 P31/TI03/TO03/INTP4 P144/SO20/TXD2 R8771 22
HDMI_CEC 5 76 NEC_DBG_TXD
OPT
R8727 33 P64/RD 6 75 P145/TI07/TO07

EPHY_MDC
R87024
R87022
R87020
P65/WR0 P00/TI00 R8776 10K

R8780
R8779
R8735
R8736
EPHY_MDIO R8728 33 7 74 +3.5V_ST

P66/WR1 P01/TO00 EXT_SPK
CLOCK_DET 8 73 EXT_SPK_MUTE
P67/ASTB 9 72 P02/SO10/TXD1
MODEL1_OPT_0 WARM_MODE WOL/WIFI_POWER_ON
P77/EX23/KR7/INTP11 10 71 P03/SI10/RXD1/SDA10 R8767 22
MODEL1_OPT_1
MODEL1_OPT_2 /RTL8201_PMEB
P76/EX22/KR6/INTP10 11 IC8700 70 P04/SCK10/SCL10 R8766 22
NEC_EEPROM_SDA
NEC_EEPROM_SCL
MODEL1_OPT_3 R8723 22 P75/EX21/KR5/INTP9 12 69 P131/TI06/TO06 R8765 100
EDID_WP EXT_SPK_DET
MODEL1_OPT_4 HDMI_EXT_EDID P74/EX20/KR4/INTP8 13 68 P130 OPT
IR AMP_MUTE
MODEL1_OPT_5 P73/EX19/KR3 14 67 P20/ANI0
model_bit5_0
model_bit4_0
model_bit3_0
model_bit2_0
model_bit1_0
model_bit0_0
LED_R
10K
10K
10K
10K
10K
10K
P72/EX18/KR2 15 66 P21/ANI1
EXT_AMP_/SD
P71/EX17/KR1 16 65 P22/ANI2
UART_SW2
P70/EX16/KR0 17 64 P23/ANI3
R87025
R87023
R87021
RL_ON
R8781
R8782
R8701
P06/WAIT 18 63 P24/ANI4
CLOCK_DET
P05/CLKOUT 19 62 P25/ANI5
POWER_ON/OFF2_2
EVSS1 20 61 P26/ANI6
P80/EX0 21 60 P27/ANI7
UART_SW1 AMP_PWR_EN
P81/EX1 22 59 P150/ANI8
UART_DBG_SW
P82/EX2 23 58 P151/ANI9
DBG_SW
P83/EX3 24 57 P152/ANI10
INV_CTL
P84/EX4 25 56 P153/ANI11
PANEL_CTL
P85/EX5 26 55 P154/ANI12
POWER_ON/OFF1
MODEL_BIT [0/1] ITEM VALUE&Meaning P86/EX6 27 54 P155/ANI13
SOC_RESET IR_OUT_CTRL
P87/EX7 28 53 P156/ANI14
ETNHUB_PWR_ON/OFF KEY1
MODEL_OPT_0 <00 : Interactive> R8726 100 P30/INTP3/RTC1HZ 29 52 P157/ANI15
POWER_DET KEY2
Model Catagory 01 : Cruise EVDD1 30 51 AVSS
MODEL_OPT_1 10 : STB
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
11 : Reserved +3.5V_ST
<0 : RTC>
P50/EX8
P51/EX9
P52/EX10
P53/EX11
P54/EX12
P55/EX13
P56/EX14
P57/EX15
P17/EX31/TI02/TO02
P16/EX30/TI01/TO01/INTP5
P15/EX29/RTCDIV/RTCCL
P14/EX28/RXD3
P13/EX27/TXD3
P12/EX26/SO00/TXD0
P11/EX25/SI00/RXD0
P10/EX24/SCK00
AVREF1
P110/ANO0
P111/ANO1
AVREF0
MODEL_OPT_2 RTC
1 : None RTC
<0 : M14+> C8708 +3.5V_ST
MODEL_OPT_3 Platform
0.1uF
1 : LM15U
MODEL_OPT_4 00 : Clock support
Clock Option 01 : Clock Not support
MODEL_OPT_5 C8709
10/11 : Reserved
0.1uF
16V
22
22
22
0
OPT
R8724
R8725
R87033
R87030 MHL 0
EXT_PWR_DET R87006
MICOM_UART
MICOM_UART
R8773
10K
ETNHUB_INT
WIFI_EN
EXT_PWR_DET
EXT5V_CTRL
EXT12V_CTRL
EEPROM_SW
/ETHERNET_RESET
SIDE_HP_MUTE
SCART_MUTE
/RTL8201_INT
SOC_NEC_TX
SOC_NEC_RX
POWER_ON/OFF2_1
MHL_DET
LX761H-ZA Power SEQUENCE

NEC_RX
NEC_TX
POWER_ON/OFF1
TP8700
POWER_ON/OFF2_4
POWER_ON/OFF2_2
SCART_MUTE
POWER_ON/OFF2_3
POWER_ON/OFF2_1
SOC_RESET

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. NEC MICOM 24 29
Ethernet PHY(RTL8201FN)/RJ45
ETNHUB_AVDD18
LAN 1
BLM18PG121SN1D
(AUX LAN)
L9002
RTL8201FN POWER ENABLE CONTROL
JK9000
+3.5V_ST_LAN
RJ45VT-01SN002
+3.5V_ST LAN_AVDD33
+3.5V_ST_LAN
IC9003
AP2191WG-7 L9000 1
BLM18PG121SN1D ETNHUB_EPHY_TXOP1 1
R9039
IN OUT 49.9
5 1 2
C9012 1% 2
0.1uF
R9069 C9028 16V C9015 R9040
10K 0.1uF GND 49.9
2 0.1uF 3
OPT 1% 3
ETNHUB_EPHY_TXON1
R9068
R9002 33 EN FLG 30K 4
ETNHUB_PWR_ON/OFF 4 3 4
OPT ETNHUB_EPHY_RXIP1
LAN_DVDD33 R9041
R9007 C9029 49.9
5
10K 0.1uF L9001 1% 5
BLM18PG121SN1D
OPT 16V C9016 R9042
OPT 49.9
0.1uF 6
C9013 1% 6
0.1uF ETNHUB_EPHY_RXIN1
16V
LAN_ESD
LAN_ESD
LAN_ESD
LAN_ESD
D9004 7
7
5.5V
8
8
D9006 D9008 D9010
5.5V 5.5V 5.5V
9
C9017 9
C9021
0.01uF 0.1uF
50V 16V
PHY ADDRESS CONFIG

50V 50V
12pF 12pF CONFIG PHY_ADDRESS = 111
C9003 C9005
TP9000
LAN_DVDD33
25.0MHz
X9000
0
1 2
R9026 R9027 R9032
4.7K 4.7K 4.7K
ET_COL/SNI
LAN_AVDD33 LAN_DVDD33
TR1N
TR1P
TR0N
TR0P
Place this Res. near IC C9014

R9009
2.49K
0.1uF
16V Place Closed LAN 2 ETNHUB_AVDD18
C9004 R9014 3.3K
BLM18PG121SN1D
1% 0.1uF
C9002
16V
L9003
0.1uF JK9001
16V
AVDD10OUT
DVDD10OUT
RXER/FXEN
ET_COL/SNI RJ45VT-01SN002
AVDD33_2
DVDD33_3
[EP]GND
CKXTAL2
CKXTAL1
LAN_DVDD33
C9007
NC_8
RSET
NC_7
NC_6
COL
0.1uF 1
16V ETNHUB_EPHY_TXOP3 1
R9025 R9051
49.9
48
47
46
45
44
43
42
41
40
39
38
37
LAN_AVDD33 4.7K 2
CRS/CRS_DV R9015 22 1% 2
MDI+[0] 1 36
EPHY_CRS_DV C9024 R9052
MDI-[0] 2 35 LED1/PHYAD[1] +3.5V_ST LAN_DVDD33
THERMAL 0.1uF 49.9
NC_1 LED0/PHYAD[0] 1% 3
3 49 34 3
ETNHUB_EPHY_TXON3
MDI+[1] 4 33 PMEB R9005 R9006
MDI-[1] 5
IC9000 32 LED2/PHYAD[2] 1.5K 1.5K
OPT R9038 4
AVDD33_1 MDIO OPT 4
6 RTL8201FN 31 R9000 33
EPHY_MDIO 4.7K
ETNHUB_EPHY_RXIP3
NC_2 MDC R9003 33 R9053
7 30 EPHY_MDC 49.9
LAN_DVDD33 5
NC_3 8 29 PHYRSTB R9030 22 1%
C9000 /ETHERNET_RESET 5
0.1uF NC_4 DVDD10
16V
9 28
/RTL8201_PMEB TO MCU C9025 R9054
NC_5 TXEN 0.1uF 49.9
10 27 EPHY_EN 6
R9001 4.7K 1% 6
EN_LDO_OUT 11 26 TXD[3] ETNHUB_EPHY_RXIN3
TXER 12 25 TXD[2] C9010 C9011
LAN_ESD
LAN_ESD
LAN_ESD
LAN_ESD
0.1uF 0.1uF D9005 7
13
14
15
16
17
18
19
20
21
22
23
24
7
16V 16V 5.5V
RXDV
RXD[0]
DVDD33_1
RXD[1]
RXD[2]
RXD[3]/CLK_CTL
RXC
INTB
DVDD33_2
TXC
TXD[0]
TXD[1]
8
8
D9007 D9009 D9011
5.5V 5.5V 5.5V 9
LAN_DVDD33 EPHY_TXD1
EPHY_TXD0
9
R9011 51 Place near IC C9023 C9022
LAN_DVDD33 EPHY_REFCLK 0.01uF 0.1uF
R9004 4.7K LAN_DVDD33 16V
C9027 5pF
3.3K
C9026 33pF
C9006
EPHY_RXD0 R9012 0.1uF
R9067
4.7K 16V
R9013 100
EPHY_RXD1 /RTL8201_INT TO SOC / MCU
C9001
0.1uF
16V

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Ethernet PHY/RJ45 25 29
5V/12V EXT.Power Out
EXT.Power Out 5V +13V_A EXT.Power Out 12V

Non_Cruise
R9104
75
L9105 IC9101
CB3216PA501E MP5000DQ
Non_Cruise GND SOURCE_5

1 10
EXT_12V
close IC9103 C9105 Non_Cruise
470pF
IC9103 50V
DV/DT
2 9
SOURCE_4
Non_Cruise
R9103 C9111
10K TPS54327DDAR [EP]GND L9101
EXT5V_CTRL 10uF
R9101 CB3216PA501E
25V 1K ENABLE/FAULT SOURCE_3
EXT12V_CTRL 3 8
EN VIN
1 8 Non_Cruise
R1 EXT_5V +5V_USB_2 C9109 C9119
CB3216PA501E
0.1uF
THERMAL
I-LIMIT SOURCE_2 10uF
Non_Cruise
R9113 R9112 C9116 4 7 50V 25V
56K 11K VFB VBST 0.1uF Non_Cruise Non_Cruise
9
L9102
2 7
1% 1% 50V L9104 L9106 NC SOURCE_1 close IC9104
CB3216PA501E 5 6
C9112 VREG5 SW 3.6uH
100pF 3 6
Cruise +13V_A 11
NR8040T3R6N C9103 C9101 C9118
SS GND 22uF 22uF 0.1uF
R2 4 5 16V UF3D(SUZHOU GRANDE)
16V 16V VCC
R9116 Non_Cruise
12K D9101
1%
C9117 Non_Cruise
C9115
1uF C9107
3300pF 10uF
10V D9102
50V OPT 25V
UF3D(SUZHOU GRANDE)
close IC9101
Vout=(1+R1/R2)*0.765=5.036V
EXTERNAL_POWER DETECTION
EXT_5V EXT_12V
R9117 R9118
200 2.4K EXT_PWR_DET
EXT_PWR_DET EXT_PWR_DET R9120
100K
A1
A2
D9103
EXT_PWR_DET
EXT_PWR_DET IC9104
APX803D29 EXT_PWR_DET
C
R9121
VCC RESET 100
3 2 EXT_PWR_DET
1
R9119 C9120
1.2K 0.1uF GND
1/16W 16V
EXT_PWR_DET EXT_PWR_DET

ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR EXT.Power(5V/12V) 26 29
Pro:Idiom (XMARK)
Power +3.3V_PROIDIOM
+3.3V_VCCINT
1uF 10V
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
PRO_IDIOM
BLM18PG121SN1D
PRO_IDIOM
PRO_IDIOM
PRO_IDIOM
PRO_IDIOM
BLM18PG121SN1D
BLM18PG121SN1D
BLM18PG121SN1D
BLM18PG121SN1D
PRO_IDIOM
PRO_IDIOM
PRO_IDIOM
PRO_IDIOM
PRO_IDIOM
PRO_IDIOM
PRO_IDIOM
PRO_IDIOM
+3.3V_NORMAL +3.3V_PROIDIOM +3.3V_PROIDIOM
+3.3V_VCCINT
PRO_IDIOM L9408
PRO_IDIOM L9404
PRO_IDIOM L9405
PRO_IDIOM L9406
PRO_IDIOM L9407
PRO_IDIOM
C9422
C9423
C9424
C9425
C9426
C9427
C9429
C9430
C9431
C9432
C9433
C9434
C9435
L9402
[M14 -> Pro:Idiom] IP Serial IN
PRO_IDIOM
L9401 C9405 MLB-201209-0120P-N2
TS_S_OUT_CLK R9423 33 PRO_IDIOM
10uF
10V R9424 33 PRO_IDIOM
MLB-201209-0120P-N2 TS_S_OUT_VAL
TS_S_OUT_SYNC R9425 33 PRO_IDIOM
TS_S_OUT_DATA R9426 33 PRO_IDIOM
VCCA_PLL2
VCCA_PLL1
GNDG_PLL2
GNDA_PLL2
GNDG_PLL1
GNDA_PLL1
VCCINT_12
VCCINT_11
VCCINT_10
VCCIO2_4
VCCIO2_3
VCCIO2_2
VCCIO2_1
VCCIO3_3
VCCIO3_2
VCCIO3_1
VCCIO4_4
VCCIO4_3
VCCIO4_2
VCCIO4_1
VCCIO1_3
VCCIO1_2
VCCIO1_1
VCCINT_9
VCCINT_8
VCCINT_7
VCCINT_6
VCCINT_5
VCCINT_4
VCCINT_3
VCCINT_2
VCCINT_1
[Pro:Idiom -> M14] RF Parallel OUT
IO2_40
IO2_39
IO2_38
IO2_37
IO2_42
IO2_35
GND_26
GND_25
GND_24
GND_23
GND_22
GND_21
GND_20
GND_19
GND_18
GND_17
GND_16
GND_15
GND_14
GND_13
GND_12
GND_11
GND_10
[M14 -> Pro:Idiom] RF Parallel IN
GND_9
GND_8
GND_7
GND_6
GND_5
GND_4
GND_3
GND_2
GND_1
PRO_IDIOM
AR9400 33
TPO_CLK
E5
E6
D5
D6
B5
B6
H11
H6
J12
J11
J5
J6
T16
T12
T5
T1
L11
L9
L8
L6
K10
K8
K6
J9
J7
H10
H8
G11
G9
G7
F11
F9
F8
F6
A12
A5
A16
A1
A3
F7
F10
A14
C16
K11
P16
T14
L10
L7
T3
P1
G6
C1
T10
T7
K9
K7
J10
J8
H9
H7
G10
G8
A10
A7
IO4_34/CH_CLK
[Pro:Idiom -> M14] IP Serial OUT
TPO_VAL CLK1 H1 R11 P:I_OUT_CLK
TPO_SOP IO2_29/TP_SOP B8 R8 IO4_20/CH_VALID
P:I_OUT_VAL
IO2_21/TP_VALID B9 R9 IO4_26/CH_SOP
P:I_OUT_SOP
TPO_DATA[0-7] PRO_IDIOM R9411 0 IO2_17/TP_ERR B10 R10 IO4_30/CH_ERR
27MHz Clock TPO_DATA[0] AR9401 33 IO2_41/TP_DATA[7] C5 P5 IO4_8/CH_DATA[0]
P:I_OUT_DATA0
TPO_DATA[1] IO2_36/TP_DATA[6] C6 P6 IO4_13/CH_DATA[1]

P:I_OUT_DATA1
+3.3V_PROIDIOM P:I_OUT_DATA2
P:I_OUT_DATA3
TPO_DATA[4] AR9402 33 IO2_23/TP_DATA[3] IO4_28/CH-DATA[4]
C9 P9 P:I_OUT_DATA4
X9400
27MHZ P:I_OUT_DATA5
VCC NC_OR_EN/DIS TPO_DATA[6] IO2_14/TP_DATA[1] IO4_35/CH_DATA[6]
4 1 C11 P11 P:I_OUT_DATA6
C9403 C9404 OUTPUT GND P:I_OUT_DATA7
3 2 IO1_29 M1 E7 IO2_34
PRO_IDIOM 10uF 0.1uF PRO_IDIOM
PRO_IDIOM IO1_2 IO2_33 XMARK_1.8V
10V C3 A6
PRO_IDIOM C9437
IO1_3 C2 B7 IO2_32
Cap close to IC
0.1uF
IO1_4 B1 A4 IO2_43
XMARK_1.8V IO1_5 G5 D7 IO2_30
PRO_IDIOM
IO1_6 F4 A8 IO2_28
R9401
22 IO1_7 D3 E8 IO2_27 C9438
Q16 PROIDIOM_SYSCLK L9403 0.1uF
BLM18PG121SN1D IO1_8 E4 D8 IO2_26
PRO_IDIOM
PRO_IDIOM IO1_9
IO1_10
IO1_11
F5
E3
IC9403 B4
E10
IO2_44
IO2_24
IO2_45
PRO_IDIOM
C9410 Close to IC D2 C4
4.7uF C19 IO1_12 IO2_22
PROIDIOM_RESET
PRO_IDIOM PROIDIOM_SYSCLK
CLK0
IO2_48/RESET
E2
G1
B2
LGDT1001 D9
A9
D10
IO2_20
IO2_19 C9439
R9409 33 PRO_IDIOM IO3_37/I2C_SCK IO2_16 0.1uF
I2C_SCL3 D14 A11
PRO_IDIOM
C9409
0.1uF I2C_SDA3
R9410 33 PRO_IDIOM IO3_34/I2C_SDA
DCLK
E14 I2C : 0x47 B11 IO2_15
IO2_46
PRO_IDIOM K4 B3
CONF_DONE K13 D11 IO2_13
NCONFIG PRO_IDIOM IO2_12
H3 D12
NCE J4 E9 IO2_11
XMARK_1.8V DATA0 H2 E11 IO2_10
IO1_21SO G4 E12 IO2_9
IO1_22/ASDO K3 A2 IO2_47
NCEO H4 B12 IO2_7
0.1uF
PRO_IDIOM
C9413
NSTATUS J13 A13 IO2_6

+3.3V_PROIDIOM XMARK_1.8V MSEL0 J3 B13 IO2_5
MSEL1 J2 C13 IO2_4
PRO_IDIOM TCK J14 B14 IO2_3
IC9405 TDO IO2_2
H15 A15
AZ1117EH-ADJTRG1
TMS J15 B15 IO2_1
TDI H14 D13 IO3_43
IN OUT IO1_1/INIT_DONE IO3_42
D4 C14
PRO_IDIOM ADJ/GND PRO_IDIOM PRO_IDIOM PRO_IDIOM IO1_13 IO3_41
SIGN74002264
D1 C15 PRO_IDIOM
C9400 C9402 150 R9433 ZD9400 IO1_14 IO3_40 C9436
PRO_IDIOM
R9430 0 2.5V F3 B16

0.1uF
C9412
10uF 0.1uF R1 0.1uF

10V 300 IO1_15 G3 G12 IO3_39
16V
R9431 C9401 IO1_16 IO3_38
PRO_IDIOM F2 H13
PRO_IDIOM 10uF
10V IO1_17 E1 E13 IO3_36 +3.3V_PROIDIOM
PRO_IDIOM
R9432 IO1_18 G2 F12 IO3_35
PRO_IDIOM
200 IO1_19 IO3_33
F1 D15 R9417 4.7K
PRO_IDIOM
IO1_20 H5 D16 IO3_32 R9418 4.7K
R2 IO1_23 J1 E15 IO3_31 PRO_IDIOM
IO1_24 K2 E16 IO3_30
IO1_25 L3 F15 IO3_29
IO1_26 K1 F13 IO3_28
IO1_27 L1 F14 IO3_27
IO1_28 L2 F16 IO3_26
IO1_30 N1 G15 IO3_25
IO1_31 M2 G13 IO3_24
IO1_32 N2 G14 IO3_23
IO1_33 M3 H12 IO3_22
IO1_34 L5 G16 CLK2
IO1_35 M4 H16 CLK3
M10
T11
N10
N11
N12
M11
M12
R12
T13
R13
R14
P13
T15
R15
N13
P14
P15
R16
N15
N16
K12
K14
L12
N14
M13
M14
L13
M15
M16
L14
L15
L16
K16
K15
J16
N3
K5
L4
R1
P2
P3
N4
R2
T2
R3
P4
R4
T4
R5
M5
M6
N5
N6
R6
M7
T6
R7
N7
T8
M8
N8
T9
N9
M9
RESET
IO1_36
IO1_37
IO1_38
IO1_39
IO1_40
IO1_41
IO1_42
IO4_1
IO4_2
IO4_3
IO4_4
IO4_5
IO4_6
IO4_7
IO4_9
IO4_10
IO4_11
IO4_12
IO4_14
IO4_15
IO4_16
IO4_17
IO4_19
IO4_21
IO4_22
IO4_23
IO4_25
IO4_27
IO4_29
IO4_31
IO4_32
IO4_36
IO4_37
IO4_38
IO4_39
IO4_40
IO4_42
IO4_43
IO4_44
IO4_45
IO4_46
IO4_47
IO4_48
IO3_1
IO3_2
IO3_3
IO3_4
IO3_5
IO3_6
IO3_7
IO3_8
IO3_9
IO3_10
IO3_11
IO3_12
IO3_13
IO3_14
IO3_15
IO3_16
IO3_17
IO3_18
IO3_19
IO3_20
IO3_21
XMARK_1.8V
+3.3V_PROIDIOM
PRO_IDIOM
+3.3V_PROIDIOM C9428
C9417 C9418 C9419 C9420 C9421 0.1uF
PRO_IDIOM
PRO_IDIOM
PRO_IDIOM
PRO_IDIOM
PRO_IDIOM
PRO_IDIOM
PRO_IDIOM
0.1uF
0.1uF
C9414
C9415
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF

PRO_IDIOM
IC9400
APX809-26SAG-7 PRO_IDIOM
R9416 4.7K
092:M16 R9429 PRO_IDIOM R9414 4.7K
100 RESET VCC
PROIDIOM_RESET 2 3 PRO_IDIOM R9415 4.7K
PRO_IDIOM
C9440 1 Cap close to IC
PRO_IDIOM
R9428 1uF C9441

25V GND 1uF
4.7K
OPT 25V
PRO_IDIOM

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Pro:IDIOM 27 29
+3.3V_NORMAL
L9501
BLM18PG121SN1D
+3.3V_NORMAL
PRO_IDIOM
R9503
10K
R9504
10K
OPT
C R9502
PRO_IDIOM Q9501 B 10K
TP_SWITCH
IC9501 MMBT3904(NXP) PRO_IDIOM
PRO_IDIOM
SN74LVC16244AZQLR E
1OE 3OE
A1 K6
NC_1 NC_8
A2 K5
NC_2 NC_7
A3 K4
NC_3 NC_6
A4 K3
NC_4 NC_5
A5 K2
2OE 4OE
A6 K1
1Y2 4A3
B1 J6 P:I_OUT_VAL
1Y1 4A4
B2 J5 P:I_OUT_SOP
GND_1 GND_8
B3 J4
GND_2 GND_7
B4 J3
1A1 4Y4
B5 J2 TPI_SOP
1A2 4Y3
B6 J1 TPI_VAL
1Y4 4A1
C1 H6 P:I_OUT_CLK
1Y3 4A2
C2 H5
C9501 C9503
0.1uF VCC_1 VCC_4 0.1uF
C3 H4
C9502 C9504
C4 H3
1A3 4Y2
C5 H2
1A4 4Y1
C6 H1 TPI_CLK
2Y2 3A3
D1 G6 P:I_OUT_DATA1
TPI_DATA[6]
2Y1 3A4
D2 G5 P:I_OUT_DATA0
TPI_DATA[7]
GND_3 GND_6
D3 G4
GND_4 GND_5
D4 G3
2A1 3Y4
D5 G2 TPI_DATA[0]
P:I_OUT_DATA7
2A2 3Y3
D6 G1 TPI_DATA[1]
P:I_OUT_DATA6
2Y4 3A1
E1 F6 P:I_OUT_DATA3
TPI_DATA[4]
2Y3 3A2
TPI_DATA[5] E2 F5 P:I_OUT_DATA2
2A3 3Y2
E5 F2 TPI_DATA[2]
P:I_OUT_DATA5
2A4 3Y1
E6 F1
P:I_OUT_DATA4 TPI_DATA[3]
R9501
10K
TP_SWITCH
CI CI +3.3V_NORMAL
R9505
IC9502 10K
SN74LVC16244AZQLR
R9506
OPT
10K
OPT
1OE 3OE
A1 K6
NC_1 NC_8
A2 K5 TP_SWITCH2
NC_2 NC_7
R9507
A3 K4
10K
NC_3 NC_6
A4 K3
NC_4 NC_5
A5 K2
2OE 4OE
A6 K1
1Y2 4A3
B1 J6 CI_OUT_VAL
1Y1 4A4
B2 J5 CI_OUT_SOP
GND_1 GND_8
B3 J4
GND_2 GND_7
B4 J3
1A1 4Y4
B5 J2
1A2 4Y3
B6 J1
1Y4 4A1
C1 H6 CI_OUT_CLK
1Y3 4A2
C2 H5
C9505 C9507
C3 H4
C9506 C9508
C4 H3
1A3 4Y2
C5 H2
1A4 4Y1
C6 H1
2Y2 3A3
D1 G6 CI_OUT_DATA1
2Y1 3A4
D2 G5 CI_OUT_DATA0
GND_3 GND_6
D3 G4
GND_4 GND_5
D4 G3
2A1 3Y4
CI_OUT_DATA7 D5 G2
2A2 3Y3
CI_OUT_DATA6 D6 G1
2Y4 3A1
E1 F6 CI_OUT_DATA3
2Y3 3A2
E2 F5 CI_OUT_DATA2
2A3 3Y2
CI_OUT_DATA5 E5 F2
2A4 3Y1
CI_OUT_DATA4 E6 F1

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. TP SWITCH 28 29

Led TV: Service Manual

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Internal Use Only

North/Latin America http://aic.lgservice.com

MODEL : 49LX761H 49LX761H-GA

P/NO : MFL69275901 (1508-REV00) Printed in Korea

SAFETY PRECAUTIONS ......................................................................... 3

TROUBLE SHOOTING GUIDE................................................................ 18

BLOCK DIAGRAM .................................................................................. 23

EXPLODED VIEW ................................................................................... 24

SCHEMATIC CIRCUIT DIAGRAM ............................................ APPENDIX

IMPORTANT SAFETY NOTICE

General Guidance Leakage Current Hot Check (See below Figure)

Before returning the receiver to the customer,

always perform an AC leakage current check on the exposed

Leakage Current Cold Check(Antenna Cold Check)

Fuse and Conventional Resistor

1. Application range 3. Test method

(1) Operating Temperature : 0 °C to 40 °C

4. Model General Specification

5. External Input Support Format

In case of keeping module is in the circumstance of 0 °C, it

In case of keeping module is in the circumstance of below

3.5.2. Check the method of CI+ key value(RS232)

4) Check the model name Instart menu. → Factory name

4.2.2. Adj. condition and cautionary items

* If TV internal pattern is used, not needed

▪ Standard color coordinate and temperature using CA-210

Only January to Febuary.

4.7. LNB voltage and 22KHz tone check

(2) Test result

5.2. Ship-out mode check (In-stop)

5.3. GND and Hi-pot auto-check

6. Audio * After downloading, have to adjust Tool Option again.

(1) Connect JIG for inspection to RS-232C port on TV as

Button of Vol. control Waveform of Oscilloscope 8.2.3. Pro:Idiom Check

8.2. IR Out and DC Power Outlet (5V/12V)

▪ Power only mode

Check LCD Module

Check X8701 Clock N Check X8701 application circuit

Check IC8700 IIC N

Check IR input state of IC8700 N

Re-download NEC Micom

Check tuner 1.2V power IC6700 N

Check IIC Signal N

Check AC cable for damage

Check the input of LG1311(IC101).

Check AC cable for damage

Check the input of LG1311 (IC101).

Check Audio AMP output N

Check AC cable for damage

Check the input of LG1311(IC101).

Check Audio AMP output N

Check AC cable for damage

Check Audio AMP output N

Only for training and service purposes

LG Electronics. Inc. All rights reserved.

LAN MPI / SPI

Ext. SPK Line Out Ext. Speaker R/L Ext SPK

32/40 inch : 60Hz

LGE Internal Use Only

4) Check the model name Instart menu. → Factory name

▪ Standard color coordinate and temperature using CA-210

(1) Connect JIG for inspection to RS-232C port on TV as

Q4001-1 Q4002-1 Q4003-1 Q4004-1