LABOARATORY REPORT

LAB EXCERSICE 4: STANDARD SEQUENTIAL CIRCUITS

STUDENTS: Diego Ortega Sanz, Ángel Salas Navarro y Guillermo de la Obra Pérez

SUBJECT: Electrónica Digital y de Microprocesadores

PROFESSOR: Víctor Manuel Padrón Nápoles

 GRADO EN INGENIERÍA ELECTRÓNICA
INDUSTRIAL Y AUTOMÁTICA

SUBJETCT: ELECTRÓNICA DIGITAL Y MICROPROCESADORES

SURNAME: DIEGO NAME: ORTEGA SANZ

INDEX

INTRODUCTION ............................................................................................................................. 2
DESCRIPTION ............................................................................................................................. 2
OBJETCIVES................................................................................................................................ 2
1. COUNTER ............................................................................................................................... 2
ALTERA PRINTED CIRCUIT BOARD PREPARATION ..................................................................... 2
NEW PROYECT WITH QUARTUS II ............................................................................................. 3
VHDL PROGRAMMING .............................................................................................................. 3
BLOCK PROGRAMMING ............................................................................................................ 6
2. SHIFT REGISTER ..................................................................................................................... 7
VHDL PROGRAMMING .............................................................................................................. 7
BLOCK PROGRAMMING ............................................................................................................ 8
SHOWING RESULT ON THE ALTERA BOARD .............................................................................. 9
SHIFT REGISTER SIMULATION ................................................................................................. 11
 GRADO EN INGENIERÍA ELECTRÓNICA
INDUSTRIAL Y AUTOMÁTICA

SUBJETCT: ELECTRÓNICA DIGITAL Y MICROPROCESADORES

SURNAME: DIEGO NAME: ORTEGA SANZ

INTRODUCTION

DESCRIPTION
We will use this circuit printed board to do the practice. For that, we shall connect it to current
and its USB port from our computer to “BLASTER” gate.

OBJETCIVES
1) Learn how to simulate and implement sequential circuits on a Cyclone II FPGA using
Quartus II EDA Tool.
2) Learn how to describe standard sequential circuits using VHDL.

1. COUNTER

ALTERA PRINTED CIRCUIT BOARD PREPARATION

We will use this circuit printed board to do the practice. For that, we shall connect it to
current and its USB port from our computer to “BLASTER” gate.
 GRADO EN INGENIERÍA ELECTRÓNICA
INDUSTRIAL Y AUTOMÁTICA

SUBJETCT: ELECTRÓNICA DIGITAL Y MICROPROCESADORES

SURNAME: DIEGO NAME: ORTEGA SANZ

NEW PROYECT WITH QUARTUS II

When starting Quartus II a new menu is open and we have two options, create a new proyecto
or open and old one. We will choose New Project Wizard. We will name it counter.

VHDL PROGRAMMING
Una vez que tenemos el proyecto ya creado, pinchamos en new y nos aparecerá una lista de
opciones, seleccionamos la opción “VHDL file”
 GRADO EN INGENIERÍA ELECTRÓNICA
INDUSTRIAL Y AUTOMÁTICA

SUBJETCT: ELECTRÓNICA DIGITAL Y MICROPROCESADORES

SURNAME: DIEGO NAME: ORTEGA SANZ

In the next step, new workspace is open and we start programming as the excersice
requested:

In the architecture of this programming code we appreciate the entity we have defined,
“counter” and its inputs/outputs attached to it.

In “ARCHITECTURE” we define the logic function we want to create.

Once the programm is wirtten, we will click “start compilation” icon and ALTERA starts
cheking. It should have no errors and several warnings.
 GRADO EN INGENIERÍA ELECTRÓNICA
INDUSTRIAL Y AUTOMÁTICA

SUBJETCT: ELECTRÓNICA DIGITAL Y MICROPROCESADORES

SURNAME: DIEGO NAME: ORTEGA SANZ

We will also have to use our old divider element used in previous laboratory.
 GRADO EN INGENIERÍA ELECTRÓNICA
INDUSTRIAL Y AUTOMÁTICA

SUBJETCT: ELECTRÓNICA DIGITAL Y MICROPROCESADORES

SURNAME: DIEGO NAME: ORTEGA SANZ

BLOCK PROGRAMMING
Once our proyect is created, we click new file and several options will be shown. We select
“Block diagram/schematic file” option and start programming the environment intrducing new
elements needed.

Finally we connect the board and transfer the program to it.

 GRADO EN INGENIERÍA ELECTRÓNICA
INDUSTRIAL Y AUTOMÁTICA

SUBJETCT: ELECTRÓNICA DIGITAL Y MICROPROCESADORES

SURNAME: DIEGO NAME: ORTEGA SANZ

2. SHIFT REGISTER

VHDL PROGRAMMING
We open a new VHDL file and call it MyReg,

In the next step, new workspace is open and we start programming as the excersice
requested:
 GRADO EN INGENIERÍA ELECTRÓNICA
INDUSTRIAL Y AUTOMÁTICA

SUBJETCT: ELECTRÓNICA DIGITAL Y MICROPROCESADORES

SURNAME: DIEGO NAME: ORTEGA SANZ

In the architecture of this programming code we appreciate the entity we have defined,
“MyReg” and its inputs/outputs attached to it.

In “ARCHITECTURE” we define the logic function we want to create.

Once the programm is wirtten, we will click “start compilation” icon and ALTERA starts
cheking. It should have no errors and several warnings.

BLOCK PROGRAMMING
We click again new file. We select “Block diagram/schematic file” option and start
programming the environment intrducing new elements needed.

IMAGE OF REGISTER BLOCK DIAGRAM ELEMENT

Finally we connect the board and transfer the program to it.

 GRADO EN INGENIERÍA ELECTRÓNICA
INDUSTRIAL Y AUTOMÁTICA

SUBJETCT: ELECTRÓNICA DIGITAL Y MICROPROCESADORES

SURNAME: DIEGO NAME: ORTEGA SANZ

SHOWING RESULT ON THE ALTERA BOARD

 GRADO EN INGENIERÍA ELECTRÓNICA
INDUSTRIAL Y AUTOMÁTICA

SUBJETCT: ELECTRÓNICA DIGITAL Y MICROPROCESADORES

SURNAME: DIEGO NAME: ORTEGA SANZ
 GRADO EN INGENIERÍA ELECTRÓNICA
INDUSTRIAL Y AUTOMÁTICA

SUBJETCT: ELECTRÓNICA DIGITAL Y MICROPROCESADORES

SURNAME: DIEGO NAME: ORTEGA SANZ

SHIFT REGISTER SIMULATION

In this shift register simulation example the blue cursor shows binary number output of 011.

This is due to holding clock and enable while load right and hold inputs are set to 0. If we
introduce si, sro and slo our output q wiill give us this number.