Advance Digital

Electronics
Dr. Montassar Aidi Sharif
PhD in Electrical and Computer
Engineering
[email protected]
 Objectives
• Introduction to embedded systems
• FPGAs (Field Programable Gate Arrays)

2
 Wireless Communications

Telematics System for Automobiles

Hand-held GPS Units

Y. Williams Csci-339, Spring 2002 20

3
 Robotics Control

Spider robot – constructed with LEGO Mindstorms Components

Y. Williams Csci-339, Spring 2002 22

4
 More examples
Smart Toys

Y. Williams Csci-339, Spring 2002 24

5
 Cruise Missile Guidance

Y. Williams Csci-339, Spring 2002 21

6
7
8
 Definition
◼ “Any sort of device which includes a
programmable computer but itself is not
intended to be a general-purpose
computer”
◼ Wayne Wolf
Required in the mid exam

9
Definition

10
 Embedded systems overview
◼ Computing systems are everywhere
◼ Most of us think of “desktop” computers
– PC’s
– Laptops
– Mainframes
– Servers
◼ But there’s another type of computing system
– Far more common...

Slide credit Vahid/Givargis, Embedded Systems Design: A Unified Hardware/Software Introduction, 2000

11
 Embedded systems overview
◼ Embedded computing systems
Computers are in here...
– Computing systems embedded
within electronic devices and here...

– Hard to define. Nearly any and even here...

computing system other than a
desktop computer
– Billions of units produced yearly,
versus millions of desktop units
– Perhaps 50 per household and per
automobile Lots more of these,
though they cost a lot
less each.

12
 A “short list” of embedded
Anti-lock brakes
systems Modems
Auto-focus cameras MPEG decoders
Automatic teller machines Network cards
Automatic toll systems Network switches/routers
Automatic transmission On-board navigation
Avionic systems Pagers
Battery chargers Photocopiers
Camcorders Point-of-sale systems
Cell phones Portable video games
Cell-phone base stations Printers
Cordless phones Satellite phones
Cruise control Scanners
Curbside check-in systems Smart ovens/dishwashers
Digital cameras Speech recognizers
Disk drives Stereo systems
Electronic card readers Teleconferencing systems
Electronic instruments Televisions
Electronic toys/games Temperature controllers
Factory control Theft tracking systems
Fax machines TV set-top boxes
Fingerprint identifiers VCR’s, DVD players
Home security systems Video game consoles
Life-support systems Video phones
Medical testing systems Washers and dryers

And the list goes on and on

Slide credit Vahid/Givargis, Embedded Systems Design: A Unified Hardware/Software Introduction, 2000

13
 How many do we use?
◼ Average middle-class home has 40 to 50
embedded processors in it
– Microwave, washer, dryer, dishwasher, TV, VCR,
stereo, hair dryer, coffee maker, remote control,
humidifier, heater, toys, etc.
◼ Luxury cars have over 60 embedded processors
– Brakes, steering, windows, locks, ignition, dashboard
displays, transmission, mirrors, etc.
◼ Personal computers have over 10 embedded
processors
– Graphics accelerator, mouse, keyboard, hard-drive, CD-
ROM, bus interface, network card, etc.
- Mike Schulte

14
 Required in the mid exam

Types of Embedded Systems

15
Types of Embedded Systems

16
 Typical Embedded Systems
◼ Are designed to observed (through sensors)
and control something (through actuators)
E.g. air condition senses room temperature and
maintains it at set temperature via thermostat.

Required in the mid exam

17
Embedded System Block Diagram

Control
(Output) Motor/Light

System Bus
Observe Temperature
Processor (Input) Sensor

mem

18
 Processors
◼ Microprocessors for PCs
◼ Embedded processors or Microcontrollers
for embedded systems
– Often with lower clock speeds
– Integrated with memory and
– I/O devices e.g. A/D D/A PWM CAN
– Higher environmental specs

19
Design Constraints
Required in the mid exam

20
Required in the mid exam
 Design Challenges
◼ Does it really work?
– Is the specification correct?
– Does the implementation meet the spec?
– How do we test for real-time characteristics?
– How do we test on real data?
◼ How do we work on the system?
– Observability, controllability?
– What is our development platform?
Slide credit – P Koopman, CMU

◼ More importantly – optimising design

metrics!!
21
 Required in the mid exam

Programmable Logic Devices

◼ Programmable digital integrated circuit
◼ Desired functionality is implemented by
configuring on-chip logic blocks and
interconnections
◼ Developers only care about the logic design
but not the internal hard-wire connection (
softwarelize the hardware design)
Required in the mid exam
 Why Programmable Logic
Devices and FPGAs
Required in the mid exam

Programmable Logic is a Key Underlying Technology for Experiments.

◼ First-Level and High-Level Triggering

◼ Data Transport (Networks)

◼ Computers interacting with Hardware (Networks)

◼ Silicon Trackers (Millions of Data Channels)

Commercial Devices. Developments driven by Industry.

Telecomms, Gaming, Aerospace, Automotive, Set-top boxes….
 Type of Programmable Logic
Devices Required in the mid exam

◼ PLA (Programmable Logic Array)

◼ CPLD (Complex Programmable Logic
Device)
◼ FPGA (Field Programmable Gate Array)

Required in the mid exam

 PLA - Sum of Products
Programmable AND array followed by fixed fan-in OR gates
A B C
Programmable switch or fuse

f1 = A • B • C + A • B • C

f2 = A • B + A • B • C

AND plane
 PLA - Macrocell
Can implement combinational or sequential
Select
Enable
A
logic
B C

f1

Flip-flop
MUX
D Q

Clock

AND plane
 CPLD Structure
Integration of several PLD blocks with a programmable
interconnect on a single chip
I/O Block

I/O Block
• PLD PLD •
• Block Block •
• •

Interconnection Matrix
I/O Block

I/O Block
• PLD PLD •
• Block Block •
• •
 FPGA - Generic Structure
Logic block Interconnection switches
FPGA building blocks:
◼ Programmable logic blocks I/O
Implement combinatorial and
sequential logic
◼ Programmable interconnect
Wires to connect inputs and
outputs to logic blocks

I/O

I/O
◼ Programmable I/O blocks
Special logic blocks at the
periphery of device for external
connections

I/O
Digital Logic

Logic Gates

Transistor Switches
< 40 nm ! $$$
 Digital Logic

Digital Logic Function Product AND (&)

Sum OR (|)

3 Inputs

SUM of PRODUCTS
Black Box Truth Table
(Look Up Table LUT)
 Digital Logic

Digital Logic Function Product AND (&)

Sum OR (|)

3 Inputs

SUM of PRODUCTS
Black Box Truth Table
(Look Up Table LUT)
 Logic Blocks
◼ Logic Functions implemented in Look Up
Table LUTs.
◼ Flip-Flops. Registers. Clocked Storage
elements. 16-bit SR
16x1 RAM

Multiplexers (select 1 of N inputs)

4-input

◼
a
LUT
b
y
c
mux
d flip-flop
q
e
clock
clock enable
set/reset

FPGA Fabric Logic Block

[email protected]
c.uk
 Look Up Tables LUTs
◼ LUT contains Memory Cells to implement small logic functions
◼ Each cell holds ‘0’ or ‘1’ .
◼ Programmed with outputs of Truth Table
◼ Inputs select content of one of the cells as output
◼ Configured by re-programmable SRAM memory cells
3 Inputs LUT -> 8 Memory Cells

16-bit SR
16x1 RAM

a 4-input
LUT
3 – 6 Inputs b
c
y
mux
d flip-flop
q
e
clock
clock enable
set/reset SRAM

Static Random Access Memory

SRAM
SRAM cells
Multiplexer MUX
[email protected]
c.uk
 FPGA – Basic Logic Element
◼ LUT to implement combinatorial logic
◼ Register for sequential circuits
◼ Additional logic (not shown):
– Carry logic for arithmetic functions
– Expansion logic for functions requiring more than 4 inputs
Select

Out

A
B
C LUT D Q

Clock
 Look-Up Tables (LUT)
◼ Look-up table with N-inputs can be used to implement any
combinatorial function of N inputs
◼ LUT is programmed with the truth-table
A B C D Z
A
0 0 0 0 0
B
0
0
0
0
0
1
1
0
1
1 C LUT Z

0 0 1 1 1 D
0 1 0 0 0
0 1 0 1 1
0 1 1 0 1 LUT implementation
0 1 1 1 1
1 0 0 0 0
1 0 0 1 1 A
1 0 1 0 1 B
1 0 1 1 1
1 1 0 0 0 Z
1 1 0 1 0 C
1 1 1 0 0
D

Truth-table Gate implementation

 LUT Implementation
◼ Example: 3-input LUT X1
X2
◼ Based on multiplexers 0/1
(pass transistors) 0/1
◼ LUT entries stored in 0/1
0/1
configuration memory F
0/1
cells
0/1
0/1
Configuration memory
0/1
cells
X3
 Logic Blocks
◼ Larger Logic Functions built up by connecting
many Logic Blocks together

[email protected]
c.uk
 Logic Blocks
◼ Larger Logic Functions built up by connecting
many Logic Blocks together
◼ Determined by SRAM cells SRAM cells
SRAM

[email protected]
c.uk
 Logic Blocks
◼ Larger Logic Functions built up by connecting
many Logic Blocks together

[email protected]
c.uk
 Logic Blocks
◼ Larger Logic Functions built up by connecting
many Logic Blocks together
◼ Determined by SRAM cells SRAM cells
SRAM

[email protected]
c.uk
 Sequential Circuits
Combinational Logic (Larger circuits difficult to predict)
Synchronous Logic driven by a CLOCK
Registers, Flip Flops (Memory)
Intermediate

New Output every clock edge

Inputs

Clock Rate determines speed

Register
CLOCK Comb Logic Must meet Timing
=> Predictable circuits

Shift Registers,
Pipelines,
Finite State Machines
EDGES
…
[email protected]
c.uk
 Clocked Logic
◼ Registers on outputs. CLOCKED storage
elements.
◼ Synchronous FPGA Logic Design, Pipelined
Logic. a
16-bit SR
16x1 RAM
4-input
LUT
b

◼ FPGA Fabric Pulse from Global Clock (e.g. c

d
mux
flip-flop
y

LHC BX frequency) e
clock
clock enable
set/reset

FPGA Fabric

Special Routing for Clocks

Clock from Outside world (eg LHC bunch frequency)
[email protected]
c.uk
 Field Programmable Gate
◼
Arrays FPGA
Field Programmable Gate Array
– ‘Simple’ Programmable Logic Blocks
– Massive Fabric of Programmable Interconnects
– Standard CMOS Integrated Circuit fabrication process as for SRAM memory chips
(Moore’s Law)
– “Hard blocks” for complex high speed functions

Huge Density of Logic Block ‘Islands’

1,000 … 100,000’s FPGA Architecture
in a ‘Sea’ of Interconnects
Field Programmable Gate
Arrays FPGA
Input Output I/O Getting data in
1 0
and out
2 7

General-purpose I/O
Up to > 1,000
banks I/O “pins”
0 through 7 (several 100 MHz)

3 6

Special I/O SERIALISERS

4 5 ~ 10 Gbps transfer rates

Transceiver block
Differential pairs
Optical TRx
FPGA