0% found this document useful (0 votes)
334 views2 pages

MRBIOS Beep and Error Codes PDF

This document provides a table listing Microid Research POST codes from 00h to 2Fh. Each POST code is accompanied by a brief description of its meaning in the boot process. The codes cover stages like initializing chipsets and ports, testing memory, setting display modes, and preparing to pass control to the boot disk.

Uploaded by

tm5u2r
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
334 views2 pages

MRBIOS Beep and Error Codes PDF

This document provides a table listing Microid Research POST codes from 00h to 2Fh. Each POST code is accompanied by a brief description of its meaning in the boot process. The codes cover stages like initializing chipsets and ports, testing memory, setting display modes, and preparing to pass control to the boot disk.

Uploaded by

tm5u2r
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 2

89719037 Tech Ref 7/26/99 12:30 PM Page 38

38 Technical Reference

Microid Research POST Codes


Table 17 Microid Research POST Codes
POST Code Meaning
00h Cold-Boot commences. (Not seen with warm boot).
01h HOOK 00. OEM specific, typically resets chipset to default.
02h Disable critical I/O: 6845s, 8237s, 765, and parity latches.
03h BIOS checksum test.
04h Page register test. (Ports 81–8F).
05h 8042 (Keyboard Controller) Selftest.
06h Gang Port Init: 8237 m/s, 8254 ch2/1, RTC REG F/A, 8259 m/s.
07h HOOK 01. OEM specific, typically disables cache, shadow.
08h Refresh toggle test (PORTB).
09h Pattern test master/slave 8237s, eight 16-bit regs each.
0Ah Base 64KB memory test.
0Bh Pattern test master/slave 8259 mask regs.
0Ch 8259/IRQ tests, purge powerup ints.
0Dh 8254 channel-0 test and initialization.
0Eh 8254 channel-2 toggle test, test speaker circuitry.
0Fh RTC tests/inits: Init REG-B, write/readback NVRAM, PIE test.
13h HOOK 02. OEM specific, select 8MHz bus.
10h Video Initialization.
11h CMOS checksum test.
12h Signon msg, Accept KB BAT, perform first try KB init, cold-boot delay.
14h Size/Test base memory (low 64KB already done).
15h Perform second try KB init, if necessary.
16h HOOK 03. OEM specific. Size/test cache.
17h Test A20 gate, off then on.
18h Size/Test extended memory.
19h HOOK 04 and Size/Test system memory (“special” OEM memory).
89719037 Tech Ref 7/26/99 12:30 PM Page 39

IBM BIOS Beep and Alphanumeric Error Codes 39

POST Code Meaning


1Ah Test RTC Update-In-Progress and validate time.
1Bh Serial port determination, off-board/onboard.
1Ch Parallel port determination, off-board/onboard.
1Dh Coprocessor determination/initialization.
1Eh Floppy controller test/determination, CMOS validation.
1Fh Fixed Disk controller test/determination, CMOS validation.
20h Rigorous CMOS parameter validation, display other config. changes.
21h Front-Panel lock check, wait for user to acknowledge errors.
22h Set NumLock, Password-Security Trap, dispatch to Setup utility.
23h HOOK 05. OEM specific.
24h Set typematic rate.
28h HOOK 06. OEM specific, typically enables shadow, cache, turbo.
25h Floppy subsystem initialization.
26h Fixed subsystem initialization.
27h ACK errors, set primary adapter video mode.
29h Disable A20-gate, set low stack, install C800-E000 ROMs.
2Ah ACK errors, set video mode, set DOS time variables from RTC.
2Bh Enable parity checking and NMI.
2Ch Install E000 ROM.
2Dh ACK errors.
2Eh HOOK 07. OEM specific. Log-in EMS (if built-in).
2Fh Pass control to INT19 (boot disk).

You might also like