LD7536R

05/11/2010

Green-Mode PWM Controller with Frequency Swapping

and Integrated Protections

Rev. 00

General Description Features

The LD7536R is built-in with several functions, protection z High-Voltage CMOS Process with Excellent ESD
and EMI-improved solution in a tiny package. It takes less protection
components counts or circuit space, especially ideal for z Very Low Startup Current (<20μA)
those total solutions of low cost. z Current Mode Control
z Green Mode Control
The implemented functions include low startup current,
z UVLO (Under Voltage Lockout)
green-mode power-saving operation, leading-edge
z LEB (Leading-Edge Blanking) on CS Pin
blanking of the current sensing and internal slope
z Internal Frequency Swapping
compensation. It also features more protections like
z Internal Slope Compensation
OLP (Over Load Protection) and OVP (Over Voltage
z OVP (Over Voltage Protection) on Vcc Pin
Protection) to prevent circuit damage occurred under
z OTP (Over Temperature Protection) through a NTC
abnormal conditions.
z OLP (Over Load Protection)
Furthermore, the Frequency Swapping function is to z 300mA Driving Capability
reduce the noise level and thus helps the power circuit
designers to easily deal with the EMI filter design by Applications
spending minimum amount of component cost and z Switching AC/DC Adaptor and Battery Charger
developing time. z Open Frame Switching Power Supply

Typical Application

DC
AC EMI Output
input Filter

VCC

OTP OUT

LD7536R
photocoupler
CS
COMP

GND

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Pin Configuration
DIP-8 (TOP VIEW) SOT-26 (TOP VIEW)

COMP
GND

OTP
OUT VCC CS

NC
8 7 6 5

6 5 4
36R
TOP MARK YWP pp
1 2 3
YYWWPP

1 2 3 4 GND COMP OTP

CS
VCC
NC
OUT

YY, Y : Year code (D: 2004, E: 2005…..)

WW, W : Week code
PP : Production code
36R : LD7536R
Ordering Information
Part number Package Top Mark Shipping

LD7536R GL SOT-26 Green Package YWP/36R 3000 /tape & reel

LD7536R GN DIP-8 Green Package LD7536R GN 3600 /tube /Carton

Protection Mode
Switching Freq. VCC OVP OLP OTP Pin

65kHz Auto recovery Auto recovery/ 65ms Latch

Pin Descriptions
SOT-26 DIP-8 NAME FUNCTION
1 8 GND Ground
Voltage feedback pin (same as the COMP pin in UC384X). Connect
2 7 COMP
a photo-coupler to close the control loop and achieve the regulation.
Pull this pin below 0.95V to shutdown the controller into latch mode
until the AC resume power-on. Connecting this pin to ground with
3 5 OTP
NTC will achieve OTP protection. Keep this pin float to disable the
latch protection.
4 4 CS Current sense pin, connect it to sense the MOSFET current
5 2 VCC Supply voltage pin
6 1 OUT Gate drive output to drive the external MOSFET

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Block Diagram

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Absolute Maximum Ratings
Supply Voltage VCC -0.3V ~29V
COMP, OTP, CS -0.3V ~6V
OUT -0.3V ~Vcc+0.3V
Maximum Junction Temperature 150°C
Operating Ambient Temperature -40°C to 85°C
Operating Junction Temperature -40°C to 125°C
Storage Temperature Range -65°C to 150°C
Package Thermal Resistance (SOT-26, θJA) 250°C/W
Package Thermal Resistance (DIP-8, θJA) 100°C/W
Power Dissipation (SOT-26) 250mW
Power Dissipation (DIP-8) 650mW
Lead temperature (Soldering, 10sec) 260°C
ESD Voltage Protection, Human Body Model 2.5 KV
ESD Voltage Protection, Machine Model 250 V
Gate Output Current 300mA

Caution:
Stresses beyond the ratings specified in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only
rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification
is not implied.

Recommended Operating Conditions

Item Min. Max. Unit

Supply Voltage Vcc 10 24 V

Start-up resistor Value 540K 1.8M Ω

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Electrical Characteristics
(TA = +25°C unless otherwise stated, VCC=15.0V)
PARAMETER CONDITIONS MIN TYP MAX UNITS
Supply Voltage (Vcc Pin)
Startup Current 12 20 μA
VCOMP=0V 1.0 mA
VCOMP=3V 2.0 mA
Operating Current
OLP Tripped/ Auto 0.47 mA
(with 1nF load on OUT pin)
OVP Tripped/ Auto 0.47 mA
OTP Pin Tripped/Latch 0.85 mA
UVLO (off) 7.5 8.5 9.5 V
UVLO (on) 15 16 17 V
OVP Level 25 26 27 V
Voltage Feedback (Comp Pin)
Short Circuit Current VCOMP=0V 0.25 mA
Open Loop Voltage COMP pin open 5.4 V
Green Mode Threshold VCOMP 2.4 V
Zero Duty Threshold VCOMP 1.5 V
Zero Duty Hysteresis 100 mV
Current Sensing (CS Pin)
Maximum Input Voltage, VCS_OFF 0.8 0.85 0.9 V
Leading Edge Blanking Time 230 ns
Internal Slope Compensation 0% to DMAX. (Linearly increase) 300 mV
Input impedance 1 MΩ
Delay to Output 100 ns
Oscillator for Switching Frequency
Frequency, FREQ 60 65 70 kHz
Green Mode Frequency, FREQG 22 kHz
Trembling Frequency ± 4.0 kHz
Temp. Stability (-20°C ~85°C) 5 %
Voltage Stability (VCC=11V-25V) 1 %

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PARAMETER CONDITIONS MIN TYP MAX UNITS
Gate Drive Output (OUT Pin)
Output Low Level VCC=15V, Io=20mA 1 V
Output High Level VCC=15V, Io=20mA 8 V
Rising Time Load Capacitance=1000pF -- 170 350 ns
Falling Time Load Capacitance=1000pF 50 100 ns
Max. Duty 75 %
OLP (Over Load Protection)
OLP Trip Level 4.3 4.5 4.7 V
OLP Delay Time 65 ms
OTP Pin Latch Protection (OTP Pin)
OTP Pin Source Current 92 100 108 μA
Turn-On Trip Level 1.00 1.05 1.10 V
Turn-Off Trip Level 0.9 0.95 1.0 V
OTP pin de-bounce time 250 μs
On Chip OTP (Over Temperature)
OTP Level 140 °C
OTP Hysteresis 30 °C
Soft Start Duration
Soft Start Duration 2 ms

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Typical Performance Characteristics
18.0 10.6

17.2 9.8
UVLO (on) (V)

UVLO (off) (V)

16.4 9.0

15.6 8.2

14.8 7.4

6.6
14.0
-40 0 40 80 120 125 -40 0 40 80 120 125
Temperature (°C) Temperature (°C)
Fig. 1 UVLO (on) vs. Temperature Fig. 2 UVLO (off ) vs. Temperature

70 26
Green Mode Frequency (KHz)

68 24
Frequency (KHz)

66 22

64 20

62 18

60 16
-40 0 40 80 120 125 -40 0 40 80 120 125

Temperature (°C) Temperature (°C)

Fig. 3 Frequency vs. Temperature Fig. 4 Green Mode Frequency vs. Temperature

25
70
Green Mode Frequency (KHz)

68 23
Frequency (KHz)

66
21

64
19

62 17

60 15
11 12 14 16 18 20 22 24 25 11 12 14 16 18 20 22 24 25
Vcc (V) Vcc (V)
Fig. 5 Frequency vs. Vcc Fig. 6 Green Mode Frequency vs. Vcc

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85 0.90

80 0.88
Max Duty (%)

VCS (off) (V)

75 0.86

70 0.84

65 0.82

60 0.80
-40 0 40 80 120 125 -40 0 40 80 120 125

Temperature (°C) Temperature (°C)

Fig. 7 Max Duty vs. Temperature Fig. 8 VCS (off) vs. Temperature
s te
18 35

15
30

12
VCC OVP (V)
Istartup (μA)

25
9

20
6

15
3

0 10
-40 0 40 80 120 125 -40 0 40 80 120 125
Temperature (°C) Temperature (°C)
Fig. 9 Startup Current (Istartup) vs. Temperature Fig. 10 VCC OVP vs. Temperature

6.5 6.0

6.0 5.0

5.5 4.5
VCOMP (V)

OLP (V)

5.0 4.0

4.5 3.5

4.0 3.0
-40 0 40 80 120 125
-40 0 40 80 120 125
Temperature (°C)
Temperature (°C)
Fig. 11 VCOMP open loop voltage vs. Temperature Fig. 12 OLP-Trip Level vs. Temperature

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Application Information
Operation Overview current. Lower startup current requirement on the PWM

The LD7536R meets the green-power requirement and is controller will help to increase the value of R1 and then

intended for the use in those modern switching power reduce the power consumption on R1. By using CMOS

suppliers and adaptors which demand higher power process and the special circuit design, the maximum

efficiency and power-saving. It integrated more functions startup current for LD7536R is only 20μA.

to reduce the external components counts and the size. If a higher resistance value of the R1 is chosen, it will

Its major features are described as below. usually take more time to start up. To carefully select the
value of R1 and C1 will optimize the power consumption
and startup time.
Under Voltage Lockout (UVLO)
An UVLO comparator is implemented in it to detect the
voltage on the VCC pin. It would assure the supply EMI
Filter
voltage enough to turn on the LD7536R PWM controller
and further to drive the power MOSFET. As shown in Fig.
13, a hysteresis is built in to prevent the shutdown from
the voltage dip during startup. The turn-on and turn-off
threshold level are set at 16.0V and 8.5V, respectively.
Vcc

UVLO(on)

UVLO(off)

t
Fig. 14
I(Vcc) operating current
(~ mA)

Current Sensing and Leading-edge

startup current
(~uA)
Blanking
t The typical current mode of PWM controller feedbacks

Fig. 13 both current signal and voltage signal to close the control
loop and achieve regulation. As shown in Fig. 15, the
Startup Current and Startup Circuit LD7536R detects the primary MOSFET current from the
The typical startup circuit to generate VCC of the LD7536R CS pin, which is not only for the peak current mode
is shown in Fig. 14. During the startup transient, the VCC control but also for the pulse-by-pulse current limit. The
is below UVLO threshold. Before it has sufficient voltage maximum voltage threshold of the current sensing pin is
to develop OUT pulse to drive the power MOSFET, R1 will set at 0.85V. From above, the MOSFET peak current can
provide the startup current to charge the capacitor C1. be obtained from below.
0.85 V
Once VCC obtains enough voltage to turn on the LD7536R IPEAK(MAX) =
RS
and further to deliver the gate drive signal, it will enable
the auxiliary winding of the transformer to provide supply

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RB
V−(PWM COMPARATOR ) = × ( VCOMP − VF )
RA + RB
A pull-high resistor is embedded internally and can be
eliminated externally.

Fig. 15

A 230nS leading-edge blanking (LEB) time is included in

the input of CS pin to prevent the false-trigger from the
current spike. In the low power applications, if the total
pulse width of the turn-on spikes is less than 230nS and
the negative spike on the CS pin below -0.3V, the R-C
filter is free to eliminate. (As shown in Fig.16).
However, the total pulse width of the turn-on spike is
determined according to output power, circuit design and
PCB layout. It is strongly recommended to adopt a
Fig. 16
smaller R-C filter (as shown in Fig. 17) for larger power
application to avoid the CS pin being damaged by the
negative turn-on spike.

Output Stage and Maximum Duty-Cycle

An output stage of a CMOS buffer, with typical 500mA
driving capability, is incorporated to drive a power
MOSFET directly. And the maximum duty-cycle of
LD7536R is limited to 75% to avoid the transformer
saturation.

Voltage Feedback Loop

The voltage feedback signal is provided from the TL431 at
the secondary side through the photo-coupler to the
COMP pin of the LD7536R. Similar to UC3842, the
LD7536R would carry a diode voltage offset at the stage
to feed the voltage divider at the ratio of RA and RB, that
is, Fig. 17

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VCC
Internal Slope Compensation
In the conventional applications, the problem of the UVLO(on)

stability is a critical issue for current mode controlling, UVLO(off)

when it operates over 50% duty-cycle. As UC384X, It OLP

UVLO(off)
OLP Reset
takes slope compensation from injecting the ramp signal t

of the RT/CT pin through a coupling capacitor. It therefore COMP

OLP delay time
requires no extra design for the LD7536R since it has
integrated it already. 4.5V

OLP trip Level

t
On/Off Control
OUT
The LD7536R can be turned off by pulling COMP pin
lower than 1.5V. The gate output pin of the LD7536R will
Switching Non-Switching Switching
be disabled immediately under such condition. The
off-mode can be released when the pull-low signal is t

removed. Fig. 18

OVP (Over Voltage Protection) on Vcc -

Over Load Protection (OLP) - Auto
Auto Recovery
Recovery The maximum VGS ratings of the power MOSFETs are
To protect the circuit from damage due to over-load mostly for 30V. To prevent the VGS enter fault condition,
condition and short or open-loop condition, the LD7536R LD7536R series are implemented with OVP function on
is implemented with smart OLP function. It also features Vcc. Whenever the Vcc voltage is higher than the OVP
auto recovery function; see Fig. 18 for the waveform. In threshold, the output gate drive circuit will be shutdown
case of fault condition, the feedback system will force the simultaneously and the switching of the power MOSFET
voltage loop toward the saturation and then pull the is disabled until the next UVLO(on).
voltage high on COMP pin (VCOMP). When the VCOMP The Vcc OVP functions of LD7536R are auto-recoverable.
ramps up to the OLP threshold of 4.5V and continues over If the OVP condition, usually caused by open-loop of
OLP delay time, the protection will be activated and then feedback, is not released, the Vcc will tripped the OVP
turn off the gate output to stop the switching of power level again and re-shutdown the output. The Vcc works
circuit. in hiccup mode. Figure 19 shows its operation.
With the protection mechanism, the average input power Otherwise, when the OVP condition is removed, the Vcc
will be minimized to remain the component temperature level will be resumed and the output will automatically
and stress within the safe operating area. return to the normal operation.

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Oscillator and Switching Frequency

The LD536R is implemented with Frequency Swapping

function which helps the power supply designers to both
optimize EMI performance and lower system cost. The
switching frequency substantially centers at 65KHz, and
swap between a range of ±4KHz.

Green-Mode Operation
By using the green-mode control, the switching frequency
can be reduced under the light load condition. This feature
Fig. 19 helps to improve the efficiency in light load conditions.
The green-mode control is Leadtrend Technology’s own
OTP Pin --- Latched Mode Protection property.

To protect the power circuit from damage due to system

failure, over temperature protection (OTP) is required. The Fault Protection
OTP circuit is implemented to sense a hot-spot of power There are several critical protections integrated in the
circuit like power MOSFET or output rectifier. It can be LD7536R to prevent from damage to the power supply.
easily achieved by connecting a NTC with OTP pin of Those damages usually come from open or short
conditions on the pins of LD7536R.
LD7536R. As the device temperature or ambient
In case under such conditions listed below, the gate
temperature rises, the resistance of NTC decreases. So,
output will turn off immediately to protect the power circuit.
the voltage on the OTP pin could be written as below. 1. CS pin floating
VOTP = 100μA ⋅ RNTC 2. COMP pin floating

When the VOTP is below the defined voltage threshold (typ.

0.95V), LD7536R will shutdown the gate output and latch
off the power supply. There are 2 conditions required to
restart it successfully. First, cool down the circuit so that
NTC resistance will increase and raise VOTP up above
1.05V. Then, remove the AC power cord and restart AC
power-on recycling.

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 LD7536R
Reference Application Circuit --- 40W (19V/2.1A) Adapter

3.15A/250V
N

L
3 OTP

2 COMP
LD7536R
GND

5 VCC
1

OUT 6
CS 4

NC
D6

RM8
IC432

SMD
ZENER1

RTN

+Vo

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 LD7536R
Package Information
SOT-26

Dimension in Millimeters Dimensions in Inches

Symbol
Min Max Min Max

A 2.692 3.099 0.106 0.122

B 1.397 1.803 0.055 0.071

C ------- 1.450 ------- 0.057

D 0.300 0.500 0.012 0.020

F 0.95 TYP 0.037 TYP

H 0.080 0.254 0.003 0.010

I 0.050 0.150 0.002 0.006

J 2.600 3.000 0.102 0.118

M 0.300 0.600 0.012 0.024

θ 0° 10° 0° 10°

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Package Information
DIP-8

Dimension in Millimeters Dimensions in Inches

Symbol
Min Max Min Max
A 9.017 10.160 0.355 0.400
B 6.096 7.112 0.240 0.280
C ----- 5.334 ------ 0.210
D 0.356 0.584 0.014 0.023
E 1.143 1.778 0.045 0.070
F 2.337 2.743 0.092 0.108
I 2.921 3.556 0.115 0.140
J 7.366 8.255 0.29 0.325
L 0.381 ------ 0.015 --------

Important Notice
Leadtrend Technology Corp. reserves the right to make changes or corrections to its products at any time without notice. Customers
should verify the datasheets are current and complete before placing order.

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Revision History

Rev. Date Change Notice

00 5/11/2010 Original Specification

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