AVS COLLEGE OF TECHNOLOGY

Attur Main Road, Near AVS College of Arts and Science,

Chinnagoundapuram, Salem – 636 106

Department of Electronics and Communication Engineering

II Year / III Semester

EC8351-ELECTRONIC CIRCUITS-1

Prepared By

Mr.C.R.PRABAKARAN

Assistant Professor

Department of Electronics and Communication Engineering

 EC8351 ELECTRONIC CIRCUITS-1 L T P C 3 0 0 3

UNIT I BIASING OF DISCRETE BJT, JFET AND MOSFET

BJT– Need for biasing - DC Load Line and Bias Point – DC analysis of Transistor circuits -

Various biasing methods of BJT – Bias Circuit Design - Thermal stability - Stability factors -

Bias compensation techniques using Diode, thermistor and sensistor – Biasing BJT Switching

Circuits- JFET - DC Load Line and Bias Point - Various biasing methods of JFET - JFET Bias

Circuit Design - MOSFET Biasing - Biasing FET Switching Circuits.

UNIT II BJT AMPLIFIERS

Small Signal Hybrid π equivalent circuit of BJT – Early effect - Analysis of CE, CC and CB

amplifiers using Hybrid π equivalent circuits - AC Load Line Analysis- Darlington Amplifier-

Bootstrap technique - Cascade, Cascode configurations - Differential amplifier, Basic BJT

differential pair – Small signal analysis and CMRR.

UNIT III SINGLE STAGE FET, MOSFET AMPLIFIERS

Small Signal Hybrid π equivalent circuit of FET and MOSFET - Analysis of CS, CD and CG

amplifiers using Hybrid π equivalent circuits - Basic FET differential pair- BiCMOS circuits.

UNIT IV FREQUENCY RESPONSE OF AMPLIFIERS

Amplifier frequency response – Frequency response of transistor amplifiers with circuit

capacitors – BJT frequency response – short circuit current gain - cut off frequency – fα, fβ

and unity gain bandwidth – Miller effect - frequency response of FET - High frequency

analysis of CE and MOSFET CS amplifier - Transistor Switching Times.

UNIT V POWER SUPPLIES AND ELECTRONIC DEVICE TESTING

Linear mode power supply - Rectifiers - Filters - Half-Wave Rectifier Power Supply - Full-Wave

Rectifier Power Supply - Voltage regulators: Voltage regulation - Linear series, shunt and

switching Voltage Regulators - Over voltage protection - BJT and MOSFET – Switched mode

power supply (SMPS) - Power Supply Performance and Testing - Troubleshooting and Fault

Analysis, Design of Regulated DC Power Supply.

 UNIT I BIASING OF DISCRETE BJT, JFET AND MOSFET

BJT– Need for biasing - DC Load Line and Bias Point – DC analysis of Transistor circuits

- Various biasing methods of BJT – Bias Circuit Design - Thermal stability - Stability

factors - Bias compensation techniques using Diode, thermistor and sensistor – Biasing BJT

Switching Circuits- JFET - DC Load Line and Bias Point - Various biasing methods of JFET -

JFET Bias Circuit Design - MOSFET Biasing - Biasing FET Switching Circuits.

PART A

Q.No Questions

1. What is operating point?

2. Draw D.C load line.

3. List out the three stability factor.

4. Discuss about Q point.

5. What is the impact of temperature on

drain current of MOSFET?

6. How to find the expression for stability factor

7. Predict the collector and base current for the given specifications hfe =80,VBE(ON)

= 0.7v, Rc=5K, Rb=10K, Vcc=5V

8. Illustrate the main idea of compensation techniques.

9. Summarize the concept of thermal runaway.

10. Give outline for compensation techniques.

11. Identify the operating regions of N-channel

MOSFET and how do you identify the operating region.

12. Categorize the different methods of biasing a JFET.

13. How would you apply various conditions for thermal stability and What are the

conditions for thermal stability?

14. Analyze the function of Q-point. How it varies the output?

15. Examine why the operating point selected at the center of the active region.
 16. List out the advantages of using emitter resistance in the context of biasing.

17. Assess the importance of selecting the proper operating point.

18. How would you explain FET is known as voltage variable resistor?

19. Build the fixed bias single stage transistor circuit.

20. How would you adapt a D.C load line in fixed bias amplifier circuit?

PART-B

Q.No Questions

1. What is D.C. load line? How will you select the operating point, explain it using common

emitter amplifier characteristics as an example? (13)

2. Demonstrate the voltage divider biasing and calculate the stability factor for BJT.

(13)

3. For a BJT with a voltage divider bias circuit, find the change in Q-point with the

variation in β when the circuit contains an emitter resistor. Let the biasing resistors

be RB1=56kΩ, RB2=12.2kΩ, RC=2kΩ, RE=0.4kΩ, VCC=10V, VBE(ON)=0.7V and β=100.

(13)

4. With neat diagrams, how would you show two bias compensation techniques and state

its advantages and disadvantages.(13)

5. Relate the various methods of biasing using BJT in terms of their stability factors.

(13)

6. (i) Illustrate stability and thermal stability. (7)

(ii) Summarize the biasing FET switching circuits. (6)

7. Interpret the circuit as shown in below. β =100 for this transistor. Calculate 𝑽𝑪𝑬 for a

given circuit. (13)

8. For the circuit shown in the figure, Ic=2mA, β =100, Calculate RE,VEC and stability

factor. (13)

9. The amplifier shown in Fig. an n-channel FET for which, ID=0.8mA, VP=--2V,Vdd =

24V and IDSS=1.6mA. Assume that rd>Rd. Calculate the parameters VGS, gm, Rs.

(13)

10. Analyze various techniques of stabilization of Q-point in a transistor. (13)

11. Explain in detail about various methods of biasing MOSFET. (13)

12. (i) Examine the circuit which uses the diode to compensate for changes in Ico.

Explain how stabilization is achieved in circuit. (8)

(ii) Briefly examine the reason for keeping the operating point of transistor as fixed.

(5)

13. (i) Evaluate the importance of emitter stabilized biasing with necessary circuit

diagram? (5)

(ii) Determine IB, IC, VCE, VC, VB, VE and VBC For the emitter bias network shown
below, (8)

14. Design the circuit shown below with transistor parameters IDSS=12mA, Vp=-4V and

λ=0.008V-1. Determine the small signal voltage gain Av=Vo/Vi. (13)

 PART-C

Q.No Questions

1. With a neat diagram explain the source and drain resistance biasing of MOSFET.

(15)

2. Elaborate the various techniques that use temperature sensitive devices to maintain

constant operating point and explain in detail. (15)

3. The circuit shown in the figure , let hfe=100 .

(i) Evaluate Vth and Rth for the base circuit. (5)

(ii) Measure ICQ and VCEQ. (5)

(iii) Draw the DC Load line (5)

4. Formulate the stability factors for any two biasing methods in detail. (15)
 UNIT II BJT AMPLIFIERS

Small Signal Hybrid π equivalent circuit of BJT – Early effect - Analysis of CE, CC and CB

amplifiers using Hybrid π equivalent circuits - AC Load Line Analysis- Darlington Amplifier

- Bootstrap technique - Cascade, Cascode configurations - Differential amplifier, Basic BJT

differential pair – Small signal analysis and CMRR.

PART A

Q.No Questions

1. What is an AC load line?

2. What is an amplifier?

3. Can you recall trans conductance.

Summarize the amplifiers classification according to the input?

4.

5. Draw the small signal equivalent of CB configuration.

6. Construct the small signal ac equivalent circuit of the BJT.

Why do you choose emitter bypass capacitor in CE

7.
amplifier circuit?

Categorize the different coupling schemes used in

8.
multistage amplifiers.

9. Evaluate the importance of Darlington circuit?

10. Discuss about Power Gain.

11. How would you show Miller effect input capacitance.

Define CMRR of BJT differential amplifier. How to improve it.

12.

13. State miller’s theorem.

14. Compare cascade and cascode amplifier.

Find CMRR of differential amplifier with differential gain

15.
300 and common mode gain of 0.2.

16. Develop the need of differential amplifier.

17. Analyze the bootstrapping technique.

18. List the various methods of improving CMRR.

 Assess why 𝑹𝑬 is replaced by a constant current bias in a differential amplifier.
19.

20. Design a cascade amplifier and its ac equivalent circuit.

PART B

1. Show the ac equivalent circuit of a CE amplifier with voltage divider bias and

Derive the expression for Current gain, Voltage gain, Input impedance, Output

admittance and overall current gain. (13)

2. Find the gain, input and output resistance of common emitter amplifier with a

neat circuit diagram and equivalent circuit. (13)

3. Summarize the gain, input impedance and output impedance of single stage BJT

amplifier using mid band analysis. (13)

4. Explain the basic common base amplifier circuit and derive the expressions for

its small signal voltage gain, current gain, input impedance and output impedance.

(13)

5. Construct the Darlington pair circuit with its operation

and advantages and also explain its small signal voltage gain and input impedance.

(13)

6. Analyze the changes in the AC characteristics of a common emitter amplifier

when an emitter resistor and an emitter bypass capacitor are incorporated in the

design? Explain with necessary equations. (13)

7. Compare CB, CE and CC amplifiers and state their applications. (13)

8. State and prove the Miller’s theorem with examples. (13)

9. What is CMRR? Derive CMRR of differential amplifier with its equivalent circuit.

(13)

10. (i) Illustrate bootstrapped Darlington circuit with neat sketch. (8)

(ii) Outline the transfer characteristics of differential amplifier. (5)

 11. (i) Develop the circuit for the following transistor Parameters, ℎ𝑓𝑒 = 125,

𝑉𝐴 = ∞, 𝑉𝐶𝐶 = 18𝑉, 𝑅𝐿 = 4𝑘Ω, 𝑅𝐿 = 3𝑘Ω, 𝑅𝐶 = 4𝑘Ω, 𝑅1 = 25.6𝑘Ω 𝑎𝑛𝑑 𝑅2 =

10.4𝑘Ω. the input signal is a current source. Identify its small signal voltage

gain, current gain, maximum voltage gain and input impedance. (8)

(ii) Develop the circuit diagram of bootstrapped emitter follower with its

equivalent circuit, derive for its input and output impedance. (5)

12. Explain the operation of cascade amplifier and derive voltage gain, overall input

resistance, overall current gain and output impedance. (13)

13. Examine the circuit diagram for a differential amplifier using BJT’s. Describe

common mode and differential modes of working. (13)

14. Discuss about the classification of differential amplifiers using BJT. (13)

PART C

Q.No Questions

1. Elaborate the small signal equivalent circuit and derive the transistor parameters

of widely used amplifier whose current and voltage gain are greater than unity.

(15)

2. Explain the bootstrapping technique of improving input resistance in common

collector circuit. (15)

3. Estimate the input and output resistance of the emitter follower circuit for the

given specifications. Assume Rs=0.5 kΩ , 𝑟𝜋 = 3.28 kΩ , β = 100, R1 = R2 = 50 kΩ

and 𝑟𝑜 = 100 kΩ , Vcc=5v, RE= 2kΩ. (15)

4. Design the cascode circuit for the following specifications: 𝑉𝐶𝐸1 = 𝑉𝐶𝐸2 = 2.5𝑣 ,

𝑉𝑅𝐸 = 0.7𝑣, 𝐼𝐶1 =𝐼𝑐2 = 1𝑚𝐴, and 𝐼𝑅1 = 𝐼𝑅2 = 𝐼𝑅3 = 0.10𝑚𝐴. (15)
UNIT III SINGLE STAGE FET, MOSFET AMPLIFIERS

Small Signal Hybrid π equivalent circuit of FET and MOSFET - Analysis of CS, CD and CG

amplifiers using Hybrid π equivalent circuits - Basic FET differential pair- BiCMOS circuits.

PART – A

Q.No. Question

1. List the advantages of common drain amplifier.

2. What is BIMOS?

3. Can you recall voltage swing limitation in JFET.

4. How a MOSFET can be used to amplify a time varying voltage?

5. Identify the impact of including a source resistor in the FET amplifier.

6. Relate pinch off voltage and drain resistance.

7. Define rise time and give the relation between bandwidth

and rise time.

8. Discuss the effect of bypass capacitor on bandwidth of the amplifier.

9. Two amplifiers having gain of 20 dB and 40 dB are cascaded. Estimate the overall

gain in dB.

10. Discuss the use of source bypass capacitor in CS amplifier.

11. If the midband gain of an amplifier is 100 and half power frequencies are fL =40Hz

and fH=16kHz. Calculate the amplifier gain at 20Hz and 20kHz frequency.

12. Illustrate about JFET common source amplifier.

13. Construct a small signal model of JFET.

14. The parameters for the transistor below are Kn = 0.5mA/V2, VTN = 1.2V, and λ = 0.

Simplify VDS and VGS for IQ=50 µA.

15. Analyze the output impedance for the MOSFET amplifier given below. Provided: Kn

= 1mA/V, VTN = 1.2V, λ = 0.01V −1, Av = 0.855 and IDQ = 1mA.

16. Compare the three FET configurations (CS, CD and CG).

 17. Explain the importance of multistage amplifiers.

18. Why N channel FET’s are preferred over P channel FET’s?

19. Develop the output impedance of a JFET amplifier shown in the figure. Let

gm=2mA/v and λ=0.

20. Create the small signal equivalent circuit for common source NMOS.

PART-B

Q.No. Question

1. (i) How would you describe the expression for the voltage gain of JFET
common source amplifier with bypassed RS. (7)

(ii) Can you recall the expression for the voltage gain of JFET common
source amplifier. (6)

2. Explain the expression for common gate circuit of JFET. (13)

3. What is JFET amplifier? Derive gain, input and output impedance of common

source JFET amplifier with neat circuit diagram and equivalent circuit.

(13)

4. (i) Define the circuit of a basic common source amplifier with voltage divider

bias and derive the expressions for voltage gain, input impedance and output

impedance using small signal model. (8)

(ii) Determine the voltage gain of the circuit, assuming the following
parameters: VDD=3.3V, RD=10KΩ, RG1=140KΩ, RG2=60KΩ, RSi=4KΩ. The

transistors parameters are Vtn =0.4V, KN=0.5mA/V2 and λ=0.02V-1 . (5)

5. (i) Explain the voltage gain of BIMOS cascode amplifier. (8)

(ii) Illustrate a discrete common gate JFET amplifier and derive voltage gain
Av, input impedance Rin, and output impedance Rout with small signal
 equivalent circuit. (5)

6. Demonstrate gain, input and ouput impedance of MOSFET

source follower with neat circuit diagram and equivalent circuit. (13)

7. Illustrate the biasing of the BiMOS cascode circuit to meet the specific

requirements. For the circuit shown in figure 38 the transistor parameters

are: VTN 1 = VTN 2=1.2V, Kn1 = Kn2 = 0.8mA/V 2, and λ1 = λ2 = 0. Let R1 +

R2 + R3 =

300KΩ and RS = 10KΩ. Design the circuit such that IDQ = 0.4mA and

VDSQ1 = VDSQ2 = 2.5V. (13)

8. (i) Construct how JFET can be used as an amplifier. (7)

(ii) Develop and explain a small signal low frequency model of JFET. (6)

9. Construct a common gate MOSFET amplifier and derive for Av, Ai and Ri using

small signal equivalent circuit. (13)

10. Analyze a simple JFET source-follower amplifier circuit and discuss the

general AC circuit characteristics. (13)

11. (i) Explain on voltage swing limitations, general conditions under which a source
follower amplifier would be used. (10)

(ii) Examine and describe the characteristics of BiCMOS circuits. (3)

12. (i) Point out the small signal parameters of MOSFET. (7)
(ii) Select and configure a common-source amplifier with source resistor.(6)
13. (i) Consider the PMOS amplifier. The transistor parameters are

Vtp=-1v,βp=(µpCox(W/L)=1mA/v2 and λ=0.

(a) Determine RD and RS, such that IDQ =0.75mA and VSDQ=6V.

(b) Determine input impedance Ri and output impedance Ro.

(c) Voltage gain, Current gain and maximum output
 voltage swing. (10)

(ii) Determine the current gain of JFET source follower amplifier. (3)

14. Derive the expression for the voltage gain of Common source amplifier and

Common drain amplifier configuration, under small signal low frequency

conditions. (13)

PART-C

Q.No. Question

1. Evaluate the voltage swing limitations and general conditions under which a

source amplifier would be used and explain common source amplifier with

source resistor and source bypass capacitor. (15)

2. Design and analyze the characteristics of BiCMOS cascode amplifier, and

explain graphically the amplification process in a simple MOSFET amplifier

circuit. (15)
 Determine the small signal voltage gain of a multistage cascade circuit shown in
2 2,
3. the figure below. The transistor parameters are Kn1=0.5mA/V , Kn2=0.2mA/V

VTN1=VTN2=1.2V and λ1=λ2=0. The Quiescent drain currents are ID1=0.2mA

and ID2=0.5mA. (15)

4. Develop the small signal equivalent circuit for FET shown in the figure given

below and hence find VO1/Vi and VO2/Vi in terms of circuit constants.

(15)
UNIT IV FREQUENCY RESPONSE OF AMPLIFIERS

Amplifier frequency response – Frequency response of transistor amplifiers with circuit

capacitors – BJT frequency response – short circuit current gain - cut off frequency – fα,

fβ and unity gain bandwidth – Miller effect - frequency response of FET - High

frequency analysis of CE and MOSFET CS amplifier - Transistor Switching Times.

PART – A

Q.No. Question

1. What is the effect of miller’s capacitance on the frequency response of an

amplifier?

2. Define rise time. Give the relationship between bandwidth and rise time.

3. List out the advantages of h parameter.

4. Can you recall the need of cascading multistage amplifiers?

5. What is the reason for reduction in gain for lower and higher frequencies in case

of amplifiers?

6. If the rise time of a BJT is 35 nano seconds. Identify the bandwidth that can be

obtained using this BJT.

7. Differentiate small signal equivalent & hybrid π equivalent circuit.

8. Express the equation of overall lower and upper cutoff frequency of multistage

amplifier.

9. Give the main reason for the drop in gain at the low frequency region & high

frequency region.

10. Discuss the limitations of multistage amplifiers.

11. The AC schematic of an NMOS common source stage is shown in the figure, where

part of the biasing circuit has been omitted for simplicity. For the N-channel

MOSFET M1,the transconductance, gm=1mA/v and body effect and channel length

modulation effect are to be neglected. Identify the lower cutoff frequency.

12. Develop the concept of Miller Impedance.

13. Solve the unity gain bandwidth of MOSFET whose gm = 1.2m A/V, Cgs = 50fF,

Cgd= 10 pF, and Cds = 1 pF.

14. Compare BJT and MOSFET Amplifiers.

15. Short circuit CE current gain of transistor is 25 at a frequency of 2 MHz if fᵦ =

200 KHz Examine i) hfe ii) find |Ai| at frequency of 10 MHz and 100 MHz.

16. Assess the cut-off frequency due to the bypass capacitor in the figure.

17. Common base amplifier is preferred for high frequency signal when compared to

CE amplifier. Justify.

18. Evaluate transistor switching times.

19. Create the hybrid π equivalent model of the BJT

 20. Develop the high frequency equivalent circuit model for MOSFET.

PART-B

Q.No Question

1. Describe with neat diagram and derive the expression for cut off frequency of a

BJT. (13)

2. Explain the upper and lower cut off frequencies of multistage amplifier with

expressions. (13)

3. How would you describe the relation between rise time, upper cut off frequency and

bandwidth. (13)

4. Can you recall the operation of high frequency common source FET amplifier with

neat diagram. Derive the expression for i) Voltage gain ii) Input admittance iii)

input capacitance iv) Output admittance. (13)

5. Summarize the expressions for the short circuit current gain of common emitter

amplifier at a high frequency. Define alpha cut-off frequency, beta cut-off

frequency and transition frequency and derive their values in terms of the circuit

parameters (13)

6. (i) Discuss in detail about the bandwidth of single stage amplifiers. (7)
(ii) Describe in detail about gain bandwidth product for voltage and current of
BJT. (6)

7. (i) Summarize alpha cut-off frequency, beta cut-off frequency and transition
frequency. (7)

(ii) Summarize the expression for Low Frequency Analysis of BJT. (6)

8. (i) Write a brief outline about multistage amplifiers. (8)

(ii) Examine the advantages and applications of single stage and multistage
amplifiers. (5)

9. Demonstrate the low frequency response of the amplifier

shown in fig. hie=r π=1.1K (13)

10. (i) Analyze the bandwidth of the amplifier shown, rb =100Ω, Rπ= 1.1 K ,Cπ= 3 pF

,Cµ= 100 pF ,hfe = 225. (10)

(ii) Formulate the cut-off frequency due to C1 and C2 in the circuit shown in the

fig. (3)
11. Point out the function of transistor and derive the expression

for input conductance (gbe) and output resistance (gce) for hybrid – π common

emitter transistor model. (13)

12. (i) Analyze the relation between sag and lower cut off frequency. (7)

(ii) For the circuit shown in figure, Analyze the percentage tilt. Assume

approximate h – parameter circuit for the transistor.

(6)

13. Evaluate a MOSFET current source amplifier for the following specifications:

VDD = +5V, Kn’ = 40 µA/V2, VT = 1V, λ = 0, IREF = 0.2mA, I0 = 0.1mA and

VDS2(sat) = 0.8V. (13)

14. Develop the high frequency equivalent circuit of a MOSFET

from its geometry and derive the expression for short circuit current gain in the

common source configuration. (13)

PART-C

Q.No. Question

1. Obtain the low frequency response and high frequency response of an amplifier,

derive its cutoff frequency & discuss the terms rise time and sag. (15)

2. Design the high frequency analysis of JFET with necessary circuit diagram& gain

bandwidth product and explain the frequency response of MOSFET CS amplifier.

(15)
3. Determine the midband gain Am and upper 3dB frequency fH of a CS amplifier

fed with a signal source having an internal resistance Rsig=100KΩ. The amplifier

has RG=4.7MΩ, RD=RL=15KΩ, gm=1mA/V, ro=150KΩ, cgs=1pF and cgd=0.4pF.

(15)

4. Estimate the midband gain, input impedance, output impedance, bandwidth and

maximum output voltage swing for the given NMOS transistor paramenters are

µnCox(W/L)=0.5mA/V2, VGSQ=3.25V, Vth=2V, λ=0, Cgd=0.1pF, Cgs=1pF,

RG1=234KΩ, RG2=166KΩ, Rsig=10KΩ, RD=4KΩ, RL=20KΩ, RS=0.5KΩ assume

CG=CD=CS=1pF.

(15)
 UNIT V POWER SUPPLIES AND ELECTRONIC DEVICE TESTING

Linear mode power supply - Rectifiers - Filters - Half-Wave Rectifier Power Supply - Full-

Wave Rectifier Power Supply - Voltage regulators: Voltage regulation - Linear series,

shunt and switching Voltage Regulators - Over voltage protection - BJT and MOSFET –

Switched mode power supply (SMPS) - Power Supply Performance and Testing -

Troubleshooting and Fault Analysis, Design of Regulated DC Power Supply.

PART-A

1. Point out the advantages and disadvantages of linear power supply.

2. Define ripple factor.

3. List the advantages and disadvantages of Half wave rectifier.

4. Find the ripple factor of FWR.

5. What is filter?

6. Why capacitor input filter is not suitable for variable loads?

7. Construct the diagram of CLC filter.

8. Using a dc and ac voltmeter to measure the output signal from a filter circuit, we

obtain readings of 25 V dc and 1.5 V rms. Solve the ripple of the filter output

voltage.

9. Estimate the ripple voltage of a full-wave rectifier with a 100mF filter capacitor

connected to a load drawing 50 mA.

10. Summarize the TUF of HWR and FWR.

11. Recall the concept of Voltage regulation.

12. A dc voltage supply provides 60 V when the output is unloaded. When connected to

a load, the output drops to 56

V. Calculate the value of voltage regulation.

13. Design the block diagram of Series voltage regulator.

14. Sketch the Block representation of three-terminal voltage regulator.

15. Analyze the three importance of over voltage protection.

16. What is meant by switched mode power supply?

17. Compare the SMPS with linear power supply.

18. Identify the need for troubleshooting and fault analysis.

19. Categorize the troubleshooting techniques in electronic

circuits.

20. Simplify the block diagram of regulated DC power supply.

PART-B

Q.No Questions

1. Define voltage regulation and describe about series voltage regulation. (13)

2. (i) What is rectifier? Explain in detail about the operation of half wave rectifier
(10)

(ii) How would you explain about PIV? (3)

3. (i) Define linear mode power supply. (5)

(ii) Explain single mode power supply. (8)

4. Recall the operation of switching voltage regulator. (13)

5. (i) Outline the comparison of half wave and full wave rectifier. (7)

(ii) Summarize the comparison of shunt and voltage regulator. (6)

6. Illustrate the shunt voltage regulator and also explain the illustration of shunt

voltage regulator using op – amp. (13)

7. Summarize the flow of current during positive and negative half cycle in full wave

rectifier. (13)

8. (i) Develop over voltage protection. (8)

(ii) Model the trouble shooting and fault analysis. (5)

9. Examine the step down transformer having ratio 10:1 and input 230V,50Hz is

used in a half wave rectifier. The diode forward resistance is 15 ohms and

resistance of secondary winding is 10 ohms. For a load resistance of 4kohms,

calculate average and r.m.s. values of load current and voltage,

rectification efficiency and ripple factor. (13)

10. Inspect the the output voltage and the Zener current in the
 given regulator circuit for RL = 1 kohm. (13)

11. Simplify the parameters of the regulated voltage and circuit currents for the

below shunt regulator. (13)

12. Demonstrate the design of regulated dc power supply (13)

13. Assess the technique of power supply performance and testing. (13)

14. Design a full wave rectifier a signal of 300 volts at 50 Hz is applied at the input.

Each diode has an internal resistance of 800ohms.If the load is 2000 ohms,

calculate

i)Instant peak value of current in the output ii)Output dc current

iii)Efficiency of power transfer (13)

PART-C

Q.No Questions

1. (i) Discuss the working of half wave rectifier with neat diagram. (7)

(ii) Formulate the expression for the rectification efficiency, ripple factor,
transformer utilization factor and peak factor of half wave rectifier. (8)
2. A full wave rectifier circuit is fed from a transformer having a center tapped

secondary winding. The rms voltage from either end of secondary to center tap is

20V.If the diode forward resistance is 3ohm and that of the half secondary is

5ohm, for a load of 1 kΩ , estimate the power delivered to load,% regulation at

full load, efficiency at full load and TUF of secondary. (15)

3. Elaborate the operation of series and shunt voltage regulator with its neat circuit

diagram. (15)

4. Summarize the process of troubleshooting and fault analysis in electronic circuits.

(15)