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Redundant Number Systems

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 Redundant Number
Systems

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Dr. Shadrokh Samavi Isfahan University of Technology 1
 Chapter Contents
3.1 Coping with the Carry Problem
3.2 Redundancy in Computer Arithmetic
3.3 Digit Sets and Digit-Set Conversions
3.4 Generalized Signed-Digit Numbers
3.5 Carry-Free Addition Algorithms
3.6 Conversions and Support Functions

Textbook: Computer Arithmetic: Algorithms and Hardware Designs, Oxford

University Press, New York, 2000 , by Parhami, B.
Many of the slides are either from the textbook or from Parhami’s slides.
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Dr. Shadrokh Samavi Isfahan University of Technology 2
 3.1. Coping with the Carry
Problem

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Dr. Shadrokh Samavi Isfahan University of Technology 3
 Coping with the Carry Problem

The carry problem can be dealt with in several ways:

1. Limit carry propagation to within a small number of bits
(hybrid redundant and residue number system)
2. Detect end of propagation; don’t wait for worst case
(Asynchronous Adders)
3. Speed up propagation via lookahead etc.
4. Ideal: Eliminate carry propagation altogether!
(this chapter)

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Dr. Shadrokh Samavi Isfahan University of Technology 4
Radix r = 10, digit set = [0, 18]

No carry propagation at this stage.

But what about when two numbers
with digit set [0,18] are added?

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Dr. Shadrokh Samavi Isfahan University of Technology 5
Adding radix-10 numbers with digit set [0, 18]

Convert
[0,36] to
[0,18].
Propagation
only in one
position

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Dr. Shadrokh Samavi Isfahan University of Technology 6
Position sum decomposition [0, 36] = 10 × [0, 2] + [0, 16]
Absorption of transfer digit [0, 16] + [0, 2] = [0, 18]
So, redundancy helps us achieve carry-free addition.
But how much redundancy is actually needed? [0,18] is
too much, [0,11] would do.

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Dr. Shadrokh Samavi Isfahan University of Technology 7
Ideal and practical carry-free addition schemes.

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Dr. Shadrokh Samavi Isfahan University of Technology 8
3.2. Redundancy in Computer
Arithmetic

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Dr. Shadrokh Samavi Isfahan University of Technology 9
 Continue on next slide
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Dr. Shadrokh Samavi Isfahan University of Technology 10
Addition of 4 binary numbers with stored-carry

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Dr. Shadrokh Samavi Isfahan University of Technology 11
 2-bit encoding for binary stored-carry digits
0 represented as 00
1 represented as 10 or 01
2 represented as 11

Carry-save addition using an array of independent binary full adders.

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Dr. Shadrokh Samavi Isfahan University of Technology 12
 Example

6 2 2 operand in [0, 2]
+3 1 1 operand in [0, 1 ]
9 3 3 sum in [0, 3]

1 1 1 1
1 1
01 1 1 1 0
1 2 1 =9

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Dr. Shadrokh Samavi Isfahan University of Technology 13
3.3. Digit Sets and Digit-Set
Conversions

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Dr. Shadrokh Samavi Isfahan University of Technology 14
Example 3.1: Convert from digit set [0, 18] to the digit
set [0, 9] in radix 10.

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Dr. Shadrokh Samavi Isfahan University of Technology 15
Example 3.2: Convert from digit set [0, 2]
to digit set [0, 1] in radix 2.

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Dr. Shadrokh Samavi Isfahan University of Technology 16
Example 3.3: Convert from digit set [0, 18]
to the digit set [–6, 5] in radix 10 (same as
Example 3.1, but with an asymmetric target
digit set)

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Dr. Shadrokh Samavi Isfahan University of Technology 17
 Converting [0, 18] to [-6, 5]

[0, 18] [-6, 5] [-6, 5] [0, 18] [-6, 5] [-6, 5]

18 2,-2 8 1,-2
17 2,-3 7 1,-3
16 2,-4 6 1,-4
15 1,5 2,-5 5 5 1,-5
14 1,4 2,-6 4 4 1,-6
13 1,3 3 3
12 1,2 2 2
10 1,0 1 1
9 1,-1 0 0

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Dr. Shadrokh Samavi Isfahan University of Technology 18
Example 3.4: Convert from digit set [0, 2] to digit
set [–1, 1] in radix 2 (same as Example 3.2, but with
the target digit set [–1, 1] instead of [0, 1])

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Dr. Shadrokh Samavi Isfahan University of Technology 19
3.4. Generalized Signed-Digit
Numbers

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 ‹#›
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Binary vs multivalue encoding of GSD digit sets

Four encodings for the BSD digit set [–1, 1]

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Dr. Shadrokh Samavi Isfahan University of Technology 23
The hybrid example in Fig. 3.8, with a regular pattern of
binary (B) and BSD positions, can be viewed as an
implementation of a GSD system with r = 8
digit set [–4, 7] –1 0 0 to 1 1 1

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Dr. Shadrokh Samavi Isfahan University of Technology 24
 3.5. Carry-Free Addition

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Dr. Shadrokh Samavi Isfahan University of Technology 25
 Breaking the Carry Chain Using SD

Can make sum only a function of two digit positions

si  f ( xi , yi , xi 1 , yi 1 )

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Dr. Shadrokh Samavi Isfahan University of Technology 26
 Carry-Free Addition Algorithm

Step 1: Find interim sum wi and transfer digit ti+1

where

wi  xi  yi  rti 1 positional sum pi

and
 1 if ( xi  yi )  a

ti 1   1 if ( xi  yi )  a
0 if x  y )  a
 i i i

Step 2: Find final sum si

si  wi  ti note : t0  0

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 Signed Digit Addition Hardware

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 SD Addition Example

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Dr. Shadrokh Samavi Isfahan University of Technology 29
 SD Addition Example (Continued)

Let X = 1634, Y = 3366 a=6

Using normal addition produces a carry chain
1 1 1
X 1 6 3 4
Y 3 3 6 6
5 0 0 0
But by the carry-free algorithm:

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Dr. Shadrokh Samavi Isfahan University of Technology 30
 Converting Decimal to SD

Let r = 10, a = 6
Consider the value as xi + yi and use algorithm
xi  yi 1 8 2 6
ti 0 1 0 1 0
wi 1 2 2 4
si 2 2 3 4

Converting from SD to decimal: just add up the

plus and minus weights, i.e.:
2030 – 204 = 1826

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Dr. Shadrokh Samavi Isfahan University of Technology 31
Selecting a to Eliminate Carry Chain in SD

We don’t want carry when adding ti and wi to get si

si  {a, a  1, ,1, 0,1, , a  1, a}
si  wi  ti  a
worst case ti  1 restricting
Worst case:
wi  a  1 equation (1)
must be true for all xi , yi where ti  1

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Dr. Shadrokh Samavi Isfahan University of Technology 32
Selecting a to Eliminate Carry Chain in SD

case 1: xi+yi=2a

case 2: xi+yi=a

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Dr. Shadrokh Samavi Isfahan University of Technology 33
 Binary SD Addition

In general we have:

It does not work for r=2.

For radix 2 only digit set
[-1, 1] applies.

Implies no guarantee that si = wi + ti will not produce a

carry

Looking at algorithm: wi  ( xi  yi )  2ti 1

Step 1:  1 if  xi  yi   1

ti 1   1 if  xi  yi   1
 0 if  xi  yi   0

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Dr. Shadrokh Samavi Isfahan University of Technology 34
Unmodified Binary SD Addition Table

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Dr. Shadrokh Samavi Isfahan University of Technology 35
 Usefulness of Unmodified Table
Works if operands do not contain 1
If operands contain only 0’s and 1’s, no carry generated.
si  wi  ti
 
0 or 1 0 or 1

Example 1 1 .... 1 1 1
0 0 .... 0 0 1
1 1 1 .... 1 1 ti
1 1 .... 1 1 0 wi
1 0 0 .... 0 0 0 si

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Dr. Shadrokh Samavi Isfahan University of Technology 36
 Limitations of Table

Does not work if operands contain 1

If wi  1  xi yi  0 1
and ti  1  xi 1 yi 1  01, 11
 si has carry.
Example (-9)10 + (29)10
0 1 1 1 1 1
1 0 0 1 0 1
1 1 1 1 1 1 ti
1 1 1 0 1 0 wi
* * * * 1 0 0 si
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Dr. Shadrokh Samavi Isfahan University of Technology 37
 SD Addition Table Choices
Takagi, 1985

yi 1 0 1
xi
10
11
00 xi 1 or yi 1  1
1
01
11 01 ti wi
0 00
01 11 ti wi
01
1 00 10 xi 1 or yi 1  0,1
11
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Dr. Shadrokh Samavi Isfahan University of Technology 38
 Modified Binary SD Addition Table

xi,yi 00,11 01 01 01 01 11 11
xi-1,yi-1 neither
- neither at least
is
at - -
is one is 1 1 least
1 one is 1
ti+1
0 1 0 0 1 1 1
wi
0 1 1 1 1 0 0

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Dr. Shadrokh Samavi Isfahan University of Technology 39
Repeating Example with Modified Table

Example (-9)10 + (29)10

0 1 1 1 1 1
1 0 0 1 0 1
0 0 0 1 1 1 ti
1 1 1 0 1 0 wi
1 1 0 1 0 0 si
no carries

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Dr. Shadrokh Samavi Isfahan University of Technology 40
 Singed Digit Encodings

two’s complement

Encoding 1 Encoding 2
x xh xl xh xl
0 00 00
1 01 01
1 10 11

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Dr. Shadrokh Samavi Isfahan University of Technology 41
 Encoding 1

Satisfies simple relation

x = xl - xh
and 11 has a valid numerical value of 0.
SD to two’s complement conversion performed
by two’s complement subtraction
l l l
x n 1 ,x n2 , , x 0

x h
n 1 ,x h
n2 , , x h
0

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Dr. Shadrokh Samavi Isfahan University of Technology 42
 Encoding 2

Satisfies relation
xi = -2xih + xil
This means that xil and xi-1h have the same weight

Also simplified addition table possible by

regrouping bits

xil , and xih1 , can be regrouped to form xˆi

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Dr. Shadrokh Samavi Isfahan University of Technology 43
 Two’s Complement/BSD Conversion
Two’s Complement to SD
Bits can be encoded directly with MSB negative one
BSD to Two’s Complement
One algorithm simpler than complete binary adder
zi is two’s complement result c0 = 0
yi ci zi ci 1 yi  ci  zi  2ci 1
0 0 0 0 Example -1010
0 1 1 1
yi 0 1 0 1 0
1 0 1 0 ci 1 1 1 1 0 0
1 1 0 0 zi 1 0 1 1 0
1 0 1 1
1 1 0 1
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Dr. Shadrokh Samavi Isfahan University of Technology 44
 Binary SD Representations

Representation of a value with the minimum number of

non-zero digits – Important in multiplication and division
since each zero eliminates an operation
X = 5, n = 4, r = 2
8 4 2 1 Minimal SD
0 1 0 1 representation of X = 5
1 0 1 1 .
0 1 1 1
1 1 0 1
1 1 1 1

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Dr. Shadrokh Samavi Isfahan University of Technology 45
implementations for limited-carry addition

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Dr. Shadrokh Samavi Isfahan University of Technology 46
 Signed-Digit Number Systems

• Fixed radix (positional)

• Allows each digit to carry a sign
example

xi {  1,   2,....,1,0,1,....,   1}

i  i
This signed digit (SD) is a new definition of the digit
complement

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Dr. Shadrokh Samavi Isfahan University of Technology 47
 Signed-Digit Example

  10

xi {9,8,....,1,0,1,....,8,9}
for a total of 19 possible
digits X min  99, X max  99
If n = 2 X  [99,99]
ulp  1

199 values, however there are

192 = 361 representations
possible which implies this is a
redundant number system

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Dr. Shadrokh Samavi Isfahan University of Technology 48
 Signed-Digit Example - Redundancy

xi {9,8,....,1, 0,1,....,8,9} 19 possible digits

For n = 2, range is X  [99,99]

# of values=
# of representations=
% redundancy=
Redundancy index=

Example redundant representation:

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Dr. Shadrokh Samavi Isfahan University of Technology 49
 Restricting Redundancy

xi  {a, a  1, ,1, 0,1 , a}

where
Make restrictions on ‘a’ to restrict redundancy
 r  1
 a  r  1,
a=9 %redundancy=
  5a9 (r  10)
 2% redundancy=
a=8 

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Dr. Shadrokh Samavi Isfahan University of Technology 50
 Signed-Digit Characteristics

• Positive radix, ß > 0

• X = 0 is unique

• Easy to convert

• Constant Delay for Add/Sub Regardless of Word Size

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Dr. Shadrokh Samavi Isfahan University of Technology 51