Digital Logic Basics

Chapter 1
S. Dandamudi

Outline
• Basic concepts • Deriving logical expressions
∗ Simple gates ∗ Sum-of-products form
∗ Completeness ∗ Product-of-sums form
• Logic functions • Simplifying logical
∗ Expressing logic functions expressions
∗ Equivalence ∗ Algebraic manipulation
• Boolean algebra ∗ Karnaugh map method
∗ Boolean identities ∗ Quine-McCluskey method
∗ Logical equivalence • Generalized gates
• Logic Circuit Design • Multiple outputs
Process • Implementation using other
gates (NAND and XOR)
1999  S. Dandamudi Digital Logic Basics: Page 2

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 Introduction
• Hardware consists of few simple building blocks
∗ These are called logic gates
» AND, OR, NOT
• Logic gates are built using transistors
» NOT gate can be implemented by using 1 transistor
» AND gate requires 3 transistors
• Transistors are the fundamental devices
» Pentium (1993) consists of 3 million transistors
» Compaq Alpha consists of 9 million transistors
» Current (in 1999), we can build chips with 100 million
transistors

1999  S. Dandamudi Digital Logic Basics: Page 3

Basic Concepts
A B F
• Simple gates
0 0 0
∗ AND A 0 1 0
F
∗ OR B 1 0 0

∗ NOT AND gate 1 1 1

• Functionality can be A B F

expressed by a truth table A

0 0 0
0 1 1
∗ A truth table lists output of B
F
1 0 1
the function for each 1 1 1
OR gate
possible input combination
A F
• Other methods
A F 0 1
∗ Logic expressions 1 0
NOT gate
∗ Logic diagrams
Logic symbol Truth table

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 Basic Concepts (cont’d)
A B F
• Additional useful gates 0 0 1
∗ NAND A
F 0 1 1
B
∗ NOR
1 0 1

NAND gate 1 1 0
∗ XOR
A B F
• NAND is AND+NOT 0 0 1
A
0 1 0
• NOR is OR + NOT B
F
1 0 0

• XOR implements NOR gate 1 1 0

exclusive-OR function A B F
0 0 0
• NAND and NOR gates A 0 1 1
F
require only 2 transistors B 1 0 1

∗ AND and OR need 3 XOR gate 1 1 0

transistors! Logic symbol Truth table

1999  S. Dandamudi Digital Logic Basics: Page 5

Basic Concepts (cont’d)

• Number of functions
∗ With N logical variables, we can define
N
22 functions
∗ Some of them are useful: AND, NAND, NOR, XOR,…
∗ Some are not useful:
» Output is always 1
» Output is always 0
∗ Number functions definition is useful in proving
completeness property

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 Basic Concepts (cont’d)
• Complete sets
∗ A set of gates is complete
» if we can implement any logical function using only the type of
gates in the set
– You can uses as many gates as you want
∗ Some example complete sets
» {AND, OR, NOT} Not a minimal complete set
» {AND, NOT}
» {OR, NOT}
» {NAND}
» {NOR}
∗ Minimal complete set
– A complete set with no redundant elements.
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Basic Concepts (cont’d)

• Proving NAND gate is universal

A
F
B

AND gate
A

A F B

NOT gate OR gate

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 Basic Concepts (cont’d)
• Proving NOR gate is universal

A
F
B

OR gate
A

A F B

NOT gate AND gate

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Logic Chips
• Low voltage level: < 0.4V
• High voltage level: > 2.4V
• Positive logic:
volts
∗ Low voltage represents 0
5
∗ High voltage represents 1
4
High level
• Negative logic: 3
∗ High voltage represents 0 2 Undefined range
∗ Low voltage represents 1 1 (forbidden)
Low level
• Propagation delay
∗ Delay from input to output
∗ Typical value: 5-10 ns

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 Logic Chips (cont’d)
1 14 Vcc 1 14 Vcc 1 14 Vcc

2 13 2 13 2 13

3 12 3 12 3 12

4 11 4 11 4 11

5 10 5 10 5 10

6 9 6 9 6 9

GND 7 8 GND 7 8 GND 7 8

7400 7408 7432

1 14 Vcc 1 14 Vcc 1 14 Vcc

2 13 2 13 2 13

3 12 3 12 3 12

4 11 4 11 4 11

5 10 5 10 5 10

6 9 6 9 6 9

GND 7 8 GND 7 8 GND 7 8

7404 7486 7402

1 14 Vcc 1 14 Vcc

2 13 2 13

3 12 3 12

4 11 4 11

5 10 5 10

6 9 6 9

GND 7 8 GND 7 8

7420 7430

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Logic Chips (cont’d)

• Integration levels
∗ SSI (small scale integration)
» Introduced in late 1960s
» 1-10 gates (previous examples)
∗ MSI (medium scale integration)
» Introduced in late 1960s
» 10-100 gates
∗ LSI (large scale integration)
» Introduced in early 1970s
» 100-10,000 gates
∗ VLSI (very large scale integration)
» Introduced in late 1970s
» More than 10,000 gates
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 Logic Functions
• Logical functions can be expressed in several
ways:
∗ Truth table
∗ Logical expressions
∗ Graphical form
• Example:
∗ Majority function
» Output is one whenever majority of inputs are 1
» We use 3-input majority function

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Logic Functions (cont’d)

3-input majority function • Logical expression form
A B C F F=AB+BC+AC

0 0 0 0 A B C

0 0 1 0
0 1 0 0
0 1 1 1
F
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 1
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 Logical Equivalence
• All three circuits implement F= A B function
A
A F2
F1 B
B

(a) (b)

A
B

F3

(c)
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Logical Equivalence (cont’d)

• Proving logical equivalence of two circuits
∗ Derive the logical expression for the output of each
circuit
∗ Show that these two expressions are equivalent
» Two ways:
– You can use the truth table method
QFor every combination of inputs, if both expressions
yield the same output, they are equivalent
QGood for logical expressions with small number of
variables
– You can also use algebraic manipulation
QNeed Boolean identities

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 Logical Equivalence (cont’d)
• Derivation of logical expression from a circuit
∗ Trace from the input to output
» Write down intermediate logical expressions along the path

A A+B
B (A + B) (A + B)

B
A+B F3
A (A + B) (A + B) (A + B)
A+B

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Logical Equivalence (cont’d)

• Proving logical equivalence: Truth table method

A B F1 = A B F3 = (A + B) (A + B) (A + B)
0 0 0 0
0 1 0 0
1 0 0 0
1 1 1 1

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 Boolean Algebra
• Boolean identities
Name AND version OR version
Identity x.1 = x x+0=x
Complement x. x = 0 x+x=1
Commutative x.y = y. x x+y=y+x
Distribution x. (y+z) = xy+xz x + (y. z) =
(x+y) (x+z)
Idempotent x.x = x x+x=x
Null x.0 = 0 x+1=1
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Boolean Algebra (cont’d)

• Boolean identities (cont’d)
Name AND version OR version

Involution x=x ---

Absorption x. (x+y) = x x + (x.y) = x
Associative x.(y. z) = (x. y).z x + (y + z) =
(x + y) + z
de Morgan x. y = x + y x+y=x.y

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 Boolean Algebra (cont’d)
• Proving logical equivalence: Boolean algebra
method
∗ To prove that two logical functions F1 and F2 are
equivalent
» Start with one function and apply Boolean laws to derive the
other function
» Needs intuition as to which laws should be applied and when
– Practice helps
» Sometimes it may be convenient to reduce both functions to
the same expression
∗ Example: We show that F1= A B and F3 are equivalent

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Logic Circuit Design Process

• A simple logic design process involves
» Problem specification
» Truth table derivation
» Derivation of logical expression
» Simplification of logical expression
» Implementation

Probem Derive Derive logical Simplify logical Derive final

specification truth table expression expression logic circuit
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 Deriving Logical Expressions
• Derivation of logical expressions from truth tables
∗ sum-of-products (SOP) form
∗ product-of-sums (POS) form
• SOP form
∗ Write an AND term for each input combination that
produces a 1 output
» Write the variable if its value is 1; complement otherwise
∗ OR the AND terms to get the final expression
• POS form
∗ Dual of the SOP form

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Deriving Logical Expressions (cont’d)

• 3-input majority function • SOP logical expression
A B C F • Four product terms
∗ Because there are 4 rows
0 0 0 0 with a 1 output
0 0 1 0
0 1 0 0
F=ABC+ABC+
0 1 1 1
ABC+ABC
1 0 0 0
1 0 1 1
• Sigma notation
1 1 0 1
3 (3, 5, 6, 7)
1 1 1 1
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 Deriving Logical Expressions (cont’d)
• 3-input majority function • POS logical expression
A B C F • Four sum terms
∗ Because there are 4 rows
0 0 0 0 with a 0 output
0 0 1 0
0 1 0 0
F = (A + B + C) (A + B + C)
0 1 1 1
(A + B + C) (A + B + C)
1 0 0 0
1 0 1 1
• Pi notation
1 1 0 1
Π (0, 1, 2, 4 )
1 1 1 1
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Brute Force Method of Implementation

3-input even-parity function • SOP implementation
A B C A B C
A B C F
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 1 F

1 0 1 0
1 1 0 0
1 1 1 1
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 Brute Force Method of Implementation
3-input even-parity function • POS implementation
A B C A B C
A B C F
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 1 F

1 0 1 0
1 1 0 0
1 1 1 1
1999  S. Dandamudi Digital Logic Basics: Page 27

Logical Expression Simplification

• Three basic methods
∗ Algebraic manipulation
» Use Boolean laws to simplify the expression
– Difficult to use
– Don’t know if you have the simplified form
∗ Karnaugh map method
» Graphical method
» Easy to use
– Can be used to simplify logical expressions with a few
variables
∗ Quine-McCluskey method
» Tabular method
» Can be automated
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