What Is Difference Between Von Neumann and Non Von Neumann Machines?
What Is Difference Between Von Neumann and Non Von Neumann Machines?
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non von Neumann architecture Any computer architecture in which the underlying model of
computation is different from what has come to be called the standard von Neumann model (see von
Neumann machine). A non von Neumann machine may thus be without the concept of sequential flow of
control (i.e. without any register corresponding to a “program counter” that indicates the current point that
has been reached in execution of a program) and/or without the concept of a variable (i.e. without
“named” storage locations in which a value may be stored and subsequently referenced or changed).
Examples of non von Neumann machines are the dataflow machines and the reduction machines. In both
of these cases there is a high degree of parallelism, and instead of variables there are immutable
bindings between names and constant values.
Note that the term non von Neumann is usually reserved for machines that represent a radical departure
from the von Neumann model, and is therefore not normally applied to multiprocessor or multicomputer
architectures, which effectively offer a set of cooperating von Neumann machines.
dataflow machine A computer in which the primitive operations are triggered by the availability of inputs
or operands. In a classical von Neumann machine, there is the concept of sequential flow of control, and
an operation (i.e. instruction) is performed as and when flow of control reaches that operation. By
contrast, in a dataflow machine there is a flow of data values, from operations that produce those values
to operations that “consume” those values as operands. An operation is triggered as soon as all its
operands are available. Since the result of one operation can be an operand to many other operations,
and hence can potentially trigger many operations simultaneously, there is the possibility of a high degree
of parallelism.
reduction machine A machine that evaluates expressions by successively reducing all component
subexpressions until only simple terms representing data values remain. For each expression that is not a
simple data value, a set of rules define what should be substituted when that expression appears. The
machine operates by matching each subexpression of the expression currently being evaluated with its
appropriate rule, and substituting as specified by that rule. This process of expression substitution
continues until only simple data values remain, representing the value of the original expression.
All subexpressions can be matched and substituted concurrently, and thus there is the potential for a high
degree of parallelism. A major objective of reduction machines is to exploit this parallelism.
Reduction machines represent one of the major examples of non von Neumann architecture, and are of
considerable research interest. Traditional imperative programming languages are unsuited to reduction
machines, so declarative languages are employed.