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Lab 3 Pe Simulation

This document contains two tables that show the voltage and current characteristics of a transistor at two different gate-emitter voltages. The tables show that as the gate-emitter voltage increases from 6V to 7V, the drain current increases at each drain-source voltage point, with the highest increase occurring between a drain-source voltage of 2V.

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0% found this document useful (0 votes)
32 views1 page

Lab 3 Pe Simulation

This document contains two tables that show the voltage and current characteristics of a transistor at two different gate-emitter voltages. The tables show that as the gate-emitter voltage increases from 6V to 7V, the drain current increases at each drain-source voltage point, with the highest increase occurring between a drain-source voltage of 2V.

Uploaded by

ch
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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VGE=6V VGE=7V

Sr. No VCE IC Sr. No VCE IC


1 0 0 1 0 0
2 0.5 0.1 2 0.5 0.1
3 1 0.38 3 1 0.39
4 2 0.71 4 2 1.33
5 5 0.72 5 5 1.73
6 8 0.72 6 8 1.74
7 15 0.72 7 15 1.74

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