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This document outlines an assignment for a Computer Architecture course on multiprocessor and non-von Neumann architectures. It provides 4 sets of questions for students to choose from based on dividing their roll number by a given number. The questions cover topics like MISD, SIMD, MIMD, UMA, NUMA, and COMA processor architectures, multi-stage cube networks, matrix multiplication algorithms, dataflow computers, and multiprocessor coupling and memory types. The final set requires students to answer questions on parallelism determination, dataflow architecture objectives, inter-processor coordination differences, tightly and loosely coupled multiprocessors, and designing a delta network. The course aims to teach state-of-the-art multiprocessor

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SayanMaiti
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145 views2 pages

For K 0,1, ..... ..,9

This document outlines an assignment for a Computer Architecture course on multiprocessor and non-von Neumann architectures. It provides 4 sets of questions for students to choose from based on dividing their roll number by a given number. The questions cover topics like MISD, SIMD, MIMD, UMA, NUMA, and COMA processor architectures, multi-stage cube networks, matrix multiplication algorithms, dataflow computers, and multiprocessor coupling and memory types. The final set requires students to answer questions on parallelism determination, dataflow architecture objectives, inter-processor coordination differences, tightly and loosely coupled multiprocessors, and designing a delta network. The course aims to teach state-of-the-art multiprocessor

Uploaded by

SayanMaiti
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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4 Semester CSE Computer Architecture (CS403)


Assignment–03(Individual) [Multiprocessor and Non von Neumann architectures]
Last date of submission: 30/04/2019
NB:- Write the answers in your own way and do not copy from other

Set 1 (F.M.-5)
Divide your roll no. by 7(N%7), according to the remainder select the question

1) Draw and describe the architecture of MISD processor


2) Describe routing and data routing mechanism of SIMD processor
3) Draw and describe the architecture of MIMD processor
4) Draw and describe the architecture of UMA processor
5) Draw and describe the architecture of NUMA processor
6) Draw and describe the architecture of COMA processor
7) Draw and describe the architecture of SIMD processor

Set 2 (F.M.-5)
Divide your roll no. by 5(N%5), according to the remainder select the question

1) Draw and describe multi-stage cube network with n=8


2) Perform the operation to compute the following 10 summations using SIMD processor:
k
S(k) = ∑ A i ; for k = 0,1, ..... ..,9.
i=0

3) Write the sequential and parallel algorithm for matrix multiplication and its complexity
4) Draw and describe the mesh connected Illiac network for n=16
5) Describe the shuffle-exchange function and design and describe omega network for n= 8

Set 3 (F.M.-5)
Divide your roll no. by 6(N%6), according to the remainder select the question

1) Describe the function of data flow computer


2) Draw the data dependency graph
S1: X= SIN(Y) S2: Z= X + W S3: Y= ‒2.5 * W S4: X= cos(Z) S5:Store M(100), X
3) Describe the function of control flow computer
4) Draw the data dependency graph
S1: Load R1, 1024 S2: Load R2, M(10) S3: Add R1,R2 S4: Store M(1024), R1 S5: Store M(R2), 1024
5) Describe the function of demand driven computer
6) How many cycles require running the code using data flow computer. Add, multiply and division
takes 2, 3 and 4 cycles.
input d, e, f and C0 = 0
for i = 1 to 6
begin ai= di/ei;
bi=ai*fi;
ci=bi+ci‒1
end
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Set 4 (F.M.-15)
Write all answer [Mandatory for all]

1) Use Bernstein’s conditions for determining the maximum parallelism in the following sequence of
instructions: P1: A= B × C , P2: B = D + E, P3: C = A + B, P4: E = F ‒ D
2) What is the basic objective of data flow architecture? Compare it with control flow architectures and
data driven architecture.
3) What is a fundamental difference in inter-processor coordination mechanism between
multiprocessor.& multicomputer systems? Explain with reference to their architectural differences.
4) What do you mean by loosely coupled and tightly coupled multiprocessors? What is Dumb memory?
5) Design 22 ×32 Delta network.

Course outcome: Learn state of the art multiprocessor architectures, their design issues and methods to solve the
problems. Also learn the basics of some modern design trends.

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