Sana'a University

Faculty of Engineering
Electrical Dept

Aaref Abduh Al-Qjdami (230\2007).1

Hafedh Ebraheem Abu-Taleb .2
(545\2007)
Hamza Ali Mohammed Zaid Al-Houthi .3
(491\2006)
Saleh Mohammed Saad Hankal .4
(100\2006)
Experiment 1
1-RTL NOT Gate

1
1.1 The Goal of Experiment :
TO work NOT gate by using resistor and transistor elements .
To prove Truth table for NOT gate ,Where 5v = 1 (HIGH) & 0v
(or) 0.7 v = 0v (LOW).
This gates have one input and out .
In below their a truth table for NOT.

S Out

0 1
1 0

1.2 The Element of Experiment :

One Transistor (BC107) .
One Switch .
Voltmeter .
TWO resistors (1k , 10k ohm) .
Power supply +5 v .
Wires & links .

1.3 Resistive – Transistor Logic Gate:

Transistor logic is one of the simplest circuit techniques that can be
used to implement the NOT functions . Although of somewhat
limited utility , Transistor logic provides a simple introduction to
logic circuit implementation and can be used in circuit design to
logically combine several input signals .
- NOT gate
In this gate we connect +5 v directly to switch that is connect to
resistor 10 (kΩ) , and then connect in series with Transistor ,and
then connect resistore 1 (kΩ) in series with a collector terminal
for Trans. that is connect to +5 v when a emitter terminal connect
to ground (0 v) .

2
 CCV
V5
CCV

2R
Ωk1
2

1Q + 1U
1J 1R 999.4 M01 VCD W
3 1 -

Ωk01
PB701CB
ecapS = yeK

CCV
V5
CCV

2R
Ωk1
2

1Q + 1U
1J 1R 810.0 M01 VCD W
3 1 -

Ωk01
PB701CB
ecapS = yeK

Experiment 2
2-RTL OR & NOR Gate
2.1 The Goal of Experiment :
TO work OR and NOR gateS by using resistor and transistor
elements .
To prove Truth table for OR and NOR gates ,Where 5v = 1 (HIGH)
& 0v (or) 0.7 v = 0v (LOW).
This gates have three inputs and out .
In below their a truth table for OR and NOR .

3
OR – Truth table NOR - Truth table

S1 S2 S3 Out S1 S2 S3 Out
0 0 0 0 0 0 0 1
0 0 1 1 0 0 1 0
0 1 0 1 0 1 0 0
0 1 1 1 0 1 1 0
1 0 0 1 1 0 0 0
1 0 1 1 1 0 1 0
1 1 0 1 1 1 0 0
1 1 1 1 1 1 1 0

2.2 The Element of Experiment :

Two Transistor (BC107) .
Three Switch .
Voltmeter .
Six resistors (1k , 10k ohm) .
Power supply +5 v .
Wires & links .

2.3 Resistive – Transistor Logic Gate:

Transistor logic is one of the simplest circuit techniques that can be
used to implement the NOT functions . Although of somewhat
limited utility , Transistor logic provides a simple introduction to
logic circuit implementation and can be used in circuit design to
logically combine several input signals .
- OR gate
In this gate we connect +5 v directly to three switches that is
connect to resistor the base of Q1 through three resistors (10kΩ) ,
and then connect the collectorof Q1 to the base of Q2 through
resistor (10kΩ) and to VCC through resistor (1kΩ), and then
connect the collector of Q2 to VCC through resistor (1kΩ).

4
 VCC
5V
VCC
R5
1kΩ

R1 7
J1 1 R6
1kΩ Q1
10kΩ + U1
5 R4 6 4.999 V DC 10M W
Key = Space -

Q2 10kΩ
J2 R2 BC107BP
2 4
10kΩ
BC107BP
Key = Space 0
J3 3 R3
8
10kΩ
Key = Space

- NOR gate
The connection configuration is the same connection in OR
gate ,but the output is from Q1 and Q2 ignore .
VCC
5V
VCC
R5
1kΩ

J1 R1 R6 7
1
1kΩ Q1
10kΩ
5 R4 6
Key = Space
Q2 10kΩ
J2 R2 BC107BP
2 4
10kΩ
BC107BP
Key = Space + U10
J3 R3 4.609 V DC 10M W
3 -
8
10kΩ
Key = Space

2.3 Simulation of OR , NOR gate :

This simulation for OR , NOR gate by workbench WB .

5
 VCC
5V
VCC
R5
1kΩ

J1 R1 R6 7
1
1kΩ Q1
10kΩ
5 R4 6
Key = Space
Q2 10kΩ
J2 R2 BC107BP
2 4
10kΩ
BC107BP
Key = Space + U1
0
J3 R3 0.012 V DC 10M W
3 -
8
10kΩ

Key = Space

VCC
5V
VCC
R5
1kΩ

J1 R1 R6 7
1
1kΩ Q1
10kΩ
5 R4 6
Key = Space
Q2 10kΩ
J2 R2 BC107BP
2 4
10kΩ
BC107BP
Key = Space + U1
0
J3 R3 0.024 V DC 10M W
3 -
8
10kΩ
Key = Space

CCV
V5
CCV
5R
Ωk1
7
1J 1 1R 6R
Ωk1 1Q
Ωk01
5 4R 6 + 1U
ecapS = yeK 999.4 M01 VCD W
2Q Ωk01
-

2J 2R PB701CB
2 4
Ωk01
PB701CB
ecapS = yeK 0
3J 3 3R
8
Ωk01
ecapS = yeK

6
 CCV
V5
CCV
5R
Ωk1
7
1J 1 1R 6R
Ωk1 1Q
Ωk01
5 4R 6 + 1U
ecapS = yeK 999.4 M01 VCD W
-
2Q Ωk01
2J 2R PB701CB
2 4
Ωk01
PB701CB
ecapS = yeK 0
3J 3 3R
8
Ωk01
ecapS = yeK

Experiment 3
3-RDL OR & AND Gate
1.1 The Goal of Experiment :
TO work OR and AND gates by using resistor and Diode elements
.
To prove Truth table for OR and AND gates ,
Where 5v = 1 (HIGH) & 0v (or) 0.7 v = 0v (LOW)
This gates have 3 inputs S1,S2,S3 and out .
In below their 2 truth table for OR and AND .

OR – Truth table AND - Truth table

S1 S2 S3 Out S1 S2 S3 Out
0 0 0 0 0 0 0 0
0 0 1 1 0 0 1 0
0 1 0 1 0 1 0 0
0 1 1 1 0 1 1 0
1 0 0 1 1 0 0 0
1 0 1 1 1 0 1 0
1 1 0 1 1 1 0 0
1 1 1 1 1 1 1 1

7
1.2 The Element of Experiment :
Three Diodes DXX36
Three Switch
Voltmeter
One resistor 1k ohm
Power supply +5 v
Wires & links

1.3 Resistive – Diode Logic Gate:

Diode logic is one of the simplest circuit techniques that can be
used to implement the AND and OR functions . Although of
somewhat limited utility , diode logic provides a simple
introduction to logic circuit implementation and can be used in
circuit design to logically combine several input signals .
- OR gate
In this gate we connect +5 v directly to switch that is connect to
diodes , and then connect from the cathode diode's directly in series
with resistor 1kohm finally to ground (0 v) .

Figure 1 is show circuit for OR gate

VCC
5V

XMM1
J1 D1

Key = Space

J2 D2

Key = B

J3 D3

Key = A
R

Resistor1_1.0k

Figure 1

Theoretically if any input +5 v then output on voltmeter will be

4.4 v if diode have 0.6 v

8
 - AND gate
In this gate we connect +5 v to resistor and switch
And reverse diodes

Figure 2 is show AND gate circuit

VCC
5V

XMM1

J1 D1
R

Resistor1_1.0k
Key = Space

J2 D2

Key = B

J3 D3

Key = A

1.4
Simulation of OR
, AND gate :
This simulation for OR , AND gate by workbench WB ,

VCC
5V

XMM1

J1 D1
R

Resistor1_1.0k
Key = Space

J2 D2

VCC
5V
Key = B

J3 D3
R XMM1
J1 D1
Resistor1_1.0k
Key = A
Key = Space

J2 D2

Key = B

J3 D3

Key = A

9
 VCC
5V

XMM1
J1 D1

Key = Space

J2 D2

Key = B

J3 D3

R
Key = A

Resistor1_1.0k

VCC
5V

XMM1
J1 D1

Key = Space

J2 D2

Key = B

J3 D3

Key = A
R

Resistor1_1.0k

1.5 Conclusion of
Experiment :
Form this experiment we conclusion following:
1- This technical is simplest .
2- Resistor must be found because the diodes will turnoff (‫ ) تحترق‬if
R not found.
3- The output not necessary +5 v because the diodes have voltage
= 0.6 v (silicon ).

10
 4- The output depend on diode in all case .
5- RDL technical usually not used in applications that is required
cascaded from OR ,AND RDL,
because the voltage of cascaded diodes .

Experiment 4
4.1 DTL AND & NAND Gate
4.1.1 The Goal of Experiment :
TO work AND gates by using diodes and Transistor elements .
To prove Truth table for AND gates ,
Where 5v = 1 (HIGH) & 0v (or) 0.020 v = 0v (LOW).
This gates have 3 inputs S1,S2,S3 and out .
In below their truth table for AND .
AND – Truth table

S1 S2 S3 Out

0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 1

4.1.2 The Element of Experiment :

Two Transistor (BC107).
Three diodes.
Three Switch .
Voltmeter .
Two resistor (1okΩ) and two resistor(1kΩ).
Power supply +5 v .
Wires & links.

11
4.1.3 Diodes– Transistor Logic Gate:
Transistor logic is one of the circuit techniques that can be used to
implement the AND function. transistor logic provides to consist
logic circuit implementation and can be used in circuit design to
logically combine several input signals .
- AND Gate
In this gate we connect +5 v directly to three switchs that is
connect to the three diodes, and then connect to the base of Q1 ,and
then connect collector terminal to VCC through one kiloohm
resistor ,in the same time, collector terminal connect with the base
of Q2 through resistor 10kΩ, and then we connect collector
terminal to VCC supply through resistor(1kΩ).

VCC
5V

VCC

D1 R3 R6
J1 4
R1 1kΩ 1kΩ
1N1202C 10kΩ 6 R2 3
Key = Space Q1 10kΩ 7 Q2
D2 + U1
J2 1 2 4.999 V DC 10M W
-

1N1202C
BC107BP BC107BP
Key = Space

J3 D3
5

1N1202C
Key = Space
0

Figure 1 is show circuit for AND gate

4.1.4 Simulation of AND gate :

This simulation for AND gate by workbench WB ,

12
 VCC
5V

VCC

D1 R3 R6
J1 4
R1 1kΩ 1kΩ
1N1202C 10kΩ 6 R2 3
Key = Space Q1 10kΩ 7 Q2
D2 + U1
J2 1 2 0.020 V DC 10M W
-

1N1202C
BC107BP BC107BP
Key = Space

J3 D3
5
1N1202C
Key = Space
0

Figure 2
VCC
5V

VCC

D1 R3 R6
J1 4
R1 1kΩ 1kΩ
1N1202C 10kΩ 6 R2 3
Key = Space Q1 10kΩ 7 Q2
D2 + U1
J2 1 2 0.020 V DC 10M W
-

1N1202C
BC107BP BC107BP
Key = Space

J3 D3
5
1N1202C
Key = Space
0

Figure 3

13
 VCC
5V

VCC

D1 R3 R6
J1 4
R1 1kΩ 1kΩ
1N1202C 10kΩ 6 R2 3
Key = Space Q1 10kΩ 7 Q2
D2 + U1
J2 1 2 0.020 V DC 10M W
-

1N1202C
BC107BP BC107BP
Key = Space

J3 D3
5
1N1202C
Key = Space
0

Figure 4

4.2 DTL NAND Gates

4.2.1 The Goal of Experiment :
To work NAND Gates by Diode and Transistors.
To prove Truth table for NAND gates ,
Where 5v = 1 (HIGH) & 0v (or) 0.7 v = 0v (LOW)
This gates have 3 inputs S1,S2,S3 and out .
In below their 2 truth table for NAND.

NAND – Truth tabel

S1 S2 S3 Out
0 0 0 1
0 0 1 1
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 0

14
4.2.2 The Elements of Experiment :
Three Diodes DXX36
Two Transistors BC 107
Two resistors 1 kohm
One resistor 10 kohm
Three Switches
Voltmeter or mltimeter
Power supply +5 v
Wires & links
4.2.3 Diode – Transistor Logic Gates :
The level-restoration problem associated with diode logic can be solved
by adding a diode and transistor to form the diode- transistor logic DTL
gate shown schematically in Figure
The switch is A,B,C

- NAND Gate
This circuit the output is Z = A.B.C
VCC
Figure 3 5V

R3
R2
10k R
Resistor1_1.0k XMM1
Resistor1_1.0k
J1 D1
Q2
R1
10k
Key = A
J2 D2 BC107BP

Q1

Key = B
J3 D3
BC107BP

Key = C

15
4.3 Conclusion of Experiment :
This the technical is better than RDL .
This the technical required more size of RDL .

16
 Experiment 5
TTL NAND Gate
2.1The Goal of Experiment :
TO work NAND gates by using Transistors and Transistor
elements .
To prove Truth table for NAND gates ,
Where 5v = 1 (HIGH) & 0v (or) 1.531mv = 0v (LOW).
This gates have 3 inputs S1,S2,S3 and out .
In below their truth table for NAND .

2.2 The Element of Experiment :

Four Transistor (BC107).
Three Switch .
Voltmeter .
One resistor (1okΩ) and one resistor(4kΩ).
Power supply +5 v .
Wires & links.

NAND - Truth table

S1 S2 S3 Out

0 0 0 1
0 0 1 1
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 0
2.3 Transistore – Transistor Logic
Gate:
Transistor logic is one of the circuit techniques that can be
used to implement the NAND function. transistor logic

17
 provides to consist logic circuit implementation and can be
used in circuit design to logically combine several input signals
.

- AND Gate
In this gate we connect +5 v directly to three switches that is
connect to the three Transistors emitters , and then connect to
the bases of Q1 ,Q2 and Q3 to VCC supply through
resistor(10kΩ) ,whenever connect collectors terminals directly
to Q4 ; VCC connect through resistor(4k) to collector
terminal of Q4 .

VCC
5V
VCC
R1
10kΩ
J1
R2
1 4kΩ
3
Key = Space
J2 4
Q1 Q2 Q3 6
BC107BP BC107BP BC107BP
Q4
Key = Space + U1
2
1.531m V DC 10M W
-
J3 5 BC107BP

0
Key = Space

Figure 2

2.4 Simulation of AND gate :

This simulation for AND gate by workbench WB ,

18
 VCC
5V
VCC
R1
10kΩ
J1
R2
1 4kΩ
3
Key = Space
J2 4
Q1 Q2 Q3 6
BC107BP BC107BP BC107BP
Q4
Key = Space + U1
2
4.998 V DC 10M W
-
J3 5 BC107BP

0
Key = Space

VCC
5V
VCC
R1
10kΩ
J1
R2
1 4kΩ
3
Key = Space
J2 4
Q1 Q2 Q3 6
BC107BP BC107BP BC107BP
Q4
Key = Space + U1
2
4.998 V DC 10M W
-
J3 5 BC107BP

0
Key = Space

VCC
5V
VCC
R1
10kΩ
J1
R2
1 4kΩ
3
Key = Space
J2 4
Q1 Q2 Q3 6
BC107BP BC107BP BC107BP
Q4
Key = Space + U1
2
4.998 V DC 10M W
-
J3 5 BC107BP

0
Key = Space

The final Experiment

19
 The XOR Gate
1. The Goal of Experiment :
TO work XOR gate by using resistor and Diode elements .
To prove Truth table for XOR gate ,
Where 5v = 1 (HIGH) & 0v (or) 0.0.027 v = 0v (LOW) .
This gates have 2 inputs S1,S2 and out .
In below their truth table for XOR .

XOR _truth table

S1 S2 Out
0 0 0
0 1 1
1 0 1
1 1 0

2. The Element of Experiment :

Three Diodes BYX36 .
Two Switch .
Voltmeter .
Four Transistor BC107 .
11 Resistors (470Ω-1kΩ-2.2kΩ-4.7kΩ-10kΩ) .
Power supply +5 v .
Wires & links .

- XOR gate
In this gate we connect +5 v directly to two switches (J1,J2) that is
connect to the two bases of Q1 and Q2 through two
resistor(10kΩ), and then connect two collector of Q1and Q2 to
VCC through two resistor (10kΩ), and then the two cathodes of D1
and D3 to the collector of Q1and Q2 ,whenever connect the
cathode of D2 to J2 and the cathode of D4 to J1. The two anodes of
20
D1 and D2 connect to the base of Q3 through resistor (4.7kΩ) and
to VCC through resistor (2.2kΩ), and then connect the two anodes
of D3 and D4 to the base of Q3 through resistor (4.7kΩ) and to
VCC through resistor (2.2kΩ),and then connect the collector of Q3
to the base of Q4 through resistor (10kΩ) and to VCC through
resistor (470Ω), and then connect the collector of Q4 toVCC 5v
through resistor (2.2kΩ).
The emitters of Q1 ,Q2 ,Q3 and Q4 connect to the ground.

VCC
5V

VCC
R8 R12
R9 470Ω 2.2kΩ
R5 R6 2.2kΩ
1kΩ 1kΩ 11
D1
5
6
BYX10G 8 R10 R11 12 + U1
Q4 0.027 V DC 10M W
J1 R1 Q1 D2 4.7kΩ 10kΩ -
2 4 10 BC107BP
10kΩ BYX10G R7 Q3
BC107BP 2.2kΩ
Key = Space D3
7
BC107BP
J2 BYX10G 9 R13 0
Q2 D4
1 R2 3 4.7kΩ
10kΩ BYX10G
BC107BP
Key = Space

figure.1

21
 VCC
5V

VCC
R8 R12
R9 470Ω 2.2kΩ
R5 R6 2.2kΩ
1kΩ 1kΩ 11
D1
5
6
BYX10G 8 R10 R11 12 + U1
Q4 4.999 V DC 10M W
J1 R1 Q1 D2 4.7kΩ 10kΩ -
2 4 10 BC107BP
10kΩ BYX10G R7 Q3
BC107BP 2.2kΩ
Key = Space D3
7
BC107BP
J2 BYX10G 9 R13 0
Q2 D4
1 R2 3 4.7kΩ
10kΩ BYX10G
BC107BP
Key = Space

VCC
5V

VCC
R8 R12
R9 470Ω 2.2kΩ
R5 R6 2.2kΩ
1kΩ 1kΩ 11
D1
5
6
BYX10G 8 R10 R11 12 + U1
Q4 0.017 V DC 10M W
J1 R1 Q1 D2 4.7kΩ 10kΩ -
2 4 10 BC107BP
10kΩ BYX10G R7 Q3
BC107BP 2.2kΩ
Key = Space D3
7
BC107BP
J2 BYX10G 9 R13 0
Q2 D4
1 R2 3 4.7kΩ
10kΩ BYX10G
BC107BP
Key = Space

22
 VCC
5V

VCC
R8 R12
R9 470Ω 2.2kΩ
R5 R6 2.2kΩ
1kΩ 1kΩ 11
D1
5
6
BYX10G 8 R10 R11 12 + U1
Q4 4.999 V DC 10M W
J1 R1 Q1 D2 4.7kΩ 10kΩ -
2 4 10 BC107BP
10kΩ BYX10G R7 Q3
BC107BP 2.2kΩ
Key = Space D3
7
BC107BP
J2 BYX10G 9 R13 0
Q2 D4
1 R2 3 4.7kΩ
10kΩ BYX10G
BC107BP
Key = Space

23