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Information: Extract " " From The Code Binary Decoder

Decoders are used to extract information from a code. A 2-bit binary decoder can turn on one of four lamps based on the 2-bit binary input. A 2-to-4 line decoder maps a 2-bit binary input to 4 output lines. A 3-to-8 line decoder maps a 3-bit binary input to 8 output lines. Decoders can also have an enable control, where the decoder only decodes the input when the enable signal is high. An example Verilog module is given for a 2-to-4 line decoder with enable control.

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Abdul Rehman
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39 views6 pages

Information: Extract " " From The Code Binary Decoder

Decoders are used to extract information from a code. A 2-bit binary decoder can turn on one of four lamps based on the 2-bit binary input. A 2-to-4 line decoder maps a 2-bit binary input to 4 output lines. A 3-to-8 line decoder maps a 3-bit binary input to 8 output lines. Decoders can also have an enable control, where the decoder only decodes the input when the enable signal is high. An example Verilog module is given for a 2-to-4 line decoder with enable control.

Uploaded by

Abdul Rehman
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Decoders

Extract “Information” from the code Only one


lamp will
Binary Decoder turn on
● Example: 2-bit Binary Number

0 1
x1 0
Binary
x0 0 Decoder 0
0

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Decoders

2-to-4 Line Decoder


Y3

y3 Y2

Decoder
I1 Binary
y2
y1 Y1
I0 y0
Y0

I1 I0 Y3 Y2 Y1 Y0
I1
0 0 0 0 0 1 I0
0 1 0 0 1 0
Y3 = I1 I 0 Y2 = I1 I 0
1 0 0 1 0 0
1 1 1 0 0 0 Y1 = I1 I 0 Y0 = I1 I 0
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Decoders

3-to-8 Line Decoder Y7 = I 2 I1 I 0

Y6 = I 2 I1 I 0
Y7 Y5 = I 2 I1 I 0
Y6
Y5 Y4 = I 2 I1 I 0
Decoder
Binary

I2 Y4 Y3 = I 2 I1 I 0
I1 Y3
I0 Y2 Y2 = I 2 I1 I 0
Y1 Y1 = I 2 I1 I 0
Y0
Y0 = I 2 I1 I 0

I2
I1
I0
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Decoders

“Enable” Control Y3

Y3

Decoder
I1 Y2
Binary Y2
I0 Y1
E Y1
Y0
Y0
E I1 I 0 Y3 Y2 Y1 Y0
0 x x 0 0 0 0
I1
1 0 0 0 0 0 1 I0
E
1 0 1 0 0 1 0
1 1 0 0 1 0 0
1 1 1 1 0 0 0
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Y3
module dec2_4 (I0,I1,e,y0,y1,y2,y3)
Y2 input I0, I1, e;
output y0,y1,y2,y3;
Y1 assign y0= (~I0) & (~I1) & e;
assign y1= (~I0) & I1 & e;
Y0
assign y2= I0 & (~ I1) & e;
assign y3= I0 & I1 & e;
I1 end module
I0
E

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