Transfer Function
Transfer Function
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Abstract-The snecific circuit effects in the phase-shifted 11. OPERATION OF THE PS-PWM CONVERTER
pulse-width-modulated(PS-PWM) converter and their impact
on the converter dynamics are analyzed. The small-signal model To achieve ZVS, the two legs of the bridge are operated
is derived incorporating the effects of phase-shift control and with a phase shift. This operation allows a resonant dis-
the utilization of transformer leakage inductance and power charge of the output capacitances of the MOSFET’s, and
FET junction capacitances to achieve zero-voltage resonant subsequently, forces the conduction of each MOSFET’s
switching. The paper explains the differences in the dynamic antiparallel diode prior to the conduction of the MOS-
characteristics of the PS-PWM converter and its PWM coun-
terpart. Model predictions are confirmed by experimental mea- FET. Because the operation of the circuit has been de-
surements. scribed in detail [ l]-[5],only the circuit operation is em-
phasized, which is significant for development of the
I. INTRODUCTION small-signal model. Fig. 1 shows the converter topology
and the waveforms for the current Z and voltage VABin the
I N recent years, the phase-shifted pulse-width-modu-
lated (PS-PWM) converter has found many applications
due to its distinct characteristics [1]-[4].This topology
primary and the voltage across the secondary of the power
transformer V,. In examining these waveforms, it should
permits all switching devices to operate under zero-volt- be noted that the leakage inductance Llk does not have to
age switching (ZVS) by using circuit parasitics such as be minimized for the proper operation of the converter.
leakage inductance and power FET junction capacitance In fact, the load range at which the converter operates
to achieve resonant switching. The ZVS allows operation with ZVS increases with the leakage inductance. How-
with much reduced switching losses and stresses, and ever, the large leakage inductance dictates the slope of the
eliminates the need for primary snubbers. It enables high current when voltage is applied to the primary (t2 or t 6 ) .
switching frequency operation for improved power den- This finite slope reduces the duty cycle of the secondary
sity with good cqnversion efficiency. The circuit appears voltage DeKand has a significant impact on the dynamic
similar to a conventional PWM buck topology, but its characteristics of the converter.
small-signal prqperties are significantly different from The duty cycle of the secondary voltage can be ex-
those of the PWW buck converter’s. This is due to the pressed as
phase-shift operatipn and the presence of a large leakage
inductance in the p&mary of the transformer.
In this paper, the small-signal analysis of the PS-PWM
converter is performed by modeling the effects introduced where D is the duty cycle of the primary voltage set by
the control, and A D is the loss of duty cycle due to the
by the phase-shift operation and the use of the transformer
finite slope of the rising and falling edges of the primary
leakage inductance to resonate with the junction capaci-
tances of the power FET’s to achieve ZVS. A new small- current. Examining Fig. 1, A D can be expressed as [5]
signal model is developed by ’modifying the small-signal
circuit model of its P W Y counterpart [6].The transfer
functions df the power stage are compared to the corre-
sponding transfer functions of its PWM counterpart to Llk
show the significant differences between them. Experi-
mental results are presented to verify the accuracy of the
model.
Manuscript received July 6, 1990; revised February 14, 1991. This work
was supported by the International Business Machines Co., Kingston NY
12401, and by the Virginia Center for Innovative Technology, Technology where n is the transformer turns ratio, n = N s / N p , Vi, and
Development Center for Power Electronics. VOutare input and output voltages, respectively, T, is the
The authors are with the Bradley Department of Electrical Engineering,
Virginia Polytechnic Institute and State University, Blacksburg, VA 24061. switching period, Z, is the output filter inductor current,
IEEE Log Number 9105013. and L is the output filter inductance.
D2
IV. SPECIFICCIRCUIT EFFECTS
A. Duty Cycle Modulation Due to the Change of the
Llk
Filter Inductor Current
Fig. 2 illustrates the effect of duty cycle modulation
due to the change of the filter inductor current. When the
steady-state operation (solid lines) is perturbed by an in-
L crease of the filter inductor current by the amount iL, the
primary current will follow the dashed line and reach the
reflected filter inductor current at a later time than it would
in the steady-state operation. This will cause a reduction
of the duty cycle of U,.
The additional delay in increase of the secondary volt-
age due to iL can be calculated using Fig. 3 as follows:
* Llk
At = 2niL - (4)
Vi,
The change of de, due to this effect, denoted as di,is
Deff (Tsn)
/
or
or
I
Fig. 2. Duty cycle modulation due to the change of filter inductor current. V. SMALL-SIGNAL MODEL
The results of the previous analysis can now be incor-
porated into the averaged small-signal circuit model of the
PWM buck converter. This can be done by replacing d in
the buck converter model (Fig. 4 ) by the total change of
deff,which is
Jeff= d + di + d,. (13)
The Few model is shown in Fig. 5. The contribution of
diand d, is represented by two controlled sources and the
contribution of d by tw? independent sources. This is to
ai
emphasize that and d, originate from the circuit itself
(i.e., perturbations of iL and vi") and are not controlled
by the control circuit. Close examination of (5) and (10)
shows that the circuit model of the buck converter is a
special case of the PS-PWM converter model. This can
be concluded by making Llk = 0, which gives di = a,,=
0. Transfer functions of the PS-PWM power stage can
now be derived using the new model and (6) and (l?.
For simplicity, the following derivations use (12) for d,.
I I STAGE
In this section expressions for the transfer functions of
the power stage are given that can be easily incorporated
Fig. 3. Duty cycle modulation due to the change of input voltage. into mathematical programs such as MathCAD or cc to
facilitate the control circuit design. These transfer func-
tions are compared to the corresponding transfer functions
Under a small-signal assumption, this becomes: of the PWM buck converter having the same circuit ele-
’U
1 : Deff
Fig. 4. Small-signal circuit model of the buck converter.
.
.I
Frequency (kHz)
nVmd nVi,(di+d,,)
L
rrm
1 : Deff
Fig. 5 . Small-signal circuit model of the PS-PWM converter.
Zf
G,,d = H , n V i n ___
Zf + Rd‘
Fig. 6 shows the control-to-output transfer functions of where is the damping of the second-order denominator:
the PWM buck converter (dashed lines) and of the PS-
r- r
PWM converter (solid lines). The differences between the
transfer functions in dc gain and resonant peaking are ap-
parent.
To gain insight on how the transformer leakage influ-
ences the power stage transfer function, the expressions The first term of 4 is the damping in the regular buck
for Zf and H, can be substituted into (17): converter. The use of leakage inductance introduces ad-
ditional damping, and the second term of can become
dominant. Fig. 7 shows the family of control-to-output
transfer functions of the PS-PWM power stage as the ratio
R d / R varies from 0 to 0.5. The damping of the system is
noticeably affected even for very small values of R d / R .
132 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 7, NO. I , JANUARY 1992
I I I I I I
I 1 I
1 IO 100
%!I Frequency (kHz)
Frequency (kHz)
Frequency (kHz)
Fig. 8. Control-to-filter inductor current transfer functions of the buck
Fig. 7 . Control-to-output transfer functions for different values of R d / R . (dashed lines) and PS-PWM converters (solid lines).
40
B. Control-to-Filter Inductor Current Transfer Function
The control-to-filter inductor current transfer function 30
is 20
&j
s
s.z 10
9 0
Fig. 8 shows the control-to-filter inductor current trans-
-10
fer functions of the PWM buck converter (dashed lines)
and of the PS-PWM converter (solid lines). The control- -20
0.1 1 IO 100
to-filter inductor current transfer function is altered in the Frequency (kHz)
C. Output Impedance
The output impedance of the PS-PWM power stage is
H:
2, = 2, + ~
(23)
-+- 1'
1
zf Rd
50
s40 -
0 , .
230 '\
, ,' . _ -Buck
_
$ 1
@20 I '
$ 1
1'
-PS-PWM
10 .
I I I
1 10 100
%.'I Frequency (kHz)
Fig. 10. Audio susceptibilities of the buck (dashed lines), and PS-PWM Fig. 1 1 . Input impedance of the buck (dashed lines) and PS-PWM con-
converters (solid lines). verters (solid lines).
z. =
+ Rd 30 I I I I
(25)
In n*D;ff(1 +
Fig. 11 shows the input impedances of the PWM buck
converter (dashed lines) and the PS-PWM converter (solid
lines). As discussed in Section VI-D, the modulation of \.
-150
duty cycle due to the variation of input voltage affects the
input impedance only at high frequencies. -180 V
I I 1
-218.'1 1 10 100
Frequency (kHz)
V I I . EXPERIMENTAL VERIFICATION
Fig. 12. Control-to-output voltage transfer function of the PS-PWM con-
To verify the results of the analysis, a converter was verter. Model prediction (dashed lines) and experimental measurement
built with the same component values as shown in Section (solid lines).
VI. The only difference is that in order to achieve better
measurement accuracy, the input voltage, the output volt-
age, and the load resistance have been reduced to 50 V, ductor current transfer function. The agreement between
20 V, and, 50 Q,respectively. prediction and measurement is again very good. Fig. 14
The control-to-output transfer function is shown in Fig. shows the output impedance of the converter. The mea-
12. Both the gain and phase measurements agree very well surement clearly shows the first order response and loss
with predictions. Fig. 13 shows the control-to-filter in- of resonant peaking, predicted by analysis.
I34 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. I, NO. 1, JANUARY 1992
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[5] J. A. SabatC, V. VlatkoviC, R. B. Ridley, F. C. Lee, and B. H. Cho,
“Design considerations for high-voltage high-power full-bridge zero-
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0
Raymond B. Ridley received the B.S. degree additional patents pending. During his career he has published over 70 re-
from Boston University, Boston, MA, and the ferred journal papers, more than 130 technical papers in national and in-
M.S. and Ph.D. degree in electncal engineering ternatlonal conferences, and over 80 industry and government reports. He
from Virginia Polytechnic Institute and State Uni- is a member of the AdCom of IEEE Power Electronics Society, and As-
versity, in 1981, 1986, and 1990, respectively. sociate Editor of the IEEE TRANSACTIONS ON POWER ELECTRONICS. He was
From 1981 to 1984 he was employed as a Se- chairman of the 1987 IEEE Power Electronlcs Specialists Conference.
nior Engineer In the Power Systems Group at Dr. Lee received the Society of Automotive Engineenng 1985 Ralph R.
Prime Computer, where he worked on the design Teeter Educational Award, the IEEE Power Electronics Society’s 1989
and analysis of computer power supplies. He is William E. Newel1 Power Electronics Award, the PCIM Award in Lead-
presently the Assistant Director of the Virginla ership in Power Electronics Education, and the 1990 Alumni Award for
Power Electronics Center at VPI&SU. His re- Research Excellence from VPI&SU.
search interests include power converter control and analysis, high-fre-
quency converters, and computer-aided design for power systems.