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    Samatha.S: Design Engineer Volvo Kynasys Technologies Mobile: +91-8074043442

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    aravi173
    This document contains the resume of Samatha.S, including her contact information, educational background, work experience, projects, and personal details. She has a Master's degree in embedded systems and VLSI and over 3 years of experience designing FPGA, microprocessor, and microcontroller boards. Her responsibilities have included requirements gathering, circuit design, simulation, component selection, schematic capture, PCB layout, documentation, testing, and customer delivery. She has worked on projects for organizations such as DRDO and Volvo.

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    Samatha.S: Design Engineer Volvo Kynasys Technologies Mobile: +91-8074043442

    Uploaded by

    aravi173
    72 views4 pages
    This document contains the resume of Samatha.S, including her contact information, educational background, work experience, projects, and personal details. She has a Master's degree in embedded systems and VLSI and over 3 years of experience designing FPGA, microprocessor, and microcontroller boards. Her responsibilities have included requirements gathering, circuit design, simulation, component selection, schematic capture, PCB layout, documentation, testing, and customer delivery. She has worked on projects for organizations such as DRDO and Volvo.

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    This document contains the resume of Samatha.S, including her contact information, educational background, work experience, projects, and personal details. She has a Master's degree in embedded systems and VLSI and over 3 years of experience designing FPGA, microprocessor, and microcontroller boards. Her responsibilities have included requirements gathering, circuit design, simulation, component selection, schematic capture, PCB layout, documentation, testing, and customer delivery. She has worked on projects for organizations such as DRDO and Volvo.

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
    72 views4 pages

    Samatha.S: Design Engineer Volvo Kynasys Technologies Mobile: +91-8074043442

    Uploaded by

    aravi173
    This document contains the resume of Samatha.S, including her contact information, educational background, work experience, projects, and personal details. She has a Master's degree in embedded systems and VLSI and over 3 years of experience designing FPGA, microprocessor, and microcontroller boards. Her responsibilities have included requirements gathering, circuit design, simulation, component selection, schematic capture, PCB layout, documentation, testing, and customer delivery. She has worked on projects for organizations such as DRDO and Volvo.

    Copyright:

    © All Rights Reserved
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    Download as docx, pdf, or txt
    of 4

    SAMATHA.

    S
    Design Engineer
    Volvo
    KYNASYS TECHNOLOGIES
    [email protected]
    Mobile: +91-8074043442

    Looking forward to work in an organization that offers challenging opportunities and provides innovative
    work, growth and wide exposure to the latest technologies and demands the best of my professional
    abilities technical and analytical skills.
    Academic Details
     Master of Technology in embedded &VLSI.
     Bachelor of Technology (Electronics & Communication Engineering) from JNTU HYDERABAD
     Intermediate from SRI CHAITANYA COLLEGE
     Matriculation (HSC) from ST. MARYS HIGH SCHOOL.
    Professional Expertise:
     3 years of Experience in designing and testing of FPGA, Microprocessor and Microcontroller
    based boards, Network switches.
     Good analytical and problem solving skills.
     Experience in complete life cycle of a project like Requirement capture, Circuit design, Circuit
    Simulation, Component selection, Schematic capture, PCB placement, Documents Preparation,
    Board Bring-up, Unit test setup, integration of the boards at customer place and Customer
    delivery.
     Actively worked with following interfaces: DDR4, DDR3, DDR2, SRAM, 10/100/1000Mbps
    Ethernet, EEPROM, FLASH, RS422, RS232, SPI, SRIO, I2C, voltage and Temperature Monitors and
    optical modules (SFPs),WiFi modules, Bluetooth modules.
     Participated in Environmental testing like ESS and EMI/EMC and issues which may come during
    these phases.
     Good Knowledge in tools like OrCAD Capture CIS for Schematic Entry, Cadence Allegro viewer for
    PCB Design Review.
     Good communication skills with accent on constructive teamwork.

    Employment Details:
     DRDO (July 2013 to July 2016): My responsibilities were to design FPGA and processor based
    boards with different interfaces.
     KYNASYS TECHNOLOGIES (sep 2017 to Till date): My responsibilities were to design processor
    based board with camera sensor, audio codec, video codec etc.

     Volvo : worked for automotive projects . As a component owner worked for component level
    design validation , technical requirements . Supplier meetings .

    Project Experiences:
     Paper design for relay scheme in relay card.
     Device selections and Schematic entry

    PROJECT #1

    TITLE : SOC-OBC
    ROLE : SCHEMATIC ENTRY AND PCB DESIGNING
    SOFTWARE : CADENCE ALLEGRO 16.3
    ORGANIZATION : RCI, HYD
    DURATION : NOV 2014-MARCH 2014
    NO. OF LAYERS : 12 LAYERS
    INTERFACES IN PCB : SOC, SPARTAN-6, SRAM, FLASH, ADC, DAC, MUX, RS 232, RS482, DIPS, DOPS,
    CLK CIRCUITE, POWER DISTRIBUTION, FLEX DESIGN,

    OBC is a ruggedized real-time embedded computer system designed to perform guidance, control and mission
    sequencing. It is a two module system based on Intel 80486DX2 microprocessor with four nodes of MIL STD 1553B
    realized using four BU–61688 P3-110 devices configurable as BC/RT/MT.

    OBC performs missile health checks based on command from the Launch Computer through 1553 bus.
    After liftoff OBC becomes bus controller, performing in flight mission sequencing events and control & guidance.

    Responsibilities:
     Paper Design for power supply module, FPGA bank distribution, Inter board signal distribution
    on backplane
     Device selections and Schematic entry
     Placement of the components during PCB
     Board Bring up, Debugging, Testing,
     Environmental Testing : ESS,EMI/EMC.

    Project #2:
    Description: ETHERNET CONTROLLER:
     Paper Design for power supply module, FPGA bank distribution
     Device selections and Schematic entry
     Placement of the components during PCB
     Board Bring up, Debugging, Testing,
     Environmental Testing : ESS,EMI/EMC.

    Project #3: Connector Aligner


    Description: Connector Aligner is a PIC microcontroller based card .
    Responsibilities:
     Paper Design for power supply module
     Device selections and Schematics entry
     Placement of the components during PCB
     Board Bring up, Debugging and Testing
     Environmental testing like ESS.

    PROJECT #4: : : MLP Missile Launch Processor

    Project Title : MLP (Missile Launch Processor)


    ORGANIZATION : RCI , HYD
    Role : SCHEMATIC Entry AND PCB Designing
    Software : CADENCE ALLEGRO 16.5
    Number of Layers : 12
    Interfaces in PCB : FLASH- 16 NO’S, VIDEO AMPLIFIERS, VERTEX-4,
    VPX CONNECTORS, ADC, DAC, MUX, RS232, VIDEO INPUTS AND BUFFERS

    Project Description:
    The MLP is the front end processor of the Astra launcher based on Intel 80386/387
    microprocessor. It is provided with two 1553 channels, 25 ADC channels, 25 discrete inputs and 24
    discrete outputs. It is interfaced to OBC through MIL-STD-1553 P1 bus. It communicates with launch
    computer through MIL-STD-1553 P2 bus. It performs pre-launch checks of the missile, auto-launch
    sequencing of the missile.

    Responsibilities:
     Paper Design for power supply module
     Device selections and Schematics entry
     Placement of the components during PCB
     Board Bring up, Debugging and Testing
     Environmental testing like ESS.

    Project #5: GPRS_GATEWAY


    Description: This project is for collecting current reading from electrical metre and sending
    through gsm/gps to electrical department.
    Responsibilities:
     Board Bring up, Debugging and Testing
     I have done these projects independently, in team work , I worked on more 5 designs.

    Personal Details
    Full Name : SAMATHA
    Date of BIRTH : 25 JULY 1989
    Father's Name : S.RAMA MOHAN
    RAO Nationality : Indian
    Languages : English, Hindi, TELUGU
    Declaration: I hereby declare that the statements made above are true, complete and correct to the
    best of my knowledge and belief.

    Samatha.S

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