®

RT6575C/D

Dual-Channel Synchronous DC/DC Step-Down Controller

with 5V/3.3V LDOs
General Description Features
The RT6575C/D is a dual-channel step-down controller  Support Connected Standby Mode for Ultrabook
generating supply voltages for battery-powered systems.  CCRCOT Control with 100ns Load Step Response
It includes two Pulse-Width Modulation (PWM) controllers  PWM Maximum Duty Ratio > 98%
adjustable from 2V to 5.5V, and two fixed 5V/3.3V linear  5V to 25V Input Voltage Range
regulators. Each linear regulator provides up to 100mA  Dual Adjustable Output :
 CH1 : 2V to 5.5V
output current and 3.3V linear regulator provides 1%
 CH2 : 2V to 4V
accuracy under 35mA. The RT6575C/D has an oscillator
output to drive the external charge pump application. Other  5V/3.3V LDOs with 100mA Output Current
features include on-board power-up sequencing, a power-  1% Accuracy on 3.3V LDO Output
good output, internal soft-start, and soft-discharge output  Oscillator Driving Output for Charge Pump
that prevents negative voltage during shutdown. Application
 Support Audio-Skipping Mode (ASM)
A constant current ripple PWM control scheme operates
 Internal Frequency Setting
without sense resistors and provides 100ns response to
 300kHz/355kHz (CH1/CH2)
load transient. For maximizing power efficiency, the
 Internal Soft-Start and Soft-Discharge
RT6575C/D automatically switches to the diode-emulation
 4700ppm/°°C RDS(ON) Current Sensing
mode in light load applications. To eliminate noise in audio
 Independent Switcher Enable Control
applications, an audio-skipping mode is included, which
 Built-in OVP/UVP/OCP/OTP
maintains the switching frequency above 25kHz. The
 Non-Latch UVLO
RT6575C/D is available in the WQFN-20L 3x3 package.
 Power Good Indicator

Simplified Application Circuit

VIN

VIN UGATE2
RT6575C/D
BOOT2
UGATE1
PHASE2 VOUT2
BOOT1
LGATE2
VOUT1 PHASE1

LGATE1 FB2
CS1

BYP1 CS2

LDO5 5V
FB1

Channel 1 Enable EN1

PGOOD PGOOD Indicator
Channel 2 Enable EN2
LDO3 3.3V
VCLK
GND

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RT6575C/D
Applications Marking Information
 Notebook and Sub-Notebook Computers RT6575CGQW
5Y= : Product Code
 System Power Supplies
 2-Cell to 4-Cell Li+ Battery-Powered Devices 5Y=YM YMDNN : Date Code
DNN

Ordering Information
RT6575C/D
RT6575DGQW
Pin 1 Orientation*** 5X= : Product Code
(2) : Quadrant 2, Follow EIA-481-D 5X=YM YMDNN : Date Code

Package Type DNN

QW : WQFN-20L 3x3 (W-Type)
Lead Plating System
G : Green (Halogen Free and Pb Free)
Pin Function With
Pin Configurations
C : LDO3 Always On (TOP VIEW)

UGATE1
PHASE1
D : LDO3/LDO5 Always On

BOOT1
VCLK
EN1
Note :
***Empty means Pin1 orientation is Quadrant 1 20 19 18 17 16

Richtek products are : CS1 1 15 LGATE1

FB1 2 14 BYP1
 RoHS compliant and compatible with the current require- LDO3 3 GND 13 LDO5
ments of IPC/JEDEC J-STD-020. FB2 4 21 12 VIN
CS2 5 11 LGATE2
 Suitable for use in SnPb or Pb-free soldering processes. 6 7 8 9 10
EN2

PHASE2
BOOT2
UGATE2
PGOOD

WQFN-20L 3x3

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 RT6575C/D
Functional Pin Description
Pin No. Pin Name Pin Function
Current Limit Setting. Connect a resistor to GND to set the threshold for Channel 1
synchronous RDS(ON) sense. The GND  PHASE1 current limit threshold is 1/8th
1 CS1
the voltage seen at CS1 over a 0.2V to 2V range. There is an internal 10A
current source from LDO5 to CS1.
Feedback Voltage Input for Channel 1. Connect FB1 to a resistive voltage divider
2 FB1
from VOUT1 to GND to adjust output from 2V to 5.5V.
3.3V Linear Regulator Output. It is always on when VIN is higher than VINPOR
3 LDO3
threshold.
Feedback Voltage Input for Channel 2. Connect FB2 to a resistive voltage divider
4 FB2
from VOUT2 to GND to adjust output from 2V to 4V.
Current Limit Setting. Connect a resistor to GND to set the threshold for Channel 2
synchronous RDS(ON) sense. The GND  PHASE2 current limit threshold is 1/8th
5 CS2
the voltage seen at CS2 over a 0.2V to 2V range. There is an internal 10A
current source from LDO5 to CS2.
6 EN2 Enable Control Input for Channel 2.
7 PGOOD Power Good Indicator Output for Channel 1 and Channel 2. (Logical AND)
Switch Node of Channel 2 MOSFETs. PHASE2 is the internal lower supply rail for
8 PHASE2 the UGATE2 high-side gate driver. PHASE2 is also the current-sense input for the
Channel 2.
Bootstrap Supply for Channel 2 High-Side Gate Driver. Connect to an external
9 BOOT2
capacitor according to the typical application circuits.
High-Side Gate Driver Output for Channel 2. UGATE2 swings between PHASE2
10 UGATE2
and BOOT2.
Low-Side Gate Driver Output for Channel 2. LGATE2 swings between GND and
11 LGATE2
LDO5.
12 VIN Power Input for 5V and 3.3V LDO Regulators and Buck Controllers.
5V Linear Regulator Output. LDO5 is also the supply voltage for the low-side
13 LDO5
MOSFET and analog supply voltage for the device.
14 BYP1 Switch-over Source Voltage Input for LDO5.
Low-Side Gate Driver Output for Channel 1. LGATE1 swings between GND and
15 LGATE1
LDO5.
High-Side Gate Driver Output for Channel 1. UGATE1 swings between PHASE1
16 UGATE1
and BOOT1.
Bootstrap Supply for Channel 1 High-Side Gate Driver. Connect to an external
17 BOOT1
capacitor according to the typical application circuits.
Switch Node of Channel 1 MOSFETs. PHASE1 is the internal lower supply rail for
18 PHASE1 the UGATE1 high-side gate driver. PHASE1 is also the current sense input for the
Channel 1.
19 VCLK Oscillator Output for Charge Pump.
20 EN1 Enable Control Input for Channel 1.
21 Ground. The exposed pad must be soldered to a large PCB and connected to
GND
(Exposed Pad) GND for maximum power dissipation.

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RT6575C/D
Functional Block Diagram

BOOT1 BOOT2

UGATE1 UGATE2

PHASE1 PHASE2
LDO5 LDO5
Channel 1 Channel 2
Buck Buck
Controller Controller
LGATE1 LGATE2

FB1 FB2
CS1 CS2
BYP1
PGOOD
VCLK OSC

GND
SW5 Threshold
BYP1 Power-On EN1
Sequence
Clear Fault Latch EN2

LDO5 REF LDO3 LDO3

LDO5 BYP1
VIN

Operation
The RT6575C/D includes two constant on-time PGOOD
synchronous step-down controllers and two linear The power good output is an open-drain architecture. When
regulators. the two channels soft-start are both finished, the PGOOD
open-drain output will be high impedance.
Buck Controller
In normal operation, the high-side N-MOSFET is turned Current Limit
on when the output is lower than VREF, and is turned off The current limit circuit employs a unique “valley” current
after the internal one-shot timer expires. While the high- sensing algorithm. If the magnitude of the current sense
side N-MOSFET is turned off, the low-side N-MOSFET is signal at PHASE is above the current limit threshold, the
turned on to conduct the inductor current until next cycle PWM is not allowed to initiate a new cycle. Thus, the
begins. current to the load exceeds the average output inductor
current, the output voltage falls and eventually crosses
Soft-Start
the under-voltage protection threshold, inducing IC
For internal soft-start function, an internal current source shutdown.
charges an internal capacitor to build the soft-start ramp
voltage. The output voltage will track the internal ramp
voltage during soft-start interval.

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 RT6575C/D
Over-Voltage Protection (OVP) & Under-Voltage
Protection (UVP)
The two channel output voltages are continuously
monitored for over-voltage and under-voltage conditions.
When the output voltage exceeds over-voltage threshold
(113% of VOUT), UGATE goes low and LGATE is forced
high. When it is less than 52% of reference voltage, under-
voltage protection is triggered and then both UGATE and
LGATE gate drivers are forced low. The controller is latched
until ENx is reset or LDO5 is re-supplied.

LDO5 and LDO3

When the VIN voltage exceeds the POR rising threshold,
LDO3 will default turn-on. The LDO5 can be power on by
ENx. The linear regulator LDO5 and LDO3 provide 5V and
3.3V regulated output.

Switching Over
The BYP1 is connected to the Channel 1 output. After the
Channel 1 output voltage exceeds the set threshold
(4.66V), the output will be bypassed to the LDO5 output
to maximize the efficiency.

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RT6575C/D
Absolute Maximum Ratings (Note 1)
 VIN to GND ----------------------------------------------------------------------------------------------------------------- −0.3V to 30V
 BOOTx to GND
DC ---------------------------------------------------------------------------------------------------------------------------- −0.3V to 36V
<100ns ---------------------------------------------------------------------------------------------------------------------- −5V to 42V
 BOOTx to PHASEx
DC ---------------------------------------------------------------------------------------------------------------------------- −0.3V to 6V
<100ns ---------------------------------------------------------------------------------------------------------------------- −5V to 7.5V
 PHASEx to GND
DC ---------------------------------------------------------------------------------------------------------------------------- −5V to 30V
<100ns ---------------------------------------------------------------------------------------------------------------------- −10V to 42V
 UGATEx to GND
DC ---------------------------------------------------------------------------------------------------------------------------- −5V to 36V
<100ns ---------------------------------------------------------------------------------------------------------------------- −10V to 42V
 UGATEx to PHASEx
DC ---------------------------------------------------------------------------------------------------------------------------- −0.3V to 6V
<100ns ---------------------------------------------------------------------------------------------------------------------- −5V to 7.5V
 LGATEx to GND
DC ---------------------------------------------------------------------------------------------------------------------------- −0.3V to 6V
<100ns ---------------------------------------------------------------------------------------------------------------------- −5V to 7.5V
 Other Pins ------------------------------------------------------------------------------------------------------------------ −0.3V to 6.5V
 Power Dissipation, PD @ TA = 25°C
WQFN-20L 3x3 ----------------------------------------------------------------------------------------------------------- 3.33W
 Package Thermal Resistance (Note 2)
WQFN-20L 3x3, θJA ------------------------------------------------------------------------------------------------------ 30°C/W
WQFN-20L 3x3, θJC ----------------------------------------------------------------------------------------------------- 7.5°C/W
 Junction Temperature ---------------------------------------------------------------------------------------------------- 150°C
 Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------ 260°C
 Storage Temperature Range ------------------------------------------------------------------------------------------- −65°C to 150°C
 ESD Susceptibility (Note 3)
HBM (Human Body Model) --------------------------------------------------------------------------------------------- 2kV

Recommended Operating Conditions (Note 4)

 Supply Voltage, VIN ----------------------------------------------------------------------------------------------------- 5V to 25V
 Junction Temperature Range ------------------------------------------------------------------------------------------- −40°C to 125°C
 Ambient Temperature Range ------------------------------------------------------------------------------------------- −40°C to 85°C

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 RT6575C/D
Electrical Characteristics
(VIN = 12V, VEN1 = VEN2 = 3.3V, VCS1 = VCS2 = 2V, No Load, TA = 25°C, unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
Input Supply
Rising Threshold -- 4.6 4.9
VIN Power-On Reset VINPOR V
Falling Threshold 3.2 3.7 --
RT6575C Both Buck Controllers
-- 60 80
Off, VEN1 = VEN2 = GND
VIN Standby Supply Current IVIN_SBY A
RT6575D Both Buck Controllers
-- 80 100
Off, VEN1 = VEN2 = GND
Both Buck Controllers On,
VIN Quiescent Current IVIN_nosw -- 15 25 A
VFBx = 2.05V, VBYP1 = 5.05V
Both Buck Controllers On,
BYP1 Supply Current IBYP1_nosw -- 420 500 A
VFBx = 2.05V, VBYP1 = 5.05V
Buck Controllers Output and FB Voltage
FBx Valley Trip Voltage VFBx CCM Operation 1.98 2 2.02 V
BYP1 Discharge Current IDCHG_BYP1 VBYP1 = 0.5V 10 45 -- mA

PHASEx Discharge Current IDCHG_LX VPHASEx = 0.5V 5 8 -- mA

Switching Frequency
VIN = 20V, VOUT1 = 5V 240 300 360
Switching Frequency f SWx kHz
VIN = 20V, VOUT2 = 3.33V 280 355 430
Minimum Off-Time tOFF(MIN) VFBx = 1.9V -- 200 275 ns
Soft-Start
Soft-Start Time tSSx VOUTx Ramp-up Time -- 0.9 -- ms
Current Sense
CSx Source Current ICSx VCSx = 1V, VFBx = 1.9V 9 10 11 A
CSx Current Temperature
TCICSx In Comparison with 25°C -- 4700 -- ppm/C
Coefficient
Zero-Current Threshold VZC VFBx = 2.05V, GND  PHASEx -- 1 -- mV
Internal Regulator
VIN = 12V, No Load 4.9 5 5.1
VIN > 7V, ILDO5 < 100mA 4.8 5 5.1
LDO5 Output Voltage VLDO5 V
VIN > 5.5V, ILDO5 < 35mA 4.8 5 5.1
VIN > 5V, ILDO5 < 20mA 4.5 4.75 5.1
VIN = 12V, No Load 3.267 3.3 3.333
VIN > 7V, ILDO3 < 100mA 3.217 3.3 3.383
LDO3 Output Voltage VLDO3 V
VIN > 5.5V, ILDO3 < 35mA 3.267 3.3 3.333
VIN > 5V, ILDO3 < 20mA 3.217 3.3 3.383

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RT6575C/D
Parameter Symbol Test Conditions Min Typ Max Unit
VLDO5 = 4.5V, VBYP1 = GND,
LDO5 Output Current ILDO5 100 175 -- mA
VIN = 7.4V
LDO3 Output Current ILDO3 VLDO3 = 3V, VIN = 7.4V 100 175 -- mA
LDO5 Switch-over
VSWTH Rising Edge at BYP1 Regulation Point -- 4.66 -- V
Threshold to BYP1
LDO5 Switch-over
RSW LDO5 to BYP1, 10mA -- 1.5 3 
Equivalent Resistance
VCLK Output
VCLK On-Resistance RVCLK Pull-up and Pull-down Resistance -- 10 -- 
VCLK Switching
fVCLK -- 260 -- kHz
Frequency
UVLO
Rising Edge -- 4.3 4.6
LDO5 UVLO Threshold VUVLO5 V
Falling Edge 3.7 3.9 4.1
LDO3 UVLO Threshold VUVLO3 Channel x Off -- 2.5 -- V
Power Good Indicator
PGOOD Detect, VFBx Rising Edge 84 88 92
PGOOD Threshold VPGxTH %
Hysteresis -- 8 --
PGOOD Leakage Current High state, VPGOOD = 5.5V -- -- 1 A
PGOOD Output Low
ISINK = 4mA -- -- 0.3 V
Voltage
Fault Detection
OVP Trip Threshold VOVP FBx with Respect to Internal Reference 109 113 117 %
OVP Propagation Delay -- 1 -- s
UVP Trip Threshold VUVP UVP Detect, FBx Falling Edge 47 52 57 %
UVP Shutdown Blanking
tSHDN_UVP From ENx Enable -- 1.3 -- ms
Time
Thermal Shutdown
Thermal Shutdown TSD -- 150 -- °C
Thermal Shutdown
TSD -- 10 -- °C
Hysteresis
Logic Inputs
ENx Logic-High VENx_H SMPS On 1.6 -- --
Thershold V
Voltage Logic-Low VENx_L SMPS Off -- -- 0.4
Internal Boost Switch
Internal Boost Switch On-
RBST LDO5 to BOOTx -- 80 -- 
Resistance

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 RT6575C/D
Parameter Symbol Test Conditions Min Typ Max Unit
Power MOSFET Drivers
High State, VBOOTx  VUGATEx = 0.25V,
-- 3 --
VBOOTx  VPHASEx = 5V
UGATEx On-Resistance RUGATEx 
Low State, VUGATEx  VPAHSEx = 0.25V,
-- 2 --
VBOOTx  VPHASEx = 5V
High State, VLDO5  VLGATEx = 0.25V,
-- 3 --
LGATEx On-Resistance RLGATEx VLDO5 = 5V 
Low State, VLGATEx  GND = 0.25V -- 1 --
LGATEx Rising -- 20 --
Dead-Time tD ns
UGATEx Rising -- 30 --

Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.

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RT6575C/D
Typical Application Circuit
VIN
5V to 25V
R8
C1 0 RT6575C C13 C12
10µF 12 10 R10 0 Q2 10µF 10µF
VIN UGATE2 BSC0909
C10 NS
0.1µF 9 R9 0
BOOT2
Q1 R4 0 16 C11
BSC0909 UGATE1 L2
NS 0.1µF 2.2µH
R3 0 17 8 VOUT2
BOOT1 PHASE2
Q4 C17 3.3V
L1 C2 11
LGATE2 BSC0909 R11* 220µF
3.3µH 0.1µF NS
VOUT1 18
PHASE1 C14*
5V
C3 Q3 15
220µF R5* BSC0909 LGATE1 R14 C21*
NS 13k
C4* FB2 4
14 R15
BYP1
R12 C22 20k
C18* 0.1µF 13
15k LDO5 5V
2 C9
FB1
D1 C5 1µF
R13
0.1µF
10k C6 19 PGOOD 7 PGOOD Indicator
0.1µF D2 VCLK
3
LDO3 3.3V Always On
D3 C7 C16
0.1µF 1µF
C8 R1
0.1µF D4 1 82.5k
CS1
BAT254 R2
CPO 5 82.5k
CS2
20
Channel 1 Enable EN1
6 21 (Exposed Pad)
Channel 2 Enable EN2 GND
On
Off
* : Optional

VIN
5V to 25V
R8
C1 0 RT6575D C13 C12
10µF 12 10 R10 0 Q2 10µF 10µF
VIN UGATE2 BSC0909
C10 NS
0.1µF 9 R9 0
BOOT2
Q1 R4 0 16 C11
BSC0909 UGATE1 L2
NS 0.1µF 2.2µH
R3 0 17 8 VOUT2
BOOT1 PHASE2
Q4 C17 3.3V
L1 C2 11
LGATE2 BSC0909 R11* 220µF
3.3µH 0.1µF NS
VOUT1 18
PHASE1 C14*
5V
C3 Q3 15
220µF R5* BSC0909 LGATE1 R14 C21*
NS 13k
C4* FB2 4
14 R15
BYP1
R12 C22 20k
C18* 0.1µF 13
15k LDO5 5V Always On
2 C9
FB1
D1 C5 1µF
R13
0.1µF
10k C6 19 PGOOD 7 PGOOD Indicator
0.1µF D2 VCLK
3
LDO3 3.3V Always On
D3 C7 C16
0.1µF 1µF
C8 R1
0.1µF D4 1 82.5k
CS1
BAT254 R2
CPO 5 82.5k
CS2
20
Channel 1 Enable EN1
6 21 (Exposed Pad)
Channel 2 Enable EN2 GND
On
* : Optional Off

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 RT6575C/D
Typical Operating Characteristics
Efficiency vs. Load Current Efficiency vs. Load Current
100 100
V OUT1 V OUT2
90
90
80 VIN = 7.4V
80 VIN = 7.4V
VIN = 11.1V
VIN = 11.1V 70
VIN = 14.8V

Efficiency (%)
Efficiency (%)

70 VIN = 14.8V
60 VIN = 20V
VIN = 20V
60 50
40
50
30
40
20
30 10
EN1 = LDO3, EN2 = 0V, VCLK On EN1 = 0V, EN2 = LDO3, VCLK On
20 0
0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10
Load Current (A) Load Current (A)

Switching Frequency vs. Load Current Switching Frequency vs. Load Current
350 400
VOUT1, EN1 = LDO3, EN2 = 0V VOUT2, EN1 = 0V, EN2 = LDO3
350
Switching Frequency (kHz)1

Switching Frequency (kHz)1

300

300
250
VIN = 20V
VIN = 12V 250 VIN = 20V
200 VIN = 7.4V VIN = 12V
200 VIN = 7.4V
150
150
100
100

50 50

0 0
0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10
Load Current (A) Load Current (A)

Switching Frequency vs. Input Voltage Switching Frequency vs. Input Voltage
350 400
V OUT1 V OUT2
350
Switching Frequency (kHz)1

300

300
Frequency (kHz)1

250
250
200
200
150
150
100
100

50 50
EN1 = LDO3, EN2 = 0V, ILOAD = 6A EN1 = 0V, EN2 = LDO3, ILOAD = 6A
0 0
5 7 9 11 13 15 17 19 21 23 25 5 7 9 11 13 15 17 19 21 23 25
Input Voltage (V) Input Voltage (V)

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RT6575C/D

Output Voltage vs. Load Current Output Voltage vs. Load Current
5.15 3.40
V OUT1 V OUT2
3.38
5.10
3.36
Output Voltage (V)

Output Voltage (V)

3.34
5.05
3.32
5.00 3.30
VIN = 20V
VIN = 20V 3.28 VIN = 14.8V
4.95 VIN = 14.8V VIN = 11.1V
3.26 VIN = 7.4V
VIN = 11.1V
VIN = 7.4V 3.24
4.90
3.22
EN1 = LDO3, EN2 = 0V EN1 = 0V, EN2 = LDO3
4.85 3.20
0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10
Load Current (A) Load Current (A)

LDO5 vs. Load Current LDO3 vs. Load Current

5.011 3.312
3.311
5.010
3.310
5.009 3.309
LDO3 (V)
LDO5 (V)

3.308
5.008
3.307
5.007
3.306

5.006 3.305
3.304
5.005
3.303
VIN = 12V, EN1 = LDO3, EN2 = 0V, BYP1 Off VIN = 12V, EN1 = 0V, EN2 = LDO3
5.004 3.302
0 10 20 30 40 50 60 70 80 90 100 0 10 20 30 40 50 60 70 80 90 100
Load Current (mA) Load Current (mA)

Quiescent Current vs. Input Voltage BYP1 Supply Current vs. Input Voltage
30 500
490
BYP1 Supply Current (µA)

25
Quiescent Current (µA)

480
470
20
460
15 450
440
10
430
420
5
410
EN1 = EN2 = LDO3, VCLK On, BYP On EN1 = EN2 = LDO3, VCLK On, BYP On
0 400
5 7 9 11 13 15 17 19 21 23 25 5 7 9 11 13 15 17 19 21 23 25
Input Voltage (V) Input Voltage (V)

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 RT6575C/D

Power On from EN Power Off from EN

EN EN
(5V/Div) (5V/Div)

VOUT2 VOUT2
(3V/Div) (3V/Div)

VOUT1 VOUT1
(4V/Div) (4V/Div)

LDO5 LDO5
(5V/Div) (5V/Div)
VIN = 12V, EN1 = EN2 = LDO3, No Load VIN = 12V, EN1 = EN2 = LDO3, No Load

Time (500μs/Div) Time (20ms/Div)

VOUT1 Load Transient Response VOUT2 Load Transient Response

VOUT1 VOUT2
(100mV/Div) (100mV/Div)

UGATE1 UGATE2
(50V/Div) (50V/Div)

LGATE1 LGATE2
(6V/Div) (6V/Div)

IOUT1 IOUT2
(4A/Div) (4A/Div)
VIN = 12V, EN1 = LDO3, EN2 = 0V, IOUT1 = 0A to 6A VIN = 12V, EN1 = 0V, EN2 = LDO3, IOUT2 = 0A to 6A

Time (50μs/Div) Time (50μs/Div)

OVP UVP

VOUT1
(5V/Div)
VOUT1
(2V/Div)

PGOOD UGATE1 UGATE1

(4V/Div) (20V/Div)
IL1 IL1
(4A/Div)
LGATE1
(5V/Div) LGATE1
VIN = 12V, EN1 = EN2 = LDO3, No Load (10V/Div) VIN = 12V, EN1 = EN2 = LDO3

Time (100μs/Div) Time (200μs/Div)

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RT6575C/D
Application Information
The RT6575C/D is a dual-channel, low quiescent, Mach on-time is inversely proportional to the input voltage as
ResponseTM DRVTM mode synchronous Buck controller measured by VIN and proportional to the output voltage.
targeted for Ultrabook system power supply solutions. The inductor ripple current operating point remains
Richtek's Mach ResponseTM technology provides fast relatively constant, resulting in easy design methodology
response to load steps. The topology solves the poor load and predictable output voltage ripple. The frequency of 3V
transient response timing problems of fixed frequency output controller is set higher than the frequency of 5V
current mode PWMs, and avoids the problems caused output controller. This is done to prevent audio frequency
by widely varying switching frequencies in CCR (constant “ beating” between the two sides, which switch
current ripple) constant on-time and constant off-time asynchronously for each side.
PWM schemes. A special adaptive on-time control trades The RT6575C/D adaptively changes the operation
off the performance and efficiency over wide input voltage frequency according to the input voltage. Higher input
range. The RT6575C/D includes 5V (LDO5) and 3.3V voltage usually comes from an external adapter, so the
(LDO3) linear regulators. The LDO5 linear regulator steps RT6575C/D operates with higher frequency to have better
down the battery voltage to supply both internal circuitry performance. Lower input voltage usually comes from a
and gate drivers. The synchronous switch gate drivers are battery, so the RT6575C/D operates with lower switching
directly powered by LDO5. When VOUT1 rises above 4.66V, frequency for lower switching losses. For a specific input
an automatic circuit disconnects the linear regulator and voltage range, the switching cycle period is given by :
allows the device to be powered by VOUT1 via the BYP1
For 5V VOUT,
pin.
VIN  2.7  10-6
Period (sec.) =
PWM Operation VIN  3.79
For 3.3V VOUT,
The Mach ResponseTM DRVTM mode controller relies on
VIN  2.45  10-6
the output filter capacitor's Effective Series Resistance Period (sec.) =
VIN  2.59
(ESR) to act as a current sense resistor, so that the output
ripple voltage provides the PWM ramp signal. Referring to where the VIN is in volt.
the RT6575C/D's Function Block Diagram, the The on-time guaranteed in the Electrical Characteristics
synchronous high-side MOSFET is turned on at the table is influenced by switching delays in the external
beginning of each cycle. After the internal one-shot timer high-side power MOSFET.
expires, the MOSFET will be turned off. The pulse width
of this one-shot is determined by the converter's input Diode Emulation Mode
output voltages to keep the frequency fairly constant over In diode emulation mode, the RT6575C/D automatically
the entire input voltage range. Another one-shot sets a reduces switching frequency at light load conditions to
minimum off-time (200ns typ.). The on-time one-shot will maintain high efficiency. This reduction of frequency is
be triggered if the error comparator is high, the low-side achieved smoothly. As the output current decreases from
switch current is below the current limit threshold, and heavy load condition, the inductor current is also reduced,
the minimum off-time one-shot has timed out. and eventually comes to the point that its current valley
touches zero, which is the boundary between continuous
PWM Frequency and On-time Control conduction and discontinuous conduction modes. To
For each specific input voltage range, the Mach emulate the behavior of diodes, the low-side MOSFET
ResponseTM control architecture runs with pseudo constant allows only partial negative current to flow when the
frequency by feed forwarding the input and output voltage inductor free wheeling current becomes negative. As the
into the on-time one-shot timer. The high-side switch load current is further decreased, it takes longer and longer

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 RT6575C/D
time to discharge the output capacitor to the level that When the on-time expired, LGATE turns on until the
requires the next “ON” cycle. The on-time is kept the inductor current goes to zero crossing threshold and keep
same as that in the heavy load condition. In reverse, when both high-side and low-side MOSFET off to wait for the
the output current increases from light load to heavy load, next trigger. Because shorter on-time causes a smaller
the switching frequency increases to the preset value as pulse of the inductor current, the controller can keep output
the inductor current reaches the continuous conduction. voltage and switching frequency simultaneously. The on-
The transition load point to the light load operation is shown time decreasing has a limitation and the output voltage
in Figure 1. and can be calculated as follows : will be lifted up under the slight load condition. The
IL controller will turn on LGATE first to pull down the output
Slope = (VIN - VOUT) / L voltage. When the output voltage is pulled down to the
IPEAK
balance point of the output load current, the controller will
proceed the short on-time sequence as the above
ILOAD = IPEAK / 2
description.

Linear Regulators (LDOx)

t The RT6575C/D includes 5V (LDO5) and 3.3V (LDO3)

0 tON linear regulators. The regulators can supply up to 100mA
Figure 1. Boundary Condition of CCM/DEM for external loads. Bypass LDOx with a 1μF to 4.7μF, and
recommended value is 1μF ceramic capacitor. When VOUT1
(VIN  VOUT ) is higher than the switch over threshold (4.66V), an internal
ILOAD(SKIP)   tON
2L 1.5Ω P-MOSFET switch connects BYP1 to the LDO5
where tON is the on-time. pin while simultaneously disconnects the internal linear
The switching waveforms may appear noisy and regulator.
asynchronous when light load causes diode emulation
operation. This is normal and results in high efficiency. Current Limit Setting
Trade offs in PFM noise vs. light load efficiency is made The RT6575C/D has cycle-by-cycle current limit control.
by varying the inductor value. Generally, low inductor values The current limit circuit employs a unique “valley” current
produce a broader efficiency vs. load curve, while higher sensing algorithm. If the magnitude of the current sense
values result in higher full load efficiency (assuming that signal at PHASEx is above the current limit threshold,
the coil resistance remains fixed) and less output voltage the PWM is not allowed to initiate a new cycle (Figure 2).
ripple. Penalties for using higher inductor values include The actual peak current is greater than the current limit
larger physical size and degraded load transient response threshold by an amount equal to the inductor ripple current.
(especially at low input voltage levels). Therefore, the exact current limit characteristic and
maximum load capability are a function of the sense
Ultrasonic Mode (ASM) resistance, inductor value, battery and output voltage.
The RT6575C/D activates a unique type of diode emulation IL
mode with a minimum switching frequency of 25kHz,
IPEAK
called ultrasonic mode. This mode eliminates audio-
frequency modulation that would otherwise be present ILOAD
when a lightly loaded controller automatically skips
pulses. In ultrasonic mode, the low-side switch gate driver ILIMIT
signal is “OR”ed with an internal oscillator (>25kHz).
Once the internal oscillator is triggered, the controller will t
turn on UGATE and give it shorter on-time. Figure 2. “Valley” Current Limit

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RT6575C/D
The RT6575C/D uses the on resistance of the synchronous VCLK
rectifier as the current sense element and supports C1 C3
temperature compensated MOSFET RDS(ON) sensing. The VOUT1 Charge Pump
D1 D2 D3 D4 C4
RILIM resistor between the CSx pin and GND sets the current C2
limit threshold. The resistor RILIM is connected to a current
source from CSx which is 10μA (typ.) at room temperature.
Figure 3. Charge Pump Circuit Connected to VCLK
The current source has a 4700ppm/°C temperature slope
to compensate the temperature dependency of the
MOSFET Gate Driver (UGATEx, LGATEx)
RDS(ON). When the voltage drop across the sense resistor
or low-side MOSFET equals 1/8 the voltage across the The high-side driver is designed to drive high current, low
RILIM resistor, positive current limit will be activated. The RDS(ON) N-MOSFET(s). When configured as a floating driver,
high-side MOSFET will not be turned on until the voltage 5V bias voltage is delivered from the LDO5 supply. The
drop across the MOSFET falls below 1/8 the voltage across average drive current is also calculated by the gate charge
the RILIM resistor. at VGS = 5V times switching frequency. The instantaneous
drive current is supplied by the flying capacitor between
Choose a current limit resistor according to the following
the BOOTx and PHASEx pins. A dead-time to prevent
equation :
shoot through is internally generated from high-side
VLIMIT = (RLIMIT x 10μA) / 8 = ILIMIT x RDS(ON) MOSFET off to low-side MOSFET on and low-side
RLIMIT = (ILIMIT x RDS(ON)) x 8 / 10μA MOSFET off to high-side MOSFET on.

Carefully observe the PC board layout guidelines to ensure The low-side driver is designed to drive high current low
that noise and DC errors do not corrupt the current sense RDS(ON) N-MOSFET(s). The internal pull down transistor
signal at PHASEx and GND. Mount or place the IC close that drives LGATEx low is robust, with a 1Ω typical on-
to the low-side MOSFET. resistance. A 5V bias voltage is delivered from the LDO5
supply. The instantaneous drive current is supplied by an
VCLK for Charge Pump input capacitor connected between LDO5 and GND.
A 260kHz VCLK signal can be used for the external charge For high current applications, some combinations of high
pump circuit. The VCLK signal becomes available when and low-side MOSFETs may cause excessive gate drain
EN1 enters ON state. VCLK driver circuit is driven by BYP1 coupling, which leads to efficiency killing, EMI producing,
voltage. and shoot through currents. This is often remedied by
The external 14V charge pump is driven by VCLK. As adding a resistor in series with BOOTx, which increases
shown in Figure 3, when VCLK is low, C1 will be charged the turn-on time of the high-side MOSFET without
by VOUT1 through D1. C1 voltage is equal to VOUT1 minus degrading the turn-off time. See Figure 4.
the diode drop. When VCLK becomes high, C1 transfers
the charge to C2 through D2 and charges C2 voltage to VIN
VVCLK plus C1 voltage. As VCLK transitions low on the
UGATEx
next cycle, C3 is charged to C2 voltage minus a diode RBOOT
BOOTx
drop through D3. Finally, C3 charges C4 through D4 when
VCLK switches high. Thus, the total charge pump voltage, PHASEx
VCP, is :
VCP = VOUT1 + 2 x VVCLK − 4 x VD Figure 4. Increasing the UGATEx Rise Time

where VVCLK is the peak voltage of the VCLK driver which

is equal to LDO5 and VD is the forward voltage dropped
across the Schottky diode.

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 RT6575C/D
Soft-Start Note that latching LGATEx high will cause the output
The RT6575C/D provides an internal soft-start function to voltage to dip slightly negative due to previously stored
prevent large inrush current and output voltage overshoot energy in the LC tank circuit. For loads that cannot tolerate
when the converter starts up. The soft-start (SS) a negative voltage, place a power Schottky diode across
automatically begins once the chip is enabled. During soft- the output to act as a reverse polarity clamp.
start, it clamps the ramping of internal reference voltage If the over-voltage condition is caused by a shorted in
which is compared with FBx signal. The typical soft-start high-side switch, turning the low-side MOSFET on 100%
duration is 0.9ms. A unique PWM duty limit control that will create an electrical shorted circuit between the battery
prevents output over-voltage during soft-start period is and GND to blow the fuse and disconnecting the battery
designed specifically for FBx floating. from the output.

UVLO Protection Output Under-Voltage Protection (UVP)

The RT6575C/D has LDO5 under-voltage lock out The output voltage can be continuously monitored for under-
protection (UVLO). When the LDO5 voltage is lower than voltage condition. If the output is less than 52% (typ.) of
3.9V (typ.) and the LDO3 voltage is lower than 2.5V (typ.), its set voltage threshold, the under-voltage protection will
both switch power supplies are shut off. This is a non- be triggered and then both UGATEx and LGATEx gate
latch protection. drivers will be forced low. The UVP is ignored for at least
1.3ms (typ.) after a start-up or a rising edge on ENx. Toggle
Power Good Output (PGOOD)
ENx or cycle VIN to reset the UVP fault latch and restart
PGOOD is an open-drain output and requires a pull-up the controller.
resistor. PGOOD is actively held low in soft-start, standby,
and shutdown. For RT6575C/D, PGOOD is released when Thermal Protection
both output voltages are above 88% of nominal regulation The RT6575C/D features thermal shutdown to prevent
point. The PGOOD signal goes low if either output turns damage from excessive heat dissipation. Thermal
off or is 20% below or 13% over its nominal regulation shutdown occurs when the die temperature exceeds
point. 150°C. All internal circuitries are turned off during thermal
shutdown. The RT6575C/D triggers thermal shutdown if
Output Over-Voltage Protection (OVP)
LDO5 is not supplied from VOUT1, while input voltage on
The output voltage can be continuously monitored for over- VIN and drawing current from LDO5 are too high.
voltage condition. If the output voltage exceeds 13% of Nevertheless, even if LDO5 is supplied from VOUT1,
its set voltage threshold, the over-voltage protection is overloading LDO5 can cause large power dissipation on
triggered and the LGATEx low-side gate drivers are forced automatic switches, which may still result in thermal
high. This activates the low-side MOSFET switch, which shutdown.
rapidly discharges the output capacitor and pulls the output
voltage downward. Discharge Mode (Soft Discharge)
The RT6575C/D is latched once OVP is triggered and can When ENx is low the output under-voltage fault latch is
only be released by either toggling ENx or cycling VIN. set, the output discharge mode will be triggered. During
There is a 1μs delay built into the over-voltage protection discharge mode, an internal switch creates a path for
circuit to prevent false transition. discharging the output capacitors' residual charge to GND.

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RT6575C/D
Standby Mode Power-Up Sequencing and On/Off Controls (ENx)
When VIN exceeds POR threshold and ENx < 0.4V, the EN1 and EN2 control the power-up sequencing of the two
RT6575C/D operate in standby mode, and CH1 and CH2 channels of the Buck converter. The 0.4V falling edge
are OFF state. For the RT6575C, LDO5 is OFF and LDO3 threshold on ENx can be used to detect a specific analog
is ON state and approximately consumes 15μA of input voltage level and to shutdown the device. Once in
current. For the RT6575D, LDO5 and LDO3 are ON state shutdown, the 1.6V rising edge threshold activates,
and approximately consumes 25μA while in standby mode. providing sufficient hysteresis for most applications.

Table 1. Operation Mode Truth Table

Mode Condition Comment
LDO Over Transitions to discharge mode after VIN POR. LDO5
LDOx < UVLO threshold
Current Limit and LDO3 remain active.
Run ENx = high, VOUT1 or VOUT2 are enabled Normal Operation.
Over-Voltage LGATEx is forced high. LDO3 and LDO5 are active.
Either output >113% of the nominal level.
Protection Exit by VIN POR or by toggling ENx.
Either output < 52% of the nominal level Both UGATEx and LGATEx are forced low and enter
Under-Voltage
after 1.3ms time-out expires and output is discharge mode. LDO3 and LDO5 are active. Exit by
Protection
enabled VIN POR or by toggling ENx.
During discharge mode, there is one path to
Discharge Either output is still high in standby mode discharge the output capacitors’ residual charge to
GND via an internal switch.
VIN > POR For RT6575C : LDO3 is active
Standby
ENx < 0.4V For RT6575D : LDO3, LDO5 are active
Thermal
TJ > 150°C All circuitries are off. Exit by VIN POR.
Shutdown

Table 2. Enabling/PGOOD State (RT6575C)

EN1 EN2 LDO5 LDO3 CH1 (5VOUT) CH2 (3.3VOUT) VCLK PGOOD
OFF OFF OFF ON OFF OFF OFF Low
ON OFF ON ON ON OFF ON Low
OFF ON ON ON OFF ON OFF Low
ON ON ON ON ON ON ON High

Table 3. Enabling/PGOOD State (RT6575D)

EN1 EN2 LDO5 LDO3 CH1 (5VOUT) CH2 (3.3VOUT) VCLK PGOOD
OFF OFF ON ON OFF OFF OFF Low
ON OFF ON ON ON OFF ON Low
OFF ON ON ON OFF ON OFF Low
ON ON ON ON ON ON ON High

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 RT6575C/D
VIN POR threshold
VIN

LDO3

EN threshold
EN1
VREG5 UVLO threshold
Start-Up Time
LDO5

Soft-Start Time
5V VOUT

EN threshold
EN2
Start-Up Time

3.3V VOUT

PGOOD
PGOOD
Soft-Start Time
Delay

Figure 5. RT6575C Timing

VIN POR threshold

VIN
2.5V

LDO3

LDO5

EN threshold
Start-Up Time
EN1

Soft-Start Time
5V VOUT

EN threshold
EN2
Start-Up Time
3.3V VOUT

PGOOD
PGOOD
Soft-Start Time
Delay

Figure 6. RT6575D Timing

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RT6575C/D
Output Voltage Setting (FBx) Output Capacitor Selection
Connect a resistive voltage divider at the FBx pin between The capacitor value and ESR determine the amount of
VOUTx and GND to adjust the output voltage from 2V to output voltage ripple and load transient response. Thus,
5.5V for CH1 and 2V to 4V for CH2, as shown in Figure 7. the capacitor value must be greater than the largest value
The recommended R2 value is between 10kΩ to 20kΩ, calculated from the equations below :
and solve for R1 using the equation below :
(ILOAD )2  L  (tON + tOFF(MIN) )
  R1   VSAG 
VOUT(Valley)  VFBx   1 +   2  COUT   VIN  tON  VOUTx (tON + tOFF(MIN) )
  R2  
where VFBx is 2V (typ.).
(ILOAD )2  L
VSOAR 
VIN 2  COUT  VOUTx

UGATEx  1 
VPP  LIR  ILOAD(MAX)   ESR + 
 8  COUT  f 
PHASEx VOUTx

LGATEx
R1
where VSAG and VSOAR are the allowable amount of
undershoot and overshoot voltage during load transient,
FBx Vp-p is the output ripple voltage, and tOFF(MIN) is the
R2
minimum off-time.
GND

Thermal Considerations
Figure 7. Setting VOUTx with a resistive voltage divider
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
Output Inductor Selection
dissipation depends on the thermal resistance of the IC
The switching frequency (on-time) and operating point package, PCB layout, rate of surrounding airflow, and
(% ripple or LIR) determine the inductor value as shown difference between junction and ambient temperature. The
below : maximum power dissipation can be calculated by the
t  (VIN  VOUTx ) following formula :
L  ON
LIR  ILOAD(MAX)
PD(MAX) = (TJ(MAX) − TA) / θJA
where LIR is the ratio of the peak-to-peak ripple current to
where TJ(MAX) is the maximum junction temperature, TA is
the average inductor current.
the ambient temperature, and θJA is the junction to ambient
Find a low-loss inductor having the lowest possible DC thermal resistance.
resistance that fits in the allotted dimensions. Ferrite cores
For recommended operating condition specifications, the
are often the best choice, although powdered iron is
maximum junction temperature is 125°C. The junction to
inexpensive and can work well at 200kHz. The core must
ambient thermal resistance, θJA, is layout dependent. For
be large enough not to saturate at the peak inductor
WQFN-20L 3x3 package, the thermal resistance, θJA, is
current, IPEAK :
30°C/W on a standard JEDEC 51-7 four-layer thermal test
IPEAK = ILOAD(MAX) + [ (LIR / 2) x ILOAD(MAX) ] board. The maximum power dissipation at TA = 25°C can
The calculation above shall serve as a general reference. be calculated by the following formula :
To further improve transient response, the output P D(MAX) = (125°C − 25°C) / (30°C/W) = 3.33W for
inductance can be further reduced. Of course, besides WQFN-20L 3x3 package
the inductor, the output capacitor should also be
considered when improving transient response.

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 RT6575C/D
The maximum power dissipation depends on the operating Layout Considerations
ambient temperature for fixed T J(MAX) and thermal Layout is very important in high frequency switching
resistance, θJA. The derating curve in Figure 8 allows the converter design. Improper PCB layout can radiate
designer to see the effect of rising ambient temperature excessive noise and contribute to the converter’s
on the maximum power dissipation. instability. Certain points must be considered before
4.0 starting a layout with the RT6575C/D.
Maximum Power Dissipation (W)1

Four-Layer PCB
3.5  Place the filter capacitor close to the IC, within 12mm
3.0 (0.5 inch) if possible.

2.5  Keep current limit setting network as close as possible

2.0
to the IC. Routing of the network should avoid coupling
to high-voltage switching node.
1.5
 Connections from the drivers to the respective gate of
1.0
the high-side or the low-side MOSFET should be as
0.5 short as possible to reduce stray inductance. Use
0.0 0.65mm (25 mils) or wider trace.
0 25 50 75 100 125
 All sensitive analog traces and components such as
Ambient Temperature (°C)
FBx, PGOOD, and should be placed away from high
Figure 8. Derating Curve of Maximum Power Dissipation voltage switching nodes such as PHASEx, LGATEx,
UGATEx, or BOOTx nodes to avoid coupling. Use
internal layer(s) as ground plane(s) and shield the
feedback trace from power traces and components.
 Place ground terminal of VIN capacitor(s), V OUTx
capacitor(s), and Source of low-side MOSFETs as close
to each other as possible. The PCB trace of PHASEx
node, which connects to Source of high-side MOSFET,
Drain of low-side MOSFET and high voltage side of the
inductor, should be as short and wide as possible.

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RT6575C/D
Outline Dimension

1 1

2 2

DETAIL A
Pin #1 ID and Tie Bar Mark Options

Note : The configuration of the Pin #1 identifier is optional,

but must be located within the zone indicated.

Dimensions In Millimeters Dimensions In Inches

Symbol
Min Max Min Max
A 0.700 0.800 0.028 0.031
A1 0.000 0.050 0.000 0.002
A3 0.175 0.250 0.007 0.010
b 0.150 0.250 0.006 0.010
D 2.900 3.100 0.114 0.122
D2 1.650 1.750 0.065 0.069
E 2.900 3.100 0.114 0.122
E2 1.650 1.750 0.065 0.069
e 0.400 0.016
L 0.350 0.450 0.014 0.018

W-Type 20L QFN 3x3 Package

Richtek Technology Corporation

14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789

Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.

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