[Department of Information Technology]

Catholic University in Erbil

[Computer Architecture]

Course Book – (2nd year)

Lecturers name [Asst.Prof.Dr.Raghad Zuhair yousif]
Academic Year: 2019-2020 Spring Semester

Course Book

1. Course name Computer Architecture

2. Lecturer in charge Asst.Prof.Dr.Raghad Zuhair Yousif
3. Department/ College Information Technology
4. Contact [email protected]
5. Time (in hours) per week Theory: 2 h
Practical: 2h
6. Office hours Saturday 8:30-4:30
7. Course code
8. Teacher's academic profile was born in Baghdad 1975 .He Received a BSc in
Electronic and Communication engineering from college
of Engineering Baghdad university Department of
Electronic and Communication Eng. in 1998,MSc in
Electronic and Communication Engineering form
department of Electrical engineering Al-Mustansriyha
university –Baghdad in 2001 ,then he received a PhD
degree in communication Engineering from Baghdad
university of Technology Department of Electronics and
Electrical engineering in 2005 .He is currently a
Assistance Professor in Department of IT-catholic
university in Erbil; His Fields of interest are Network
Coding Medical Imaging Swarms, Wireless. He is a
supervisor of many MSc thesis and PhD thesis he was
also a member of examination committee of many MSc
and PhD theses.
9. Keywords Lexical analysis, parsing, intermediate code, DFA
10. Course overview:
Computer architecture is the science and art of designing, selecting, and interconnecting hardware components
and designing the hardware/software interface to create a computer that meets functional, performance,
energy consumption, cost, and other specific goals. This course examines the fundamental computer design
trade-offs, and provides an extensive knowledge of state-of-the-art research proposals with the goal of
developing an understanding that will enable students to perform cutting edge research in computer
architecture. We will learn, for example, how uniprocessors execute many instructions concurrently, how state-
of-the-art memory systems deliver data into the processor.
11. Course objective:
 To familiarize with both fundamental design trade-offs and recent research issues/trends in processor,
memory, and platform architectures in todays and future systems. A strong emphasis will be given on
fundamental principles and design trade-offs.
 The Computer Architecture course is an introduction low level programming and the hardware/
software interface. Topics include instruction sets, computer arithmetic, datapath design, data formats,
addressing modes, memory hierarchies including caches and virtual memory, I/O devices, and multicore
architectures. Students learn assembly language programming, and a pipelined RISC processor design

12. Student's obligation

No exam will be given after the scheduled date/time without appropriate medical documents.
Missed exams will be graded (0) unless prior arrangements are made with the teacher. Overall passing
grades must be attained in all exams to pass the course.
Professionalism:
You should be able to demonstrate a professional attitude and behavior towards your work,
your fellow-students and your teacher: this includes reliability, respect for and cooperation with
colleagues, willingness to work calmly and courteously under difficult conditions, determination to
achieve first-class work while meeting deadlines, respect for equipment and systems, and constructive
response to criticism.
Cheating and Plagiarism:
All forms of cheating, including plagiarism, are a serious offense. The teacher has the right to
assign a grade of "0" on the examination or assignment, or, at the teacher's discretion.

Attendance:
Attendance is mandatory. Students are responsible to ensure that all work, including
assignments, is completed. If, due to some unforeseen event, classes are missed, students must ensure
that they keep current with their work (including assignments).

13. Forms of teaching

“Teacher-Centred Approach to Learning”
teacher is the main authority figure in a teacher-cantered instruction model. Students are
viewed as “empty vessels” External link  who passively receive knowledge from their teachers through
lectures and direct instruction, with an end goal of positive results from testing and assessment.
14.Assessment scheme

Two or Three examinations 30 %

For each chapter one Quiz and Homework 10%
Final examination 60%

15.Student learning outcome:

A student who successfully fulfils the course requirements will have demonstrated ability to:
• Understand fundamentals of computer architecture.
• Analyse microprocessor design and micro operation Instruction set architecture.
• Translate high-level language code into micro operation instructions and vice versa.
• Understand design principles of ALU and typical data and control paths.
• Understand how pipelining works and how it improves CPU performance.
• Understand the concepts of memory hierarchy, cache memory, and virtual memory.
• Create simple assembly programs. • Understand Performance Simulation.
• Recognize how I/O devices interface with CPU, Memory, and Operating System.
16.Course Reading List and References‌:
Text Book(s) and Supporting Materials:
Text book(s):
References:
 Mano, M. Morris, Computer System Architecture, 3rd Edition, Prentice-Hall, Inc., 1993.
 2Mostafa Abd-El-Barr, Hesham El-Rewini, "Fundamentals of Computer Organization and
Architecture", A John Wiley & Sons, Inc Publication, 2005.
 M. Morris Mano, Computer Engineering Hardware Design, 1st Edition, Prentice-Hall, Inc., 1988.
References
 Moodle Important Information regarding course assignments, project, exams, and supplementary
learning material is posted on Moodle. Students must check Moodle regularly.
Extra references:
 Computer Organization and Design (The Hardware/Software Interface) fourth Edition, by David A.
Patterson & John L. Hennessy. ISBN: 978-0-12-374493-7
17. The Topics:
Date Topic Details LAB

Week 1 Register Transfer  Register transfer language, Register Assembly

and Microoperation transfer, Bus and Memory Transfer
8086+
 Arithmetic and Logic
Microoperations, Shift CEDAR
Microoperations, Arithmetic Logic
Shift Unit, Control Function.

Week 2 Computer and CPU  Basics of Computer Architecture Assembly

performance  CPU performance Assessment
8086+

CEDAR

Week 3 Basic Computer  Instruction Code, Computer Register Assembly

Organization and  Computer Instructions, Timing and
Design I 8086+
Control, Memory – Reference
Instruction CEDAR


Week 4 Basic Computer  Input – Output and Interrupt Assembly

Organization and  Complete Computer Description
Design II 8086+
 CEDAR

Week 5 Basic Computer  Design of Basic Computer Assembly

Organization and  Design of Accumulator Logic.
Design III 8086+

CEDAR

Week 6 Micro Programmed  Control Memory, Assembly

Control I  Address Sequencing,
8086+

CEDAR

Week 7 Micro Programmed  Micro Program Example, Assembly

Control I  Design of Control Time.
8086+

CEDAR

Week 8 Central Processing Unit I  General Register Stack Organization Assembly

 Instruction Formats,
8086+

CEDAR

Week 9 Central Processing Unit II  Addressing Modes, Assembly

 Data Transfer and Manipulation
8086+
 Reduced Instruction Set Computer.
CEDAR

Week 10 Memory Management I  Memory Hierarchy, Assembly

 Auxiliary Memory,
8086+
 Main Memory
CEDAR

Week 11 Memory Management  Associative Memory, Assembly

II  Cache Memory,
8086+

CEDAR

Week 12 Memory Management  Virtual Memory Management, Assembly

III  Memory Management Hardware.
8086+
 CEDAR

Week 13 Input–Output  Peripheral Devise, Assembly

Organization I  Asynchronous Data Transfer
8086+

CEDAR

Week 14 Input–Output  Mode of Transfer, Assembly

Organization II  Direct Memory Access (DMA),
8086+
 Input – Output Processor (IOP).
CEDAR

Week 15 Pipelining I  General Considerations, Assembly

 Comparison of Pipelined
8086+
 Non-pipelined Computers
CEDAR

Week 16 Pipelining II  Instruction Pipeline, Assembly

 Example Pipeline Processors,
8086+
 Instruction-Level Parallelism
 , Arithmetic Pipeline, CEDAR
 Structural Hazards and Data
Dependencies,
 Branch Delay and Multicycle
Instructions,
 Superscalar Computers.

Week 17 Computer Arithmetic  Addition, Subtraction, Assembly

 Multiplication and Division
8086+
Algorithm,
 Decimal arithmetic operations. CEDAR
Lecturer's name for Asst.Prof.Dr.Eng.Raghad Zuhair Yousif
all lectures

19. Examinations:
Q1.Multiple choices
10
If computer A has a clock rate of 200 MHz and executes a program with 10 instructions in 2 minutes,
and computer B has a clock rate of 300 MHz and executes the same program in 5 minutes (1-2).
1- The cycle per instruction (CPI) for computer A is:

a) 0.4 b) 0.8 c) 1.25 d) 2.4 e) None

2- The performance of computer A relative to computer B is:

a) 2 b) 5 c) 2/5 d) 300 e) 300/120

3- The execution CPU time is:

a) user time b) system time c) a+b d) a-b e) b-a

4- A program or a set of programs used to evaluate computer performance by computer users is called:

a) work-mark b) performance-mark c) benchmark d) load-mark e) work-load.

5- The interface between the hardware and the low level software is called:

a) Instruction set architecture b) instructions c) architecture d) assembly e) None

Q2