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    Data Sheet: 74HC/HCT540

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    Diego Grisales
    The document provides specifications for the 74HC/HCT540 integrated circuit, which is an octal buffer/line driver with 3-state outputs. It has inverting outputs and its outputs can be disabled by applying a HIGH signal to either the OE1 or OE2 pins. The document includes details on features, general description, pin descriptions, logic diagrams, truth tables, and timing specifications.

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    © All Rights Reserved
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    Data Sheet: 74HC/HCT540

    Uploaded by

    Diego Grisales
    70 views7 pages
    The document provides specifications for the 74HC/HCT540 integrated circuit, which is an octal buffer/line driver with 3-state outputs. It has inverting outputs and its outputs can be disabled by applying a HIGH signal to either the OE1 or OE2 pins. The document includes details on features, general description, pin descriptions, logic diagrams, truth tables, and timing specifications.

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    74hc540.pdf

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    The document provides specifications for the 74HC/HCT540 integrated circuit, which is an octal buffer/line driver with 3-state outputs. It has inverting outputs and its outputs can be disabled by applying a HIGH signal to either the OE1 or OE2 pins. The document includes details on features, general description, pin descriptions, logic diagrams, truth tables, and timing specifications.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    70 views7 pages

    Data Sheet: 74HC/HCT540

    Uploaded by

    Diego Grisales
    The document provides specifications for the 74HC/HCT540 integrated circuit, which is an octal buffer/line driver with 3-state outputs. It has inverting outputs and its outputs can be disabled by applying a HIGH signal to either the OE1 or OE2 pins. The document includes details on features, general description, pin descriptions, logic diagrams, truth tables, and timing specifications.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 7

    INTEGRATED CIRCUITS

    DATA SHEET
    For a complete data sheet, please also download:

    • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications


    • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
    • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines

    74HC/HCT540
    Octal buffer/line driver; 3-state;
    inverting
    Product specification December 1990
    File under Integrated Circuits, IC06
    Philips Semiconductors Product specification

    Octal buffer/line driver; 3-state;


    74HC/HCT540
    inverting

    FEATURES The 74HC/HCT540 are octal inverting buffer/line drivers


    with 3-state outputs. The 3-state outputs are controlled by
    • Inverting outputs
    the output enable inputs OE1 and OE2.
    • Output capability: bus driver A HIGH on OEn causes the outputs to assume a high
    • ICC category: MSI impedance OFF-state.
    The “540” is identical to the “541” but has inverting outputs.

    GENERAL DESCRIPTION
    The 74HC/HCT540 are high-speed Si-gate CMOS devices
    and are pin compatible with low power Schottky TTL
    (LSTTL). They are specified in compliance with JEDEC
    standard no. 7A.

    QUICK REFERENCE DATA


    GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns

    TYPICAL
    SYMBOL PARAMETER CONDITIONS UNIT
    HC HCT
    tPHL/ tPLH propagation delay An to Yn CL = 15 pF; VCC = 5 V 9 11 ns
    CI input capacitance 3.5 3.5 pF
    CPD power dissipation capacitance per buffer notes 1 and 2 39 44 pF

    Notes
    1. CPD is used to determine the dynamic power dissipation (PD in µW):
    PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
    fi = input frequency in MHz
    fo = output frequency in MHz
    ∑ (CL × VCC2 × fo) = sum of outputs
    CL = output load capacitance in pF
    VCC = supply voltage in V
    2. For HC the condition is VI = GND to VCC
    For HCT the condition is VI = GND to VCC − 1.5 V

    ORDERING INFORMATION
    See “74HC/HCT/HCU/HCMOS Logic Package Information”.

    December 1990 2
    Philips Semiconductors Product specification

    Octal buffer/line driver; 3-state; inverting 74HC/HCT540

    PIN DESCRIPTION

    PIN NO. SYMBOL NAME AND FUNCTION


    1, 19 OE1, OE2 output enable input (active LOW)
    2, 3, 4, 5, 6, 7, 8, 9 A0 to A7 data inputs
    10 GND ground (0 V)
    18, 17, 16, 15, 14, 13, 12, 11 Y0 to Y7 bus outputs
    20 VCC positive supply voltage

    Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.

    December 1990 3
    Philips Semiconductors Product specification

    Octal buffer/line driver; 3-state; inverting 74HC/HCT540

    FUNCTION TABLE

    INPUTS OUTPUT
    OE1 OE2 An Yn
    L L L H
    L L H L
    X H X Z
    H X X Z

    Notes
    1. H = HIGH voltage level
    L = LOW voltage level
    X = don’t care
    Z = high impedance OFF-state

    Fig.4 Functional diagram.

    Fig.5 Logic diagram.

    December 1990 4
    Philips Semiconductors Product specification

    Octal buffer/line driver; 3-state; inverting 74HC/HCT540

    DC CHARACTERISTICS FOR 74HC


    For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
    Output capability: bus driver
    ICC category: MSI

    AC CHARACTERISTICS FOR 74HC


    GND = 0 V; tr = tf = 6 ns; CL = 50 pF

    Tamb (°C) TEST CONDITIONS


    74HC
    SYMBOL PARAMETER UNIT V
    +25 −40 to +85 −40 to +125 CC
    WAVEFORMS
    (V)
    min. typ. max. min. max. min. max.
    tPHL/ tPLH propagation delay 30 100 125 150 ns 2.0 Fig.6
    An to Yn 11 20 25 30 4.5
    9 17 21 26 6.0
    tPZH/ tPZL 3-state output 52 160 200 240 ns 2.0 Fig.7
    enable time 19 32 40 48 4.5
    OE to Yn 15 27 34 41 6.0
    tPHZ/ tPLZ 3-state output 61 160 200 240 ns 2.0 Fig.7
    disable time 22 32 40 48 4.5
    OE to Yn 18 27 34 41 6.0
    tTHL/ tTLH output transition time 14 60 75 90 ns 2.0 Fig.6
    5 12 15 18 4.5
    4 10 13 15 6.0

    December 1990 5
    Philips Semiconductors Product specification

    Octal buffer/line driver; 3-state; inverting 74HC/HCT540

    DC CHARACTERISTICS FOR 74HCT


    For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
    Output capability: bus driver
    ICC category: MSI

    Note to HCT types


    The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications.
    To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.

    INPUT UNIT LOAD COEFFICIENT


    OE1 1.50
    OE2 1.00
    An 1.40

    AC CHARACTERISTICS FOR 74HCT


    GND = 0 V; tr = tf = 6 ns; CL = 50 pF

    Tamb (°C) TEST CONDITIONS


    74HCT
    SYMBOL PARAMETER UNIT V
    +25 −40 to +85 −40 to +125 CC
    WAVEFORMS
    (V)
    min. typ. max. min. max. min. max.
    tPHL/ tPLH propagation delay 13 24 30 36 ns 4.5 Fig.6
    An to Yn
    tPZH/ tPZL 3-state 22 35 44 53 ns 4.5 Fig.7
    output enable time
    OE to Yn
    tPHZ/ tPLZ 3-state output 23 35 44 53 ns 4.5 Fig.7
    disable time
    OE to Yn
    tTHL/ tTLH output transition time 5 12 15 18 ns 4.5 Fig.6

    December 1990 6
    Philips Semiconductors Product specification

    Octal buffer/line driver; 3-state; inverting 74HC/HCT540

    AC WAVEFORMS

    (1) HC : VM = 50%; VI = GND to VCC.


    HCT: VM = 1.3 V; VI = GND to 3 V.

    Fig.6 Waveforms showing the input (An) to output (Yn) propagation delays and the output transition times.

    (1) HC : VM = 50%; VI = GND to VCC.


    HCT: VM = 1.3 V; VI = GND to 3 V.

    Fig.7 Waveforms showing the 3-state enable and disable times.

    PACKAGE OUTLINES
    See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.

    December 1990 7

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