Wk-6 APC-MultiSIM Online LAB Part-1

ESYS 51
Wk-6 Lab Activity Part - 1

Student Guide
Wk-6 Atari Punk Console Multisim Schematic and Simulation

Student Name: ___________________________________________________
Overview Lab Preparation

In this lab activity you will create a Verify that the lab PC has Multisim version
schematic drawing and simulation for the 13 or later installed.
“Atari Punk Console” sound generator.
Before Starting This Activity Task #1 – Open template and

Review the Multisim tutorials. identify pre-placed components
A starting template file is provided on
Learning Outcomes For Activity CANVAS. This file contains the “virtual”
components and connection points.
Relevant knowledge (K), skill (S), or
attitude (A) student learning outcomes 1. Download the starting template “APC
schematic-starter.ms13” from the
K1. Identify correct component parameters. CANVAS Projects folder. Open the file
in Multisim.
K2. Identify correct node connections. 2. In Multisim, the components are color
coded to indicate the type. By default,
K3. Verify proper simulation results. black components are virtual
components, green components are
S1. Create a schematic for the given circuit
connection points, and blue components
S2. Run circuit simulation are physical components. Some
important points to consider:
A1. Appreciate the capabilities of circuit a. Physical components include
simulation software. footprints, the physical dimensions
for the components for use when
Getting Started exporting the design for PC board
Lab Activity and Deliverables: fabrication.
It should take students approximately 2 b. Virtual components perform the same
hours to complete the lab activity. as physical components in all
simulation calculations, but do not
Equipment & Supplies have footprint data and are not
included in the exported data for PC
Item Quantity board fabrication. Virtual components
Multisim version 13 or later 1 are typically used for parts that are
needed to simulate the circuit, but will
Special Safety Requirements not be included on the circuit board.
 None. c. Connection points have footprints for
connections to the PC board, but do
not affect the simulation.
Wk-6 APC Multisim Schematic & Simulation © 2020 ESYS 51 1

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Student Guide
3. Examine the template and count the represented as 500 kΩ variable resistors,
number of virtual, connection, and and the speaker is represented as an 8 Ω
physical components. resistor.
Virtual ______ Connection ______ R1 and R2 – 500 kΩ variable resistors

Group: Basic, Family: Variable_Resistor
Physical _______ Footprint: Generic / RHEOSTAT
Task #2 – Place physical
components R3 – 10 kΩ resistor
Group: Basic, Family: Resistor
1. Open the component placement menu Footprint: RES / 400-800x250
(Place > Component… or Ctrl+W). Find
the timer chip by entering “LM556” in C1 – 0.01 µF and C2 – 0.1 µF capacitor
the “Component:” search line. Select the Group: Basic, Family: Capacitor
LM556CN. Note that the “Footprint Footprint: CAPPA1600-1000x450
manufacturer/type:” should be IPC-
2221A/2222/N14A. Click “OK” to place C3 – 10 µF electrolytic capacitor
the chip into your design. Group: Basic, Family: Cap_Electrolit
2. Since the LM556 has two timer circuits Footprint: CAPPA3100-2500x1000
in the one package, a pop-up window
will appear for you to select which timer 5. After all components are placed, you
circuit you want to place. Click “A” and may exit dialog box by pressing “Esc.”
then click on the drawing space to place Select a component by clicking on it.
the timer for U1A. Use the rotate commands, by right-
clicking on the component (or Ctrl+R
and Ctrl+Shift+R), and the flip
commands (Alt+X and Alt+Y) to align
Exact placement is not important; you the components to match the sample
can reposition any component as you drawing.
build your design. 6. Since we will be constructing and
3. After placing the first timer, you have troubleshooting this circuit, identifying
the option to place either the second the pin numbers for the 556 IC will be
timer in the same package, or a timer helpful. Right-click on the U1A
from a new package. Select the “B” rectangle and select Properties… (or
timer from U1, then place it near the click on U1A and use the Ctrl+M
U1B space on the drawing. command). Click the Display tab, click
“Use component specific visibility
settings,” and check the “Show footprint
4. Place the remaining components as

shown below. Pay careful attention to
the component values and the footprints,
as resistors and capacitors have many
possible footprints. Note that in the
simulation the photoresistors are

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Student Guide
pin names” box. 7. Repeat the steps for U1B.
Task #3 – Connect the components and run the simulation

1. Follow the sample drawing to connect the components. This is also called creating the netlist.
Note that when two paths cross, but do not connect, the lines cross without a dot at the
intersection. The dots indicate where paths connect.
2. Save your design. Run the simulation.

3. Double-click the oscilloscope icon. If your circuit is running correctly, you should see a
series of pulses on channels A and B. Changing the value of R1 will change the period of the
pulses on channel A, and changing the value of R2 will change the pulse width and period of

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Student Guide
the pulses on channel B.
4. Save your file, then select Transfer > Transfer to Ultiboard > Transfer to Ultiboard file…
You will use this file as the starting point for creating your PC board layout in the upcoming
assignment.

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ESYS 51

Wk-6 Lab Activity Part - 1

Wk-6 Atari Punk Console Multisim Schematic and Simulation

Overview Lab Preparation

Before Starting This Activity Task #1 – Open template and

Wk-6 APC Multisim Schematic & Simulation © 2020 ESYS 51 1

Virtual Connection R1 and R2 – 500 kΩ variable resistors

4. Place the remaining components as

Wk-6 APC Multisim Schematic & Simulation © 2020 ESYS 51 2

pin names” box. 7. Repeat the steps for U1B.

Task #3 – Connect the components and run the simulation

2. Save your design. Run the simulation.

Wk-6 APC Multisim Schematic & Simulation © 2020 ESYS 51 3

the pulses on channel B.

Wk-6 APC Multisim Schematic & Simulation © 2020 ESYS 51 4

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