HEF4521B: 1. General Description
HEF4521B: 1. General Description
HEF4521B: 1. General Description
1. General description
The HEF4521B consists of a chain of 24 toggle flip-flops with an overriding asynchronous
master reset input (MR), and an input circuit that allows three modes of operation. The
single inverting stage (A2 to Y2) functions as: a crystal oscillator, an input buffer for an
external oscillator or in combination with A1 as an RC oscillator. The crystal oscillator
operates in Low-power mode when pins VSS1 and VDD1 are supplied via external resistors.
Each flip-flop divides the frequency of the previous flip-flop by two, consequently the
HEF4521B counts up to 224 = 16777216. The counting advances on the HIGH-to-LOW
transition of the clock (A2). The outputs from each of the last seven stages (218 to 224) are
available for additional flexibility.
3. Ordering information
Table 1. Ordering information
All types operate from 40 C to +85 C.
Type number Package
Name Description Version
HEF4521BT SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
NXP Semiconductors HEF4521B
24-stage frequency divider and oscillator
4. Functional diagram
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NXP Semiconductors HEF4521B
24-stage frequency divider and oscillator
5. Pinning information
5.1 Pinning
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6. Count capacity
Table 3. Count capacity
Output Count capacity
Q18 218 = 262144
Q19 219 = 524288
Q20 220 = 1048576
Q21 221 = 2097152
Q22 222 = 4194304
Q23 223 = 8388608
Q24 224 = 16777216
HEF4521B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
7. Functional test
A test function has been included to reduce the test time required to test all 24 counter
stages. This test function divides the counter into three 8-stage sections by connecting
VSS1 to VDD and VDD1 to VSS. 255 counts are loaded into each of the 8-stage sections in
parallel via A2 (connected to Y2). All flip-flops are now at a HIGH level. The counter is
now returned to the normal 24-stage in series configuration by connecting VSS1 to VSS
and VDD1 to VDD. Entering one more pulse into input A2 causes the counter to ripple from
an all HIGH state to an all LOW state.
[1] H = HIGH voltage level; L = LOW voltage level; = HIGH to LOW transition.
[2] 255 pulses are clocked into A2, Y2. The counter advances on the LOW to HIGH transition.
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDD supply voltage 0.5 +18 V
IIK input clamping current VI < 0.5 V or VI > VDD + 0.5 V - 10 mA
VI input voltage 0.5 VDD + 0.5 V
IOK output clamping current VO < 0.5 V or VO > VDD + 0.5 V - 10 mA
II/O input/output current - 10 mA
IDD supply current to any supply terminal - 100 mA
Tstg storage temperature 65 +150 C
Tamb ambient temperature 40 +85 C
Ptot total power dissipation SO16 package [1] - 500 mW
P power dissipation per output - 100 mW
[1] For SO16 package: Ptot derates linearly with 8 mW/K above 70 C.
HEF4521B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
HEF4521B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
[1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF).
HEF4521B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
12. Waveforms
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a. Pulse widths, maximum frequency, recovery and transition times and A2 to Qn propagation delays
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a. Input waveforms
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b. Test circuit
Test data is given in Table 10.
Definitions for test circuit:
Device Under Test (DUT);
CL = Load capacitance including jig and probe capacitance;
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
Fig 6. Test circuit for measuring switching times
HEF4521B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
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gfs = dio/dvi with vo constant (see Figure 11). (1) Average + 2s.
(2) Average.
(3) Average 2s.
Where ‘s’ is the observed standard deviation.
Fig 10. Test setup for measuring forward Fig 11. Typical forward transconductance gfs as a
transconductance function of the supply voltage at Tamb = 25 C
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Fig 14. Test setup for measuring the Figure 12 and Figure 13 graphs
HEF4521B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
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HEF4521B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
HEF4521B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
16.2 Definitions Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
Draft — The document is a draft version only. The content is still under
malfunction of an NXP Semiconductors product can reasonably be expected
internal review and subject to formal approval, which may result in
to result in personal injury, death or severe property or environmental
modifications or additions. NXP Semiconductors does not give any
damage. NXP Semiconductors and its suppliers accept no liability for
representations or warranties as to the accuracy or completeness of
inclusion and/or use of NXP Semiconductors products in such equipment or
information included herein and shall have no liability for the consequences of
applications and therefore such inclusion and/or use is at the customer’s own
use of such information.
risk.
Short data sheet — A short data sheet is an extract from a full data sheet
Applications — Applications that are described herein for any of these
with the same product type number(s) and title. A short data sheet is intended
products are for illustrative purposes only. NXP Semiconductors makes no
for quick reference only and should not be relied upon to contain detailed and
representation or warranty that such applications will be suitable for the
full information. For detailed and full information see the relevant full data
specified use without further testing or modification.
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the Customers are responsible for the design and operation of their applications
full data sheet shall prevail. and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
Product specification — The information and data provided in a Product design. It is customer’s sole responsibility to determine whether the NXP
data sheet shall define the specification of the product as agreed between Semiconductors product is suitable and fit for the customer’s applications and
NXP Semiconductors and its customer, unless NXP Semiconductors and products planned, as well as for the planned application and use of
customer have explicitly agreed otherwise in writing. In no event however, customer’s third party customer(s). Customers should provide appropriate
shall an agreement be valid in which the NXP Semiconductors product is design and operating safeguards to minimize the risks associated with their
deemed to offer functions and qualities beyond those described in the applications and products.
Product data sheet.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
16.3 Disclaimers customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Limited warranty and liability — Information in this document is believed to
Semiconductors products in order to avoid a default of the applications and
be accurate and reliable. However, NXP Semiconductors does not give any
the products or of the application or use by customer’s third party
representations or warranties, expressed or implied, as to the accuracy or
customer(s). NXP does not accept any liability in this respect.
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no Limiting values — Stress above one or more limiting values (as defined in
responsibility for the content in this document if provided by an information the Absolute Maximum Ratings System of IEC 60134) will cause permanent
source outside of NXP Semiconductors. damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
In no event shall NXP Semiconductors be liable for any indirect, incidental,
the Recommended operating conditions section (if present) or the
punitive, special or consequential damages (including - without limitation - lost
Characteristics sections of this document is not warranted. Constant or
profits, lost savings, business interruption, costs related to the removal or
repeated exposure to limiting values will permanently and irreversibly affect
replacement of any products or rework charges) whether or not such
the quality and reliability of the device.
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory. Terms and conditions of commercial sale — NXP Semiconductors
Notwithstanding any damages that customer might incur for any reason products are sold subject to the general terms and conditions of commercial
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards sale, as published at http://www.nxp.com/profile/terms, unless otherwise
customer for the products described herein shall be limited in accordance agreed in a valid written individual agreement. In case an individual
with the Terms and conditions of commercial sale of NXP Semiconductors. agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
Right to make changes — NXP Semiconductors reserves the right to make applying the customer’s general terms and conditions with regard to the
changes to information published in this document, including without purchase of NXP Semiconductors products by customer.
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior No offer to sell or license — Nothing in this document may be interpreted or
to the publication hereof. construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
HEF4521B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Export control — This document as well as the item(s) described herein NXP Semiconductors’ specifications such use shall be solely at customer’s
may be subject to export control regulations. Export might require a prior own risk, and (c) customer fully indemnifies NXP Semiconductors for any
authorization from competent authorities. liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
Non-automotive qualified products — Unless this data sheet expressly
standard warranty and NXP Semiconductors’ product specifications.
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested Translations — A non-English (translated) version of a document is for
in accordance with automotive testing or application requirements. NXP reference only. The English version shall prevail in case of any discrepancy
Semiconductors accepts no liability for inclusion and/or use of between the translated and English versions.
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer 16.4 Trademarks
(a) shall use the product without NXP Semiconductors’ warranty of the
Notice: All referenced brands, product names, service names and trademarks
product for such automotive applications, use and specifications, and (b)
are the property of their respective owners.
whenever customer uses the product for automotive applications beyond
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18. Contents
1 General description . . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1
4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
6 Count capacity . . . . . . . . . . . . . . . . . . . . . . . . . . 4
7 Functional test . . . . . . . . . . . . . . . . . . . . . . . . . . 5
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
9 Recommended operating conditions. . . . . . . . 6
10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7
12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
13 Application information. . . . . . . . . . . . . . . . . . 10
14 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13
15 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 14
16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15
16.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15
16.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
16.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
16.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16
17 Contact information. . . . . . . . . . . . . . . . . . . . . 16
18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.