EEPROM

EEPROM (also E2PROM) stands for electrically erasable

programmable read-only memory and is a type of non-volatile
memory used in computers, integrated in microcontrollers for smart
cards and remote keyless systems, and other electronic devices to
store relatively small amounts of data but allowing individual bytes to
be erased and reprogrammed.

EEPROMs are organized as arrays of floating-gate transistors.

EEPROMs can be programmed and erased in-circuit, by applying
special programming signals. Originally, EEPROMs were limited to
single byte operations, which made them slower, but modern
EEPROMs allow multi-byte page operations. An EEPROM has a
limited life for erasing and reprogramming, now reaching a million
operations in modern EEPROMs. In an EEPROM that is frequently
reprogrammed, the life of the EEPROM is an important design
consideration.
STMicro M24C02 (http://www.st.co
Flash memory is a type of EEPROM designed for high speed and high m/resource/en/datasheet/m24c02-f.
density, at the expense of large erase blocks (typically 512 bytes or pdf) I²C serial type EEPROM
larger) and limited number of write cycles (often 10,000). There is no
clear boundary dividing the two, but the term "EEPROM" is generally
used to describe non-volatile memory with small erase blocks (as
small as one byte) and a long lifetime (typically 1,000,000 cycles).
Many microcontrollers include both: flash memory for the firmware,
and a small EEPROM for parameters and history.

As of 2019, flash memory costs much less than byte-programmable

EEPROM and had become the dominant memory type wherever a
system required a significant amount of non-volatile solid-state
storage. EEPROMs, however, are still used on applications that only
require small amounts of storage, like in serial presence detect.

Contents
History
Theoretical basis of FLOTOX structure
Today's EEPROM structure
Security protections
Atmel AT93C46A (http://ww1.microc
Electrical interface hip.com/downloads/en/devicedoc/do
Serial bus devices c0539.pdf) die
Parallel bus devices
Other devices
Failure modes
Related types
Comparison with EPROM and EEPROM/flash
In popular culture
See also
References
External links

History
In the early 1970s, some studies, inventions, and development for
electrically re-programmable non-volatile memories were performed
by various companies and organizations. In 1971, the earliest research
report was presented at the 3rd Conference on Solid State Devices,
Tokyo in Japan by Yasuo Tarui, Yutaka Hayashi, and Kiyoko Nagai at
Electrotechnical Laboratory; a Japanese national research AT90USB162 (http://ww1.microchip.
institute.[1] They fabricated an EEPROM device in 1972,[2] and com/downloads/en/DeviceDoc/7707
continued this study for more than 10 years.[3] These papers have S.pdf) MCU integrates 512 Byte
been repeatedly cited by later papers and patents.[4][5] EEPROM

One of their research studies includes MONOS (metal-oxide-nitride-

oxide-semiconductor) technology,[6] which used Renesas Electronics'
flash memory integrated in single-chip microcontrollers.[7][8][9]

In 1972, a type of electrically re-programmable non-volatile memory

was invented by Fujio Masuoka at Toshiba, who is also known as the
inventor of flash memory.[10] Most of the major semiconductor A cross section of legacy UV-
manufactures, such as Toshiba,[10][4] Sanyo (later, ON EPROM structure
Semiconductor),[11] IBM,[12] Intel,[13][14] NEC (later, Renesas Upper insulator: ONO†
Lower insulator: Tunnel oxide
Electronics),[15] Philips (later, NXP Semiconductors),[16] Siemens
†: Oxide/Nitride/Oxide
(later, Infineon Technologies),[17] Honeywell (later, Atmel),[18] Texas
Instruments,[19] studied, invented, and manufactured some
electrically re-programmable non-volatile devices until 1977.

The theoretical basis of these devices is Avalanche hot-carrier injection. But in general, programmable
memories, including EPROM, of early 1970s had reliability and endurance problems such as the data
retention periods and the number of erase/write cycles.[20]

In 1975, NEC's semiconductor operations unit, later NEC Electronics, currently Renesas Electronics,
applied the trademark name EEPROM® to Japan Patent Office.[21][22] In 1978, this trademark right is
granted and registered as No.1,342,184 in Japan, and still survives as of March 2018.

In February 1977, Eliyahou Harari at Hughes Aircraft Company invented a new EEPROM technology
using Fowler-Nordheim tunnelling through a thin silicon dioxide layer between the floating-gate and the
wafer. Hughes went on to produce this new EEPROM devices.[23] But this patent[24] cited NEC's
EEPROM® invention.[15]

In May 1977, some important research result was disclosed by Fairchild and Siemens. They used SONOS
(polysilicon-oxynitride-nitride-oxide-silicon) structure with thickness of silicon dioxide less than 30 Å,
and SIMOS (stacked-gate injection MOS) structure, respectively, for using Fowler-Nordheim tunnelling
hot-carrier injection.[25][26]

Around 1976 to 1978, Intel's team, including George Perlegos, made some inventions to improve this
tunneling E2PROM technology.[27][28] In 1978, they developed a 16K (2K word × 8) bit Intel 2816 device
with a thin silicon dioxide layer, which was less than 200 Å.[29] In 1980. this structure was publicly
introduced as FLOTOX; floating gate tunnel oxide.[30] The FLOTOX structure improved reliability of
erase/write cycles per byte up to 10,000 times.[31] But this device required additional 20–22V VPP bias
voltage supply for byte erase, except for 5V read operations.[32]:5-86 In 1981, Perlegos and 2 other
members left Intel to form Seeq Technology,[33] which used on-device charge pumps to supply the high
voltages necessary for programming E2PROMs. In 1984, Perlogos left Seeq Technology to found Atmel,
then Seeq Technology was acquired by Atmel.[34][35]

Theoretical basis of FLOTOX structure

As is described in former section, old EEPROMs are based on
Avalanche breakdown-based hot-carrier injection with high reverse
breakdown voltage. But FLOTOX's theoretical basis is Fowler–
Nordheim tunneling hot-carrier injection through a thin silicon
dioxide layer between the floating-gate and the wafer. In other words,
it uses a tunnel junction.[36]

Theoretical basis of the physical phenomenon itself is the same as

today's flash memory. But each FLOTOX structure is in conjunction
with another read-control transistor because the floating gate itself is
just programming and erasing one data bit.[37] Charging mechanism of today's
NOR-type FLASH memory cell
Intel's FLOTOX device structure improved EEPROM's reliability, in
other words, the endurance of the write and erase cycles, and the data
retention period. A material of study for single event effect about
FLOTOX is available.[38]

Today, a detailed academical explanation of FLOTOX device structure

can be found in various materials.[39][40][41]

Today's EEPROM structure

Nowadays, EEPROM is used for embedded microcontrollers as well
as standard EEPROM products. EEPROM still requires a 2-transistor Discharging mechanism of today's
structure per bit to erase a dedicated byte in the memory, while flash NOR-type FLASH memory cell
memory has 1 transistor per bit to erase a region of the
memory.[42]:245, PDF:2

Security protections
Because EEPROM technology is used for some security gadgets, such
as credit card, SIM card, key-less entry, etc., some devices have
security protection mechanisms.[42][43]

Electrical interface
EEPROM devices use a serial or parallel interface for data
input/output.
Inside of a SIM card

Serial bus devices

The common serial interfaces are SPI, I²C, Microwire, UNI/O, and 1-Wire. These use from 1 to 4 device
pins and allow devices to use packages with 8-pins or less.

A typical EEPROM serial protocol consists of three phases: OP-Code Phase, Address Phase and Data
Phase. The OP-Code is usually the first 8-bits input to the serial input pin of the EEPROM device (or with
most I²C devices, is implicit); followed by 8 to 24 bits of addressing depending on the depth of the device,
then the read or write data.

Each EEPROM device typically has its own set of OP-Code instructions mapped to different functions.
Common operations on SPI EEPROM devices are:

Write Enable (WRENAL)

Write Disable (WRDI)
Read Status Register (RDSR)
Write Status Register (WRSR)
Read Data (READ)
Write Data (WRITE)

Other operations supported by some EEPROM devices are:

Program
Sector Erase
Chip Erase commands

Parallel bus devices

Parallel EEPROM devices typically have an 8-bit data bus and an address bus wide enough to cover the
complete memory. Most devices have chip select and write protect pins. Some microcontrollers also have
integrated parallel EEPROM.

Operation of a parallel EEPROM is simple and fast when compared to serial EEPROM, but these devices
are larger due to the higher pin count (28 pins or more) and have been decreasing in popularity in favor of
serial EEPROM or flash.

Other devices

EEPROM memory is used to enable features in other types of products that are not strictly memory
products. Products such as real-time clocks, digital potentiometers, digital temperature sensors, among
others, may have small amounts of EEPROM to store calibration information or other data that needs to
be available in the event of power loss. It was also used on video game cartridges to save game progress
and configurations, before the usage of external and internal flash memories.

Failure modes
There are two limitations of stored information; endurance, and data retention.

During rewrites, the gate oxide in the floating-gate transistors gradually accumulates trapped electrons.
The electric field of the trapped electrons adds to the electrons in the floating gate, lowering the window
between threshold voltages for zeros vs ones. After sufficient number of rewrite cycles, the difference
becomes too small to be recognizable, the cell is stuck in programmed state, and endurance failure occurs.
The manufacturers usually specify the maximum number of rewrites being 1 million or more.[44]

During storage, the electrons injected into the floating gate may drift through the insulator, especially at
increased temperature, and cause charge loss, reverting the cell into erased state. The manufacturers
usually guarantee data retention of 10 years or more.[45]

Related types
Flash memory is a later form of EEPROM. In the industry, there is a convention to reserve the term
EEPROM to byte-wise erasable memories compared to block-wise erasable flash memories. EEPROM
occupies more die area than flash memory for the same capacity, because each cell usually needs a read, a
write, and an erase transistor, while flash memory erase circuits are shared by large blocks of cells (often
512×8).

Newer non-volatile memory technologies such as FeRAM and MRAM are slowly replacing EEPROMs in
some applications, but are expected to remain a small fraction of the EEPROM market for the foreseeable
future.

Comparison with EPROM and EEPROM/flash

The difference between EPROM and EEPROM lies in the way that the memory programs and erases.
EEPROM can be programmed and erased electrically using field electron emission (more commonly
known in the industry as "Fowler–Nordheim tunneling").

EPROMs can't be erased electrically and are programmed via hot carrier injection onto the floating gate.
Erase is via an ultraviolet light source, although in practice many EPROMs are encapsulated in plastic
that is opaque to UV light, making them "one-time programmable".

Most NOR flash memory is a hybrid style—programming is through hot carrier injection and erase is
through Fowler–Nordheim tunneling.

Inject electrons onto Remove electrons

gate from gate
Type Duration Duration/Mode
(mostly interpreted as (mostly interpreted as
Bit=0) Bit=1)
0,1 ... 5 ms, 0,1 ... 5 ms,
EEPROM field electron emission field electron emission
bytewise blockwise
NOR Flash 0,01 ... 1 ms,
hot carrier injection 0,01 ... 1 ms field electron emission
memory blockwise
3 ... 50 ms, 5 ... 30 minutes,
EPROM hot carrier injection UV light
bytewise whole chip

In popular culture
The Stanford Graduate Students in Electrical Engineering (GSEE) has annually hosted a dance (i.e. prom)
called EEPROM[46] since 2012.

See also
Avalanche breakdown
DataFlash
EPROM
Field electron emission § Fowler–Nordheim tunneling
Flash memory
Floating-gate MOSFET
Intel HEX – file format
Programmer (hardware)
Quantum tunnelling
SREC – file format
 Tunnel junction

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External links
Gutmann (2001) papaer: "Data Remanence in Semiconductor Devices" | USENIX (http://static.usenix.
org/legacy/events/sec01/full_papers/gutmann/gutmann_html/)

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