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Assignment No. 4: (SP19: BSEE B05)

This document provides an assignment for a digital systems course. Students are asked to design a memory map for four 2KB RAMs and four 1KB ROMs connected to an 8086 microprocessor using a 3x8 bit decoder. They must specify the address ranges for each memory device, use separate decoders for ROMs and RAMs, give ROMs a lower address than RAMs, and create a 4KB memory hole between the two types of devices. The assignment is worth 35 marks and is due on May 21, 2019.
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0% found this document useful (0 votes)
87 views1 page

Assignment No. 4: (SP19: BSEE B05)

This document provides an assignment for a digital systems course. Students are asked to design a memory map for four 2KB RAMs and four 1KB ROMs connected to an 8086 microprocessor using a 3x8 bit decoder. They must specify the address ranges for each memory device, use separate decoders for ROMs and RAMs, give ROMs a lower address than RAMs, and create a 4KB memory hole between the two types of devices. The assignment is worth 35 marks and is due on May 21, 2019.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Assignment No.

 4 CLO2‐C5/ 
(SP19: BSEE‐B05) PLO3
Due Date: May 21, 2019
Q.1 For an 8086 based digital system, design a memory map for four 
2KB RAMs and four 1KB ROMs to be connected with the 8086 
microprocessor using a 3x8 bit decoder(74LS138) and draw schematic 
diagrams for both types of devices. (Marks: 35)

Note: Make sure to write address range(start/end) for each 
device(ROM, RAM) and use separate decoder for both types of 
devices.
Note: Give ROM lower address than RAM.
Note: Create a memory hole of 4KB between two devices(ROM, RAM).

May 17, 2019 EEE342: Microprocessor Systems and Interfacing 1

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