ISSN (Online) 2278-1021

ISSN (Print) 2319-5940

International Journal of Advanced Research in Computer and Communication Engineering

Vol. 4, Issue 5, May 2015

A Review towards
Single Electron Transistor (SET)
Shilpa Goyal1, Anu Tonk2
M.Tech VLSI Design, Department of Electronics, YMCA UST, Faridabad, India1,2

Abstract: Single-electron transistor (SET) is a key element of current research area of nanotechnology. The aim of this
paper is to discuss about the basic physics of nano electronic device „Single electron transistor [SET]‟ which is capable
of controlling the transport of only one electron. The SET's physical size is quite small and its performance, such as
ON-OFF current ratio, improves as its size is reduced. The SET is therefore thought to be a promising device for large-
scale and low-power integrated circuits. In addition, its current characteristics are unique and much different from those
of conventional transistors. The goal of this paper is to review in brief the basic physics of nano-electronic device
single-electron Transistor [SET] as well as prospective applications. The most promising applications for SET's are
charge-sensing applications.

Keywords: SET, structure of SET, Quantum Dot, coulomb blockade, coulomb staircase

I. INTRODUCTION
In today‟s digital integrated circuit architectures, nanoscale. One of the device introduced to meet this
transistors serve as circuit switches to charge and requirement of downsizing is SET.
discharge capacitors to the required logic voltage
levels[1].A transistor is a three terminal semiconductor Advantages Single electron transistor:
device used to amplify and switch electronic signals and  Low energy consumption
electrical power. It has been observed that the fabrication High charge sensitivity
technology has reached on its limits for the MOS feature  Compact size
size, beyond which further scaling of the channel is High operating speed
becoming impossible. Due to which SET is considered  as Feature of reproducibility
the future of the complex IC fabrication by replacing MOS  Simple principle of operation
technology, having small quantum dot or island, instead  of Improved working when hybrid with MOS transistor is
channel. formed
Single electron transistor (SET) is the most fundamental
three-terminal single electron device (SED) which is The biggest limitation single electron transistors face is in
capable of offering low power consumption and high the area of digital logic. Because of the difficulty in
Operating speed[2][3]. SET is said to be the tiny transistor fabricating atomically identical transistors, there is a huge
with tiniest power consumption. Since the technology variation in when they turn on or off. This variation makes
reaches nano size, the behavior of a nano-electronic single the creation of a large array of single electron transistors
electron transistor (SET) is controlled by the quantum working together impossible. Advances in our ability to
mechanical effects. Analytical modeling of single electron precisely define features in materials with atomic precision
transistor for hybrid CMOS-SET analog IC design is have the potential to allow the use of these transistors for
described in [4]. The rest of this paper is organized as computation.
follows. Section 2 states about the need of single electron
A. WHAT IS A SET?
transistor. Section 3 gives basic description of single
electron transistor. Section 4 presents the structure of The SET is a nano electronic, three-terminal, tunnel
single electron transistors. Section 5 addresses the physics junction device, where a capacitively coupled input
behind single electron transistor. Section 6 presents the voltage modulates a drain-source current serving as the
applications of single electron transistor. Finally, Section 7 amplifier output. A SET is made from two tunnel
summarizes the concluding remarks. junctions that share a common electrode. A tunnel junction
consists of two pieces of metal separated by a very thin
II. NEED OF SET (~1 nm) insulator. The only way for electrons in one of the
According to Moore's Law the number of transistors on metal electrodes to travel to the other electrode is to tunnel
integrated circuits doubles approximately every two years. through the insulator. Since tunneling is a discrete process,
With the downsizing of present silicon IC technology, the electric charge that flows through the tunnel junction
validity of Moore's law has become seemingly limited. flows in multiples of e, the charge of a single electron.
The field of nano electronics aims to enable the continued The idea of SET was demonstrated by Millikan at
realization of this law by using new methods and materials beginning of the century, but in solid state physics it was
to build electronic devices with feature sizes on the not implemented until the late 1980's. The first

Copyright to IJARCCE DOI 10.17148/IJARCCE.2015.4508 36

 ISSN (Online) 2278-1021
ISSN (Print) 2319-5940

International Journal of Advanced Research in Computer and Communication Engineering

Vol. 4, Issue 5, May 2015

observation of the Coulomb blockade and thus single (b) Transfer of many electrons simultaneously through the
electronics was made by Gorter in 1951. channel in MOSFET.

III. STRUCTURE In SET electrons are confined within a small volume and
The single electron transistor is made of a quantum dot communicate with the electrical leads by tunneling. SET
connected through two tunneling junctions to a drain and a turns on and off again every time one electron is added to
source electrode, and through a capacitor to a gate it.The Coulomb energy is given by
electrode. Ec =
Where e is the charge on an electron and C is the total
capacitance of the source and drain junctions and the gate
capacitor. When the bias between the source and drain is
greater than ( across each junction), called the
S Coulomb gap voltage, electrons actively tunnel across the
junctions, resulting in a current through the transistor
independent of the gate bias.
G Q
Tunnel In quantization of electron flow, known as the Coulomb
staircase, the thermal energy of the system must be much
Junction less than the Coulomb energy. As the gate voltage
increases, current increases in quantized chunks. This
D means that in order for a single electron transistor to
Gate operate at room temperature,
Capacitor kT <<
C<< ≈ 3.09×10−18F
Fig 1. Schematic structure of SET
The capacitance C must be much less than 3.09x10-18 F.
Quantum dot ,which is less than 10 nm in diameter, in
The capacitance is related to the distance between the two
which the electrostatic energy can be changed due to
sides of the junction, giving that
removal or addition of a single electron that is greater than
the thermal energy and thus can control the electron
C << 3.09×10−18F ⟹ d < 10 nm
transport into and out of the quantum dot. In other words,
Quantum dot is a small conducting island that contains a
The diameter of the island, d, must be less than 10 nm.
tunable number of electrons occupying discrete orbital.
The transistor mode of operation occurs when the bias
between the source and drain is less than the coulomb gap
voltage. In this case, when the gate bias is increased to the
point corresponding to the maximum slope on the
coulomb staircase (i.e. right before a jump in current), the
configurations on the island with zero or one excess
electron have equal energies, removing the coulomb
barrier and allowing tunneling to occur. This maximum
point occurs when the gate is charged with exactly minus
half an electron. When another minus half an electron
charge is put on the gate, the coulomb barrier is reinstated,
Fig 2. SET circuit
resulting in an oscillation in conductance of the transistor
with maxima at half integer multiples of e and minima at
IV. THEORY OF OPERATION integer multiples of e.

Fig. 4(a) shows the I-V Characteristics for the symmetric

junction circuit of single electron transistor where C1=C2
and R1=R2. It is clear from the IV- characteristics of the
SET that for |V|< e/C, the current is zero. This state is
called Coulomb blockade that suppresses the tunneling of
single electron in case of low bias condition. Now, if the
externally applied junction voltage V is increased up to a
level that is above the threshold voltage by charging
Fig 3. Electron tunneling through the channel (a) one-by- energy, this effect of Coulomb blockade can be removed
one in SET and the current flows. In this situation, the junction
behaves like a resistor. The sequential entrance and

Copyright to IJARCCE DOI 10.17148/IJARCCE.2015.4508 37

 ISSN (Online) 2278-1021
ISSN (Print) 2319-5940

International Journal of Advanced Research in Computer and Communication Engineering

Vol. 4, Issue 5, May 2015

leaving of an electron from one junction to another is are independent of the device materials, they are useful for
generally known as “Correlated tunneling of electrons”. establishing guidelines for the design of SET charge
sensors in lateral QD-SET structures based on a two-
dimensional electron gas.

B. DETECTION OF INFRARED RADIATION

The single-electron transistor can also be used to detect
infrared signals at room temperature. Generally, the
response differs from that the well-known Tien-Gordon
theory of photon-assisted tunneling. In fact, this is based
on the assumption of uncorrelated tunneling events, while
in single-electron systems the electron transfer is typically
correlated [6].
(a) By exciting electrons over an electrically induced
energy barrier, both the range of detectable wavelengths
and the sensitivity of the device can be controlled. The
sensor works when an infrared signal excites conduction-
band electrons in a 25-nm deep electron reservoir. A
silicon insulator channel measuring 40 × 400 nm is placed
next to the reservoir to increase the number of excited
electrons. A poly-silicon lower gate then turns off the
transistor and electrically forms an energy barrier, creating
a storage node on the other side. Electrons with energy
greater than the height of the barrier are injected into the
(b) storage node, where they are read as changes in current
Fig 4. I-V Characteristics for (a) Symmetric junction flowing through the transistor.
circuit (b) Asymmetric junction circuit
C.ULTRASENSITIVE MICROWAVEDETECTOR
Fig. 4(b) represent the I-V Characteristics for a highly
Single Electron Transistor can work an Ultrasensitive
asymmetric junction circuit for R1<<R2.
Microwave Detector; island is weakly coupled to a bias
In this case, the charge carriers i.e. electrons enter through
circuit through two small capacitance tunnel junctions and
one junction and then escape to second junction due to the
a capacitive gate. At low bias voltages and temperatures, a
presence of high resistance. Now, electrons moves from
single quasi-particle may only be introduced to the island
one junction to another very rapidly. Thus this rapid
through photon-assisted tunneling. Once this occurs, the
movement of excess electrons from one junction to
quasi particle is trapped on the island because it takes a
another raises the total charge of the island. If the bias is
relatively long time for this specific quasi particle to
increased, it will tend to increase the population of
tunnel off.
electrons in the island. In this case the IV- Curve
represents Stair-like characteristics, which are commonly While it is trapped, charge is transported through the
referred to as the “Coulomb Staircase”.[5] system two electrons at a time. Since the photon-assisted
transition merely switches the detector current on; this
V. APPLICATIONS device is not limited to one electron tunneled through the
system per absorbed photon. This makes the device an
A. CHARGE SENSOR extremely sensitive and potentially useful detector of
The Single-electron transistors (SETs) are efficient charge microwave radiation.
sensors for reading out spin. To investigate their capacitive
VI. TEMPERATURE STANDARDS
parameters, which are related to the signal-to-noise ratio
(SNR) during quantum bits readout, twin silicon single Theoretical analysis based on the orthodox theory has
QDs were fabricated using a lithographic process on a shown that ΔV= 5.44NkBT/e is surprisingly stable with
silicon-on insulator substrate. Since the configuration and respect to almost any variations of the array parameters
dimensions of the QDs could be determined by direct (with the important exception of a substantial spread in the
imaging, the theoretical capacitive parameters could be junctions‟ resistances), providing a remarkable
compared to the measured values. Good agreement was opportunity to use the arrays for absolute thermometry,
found between the calculated and measured value, which since the fundamental constants are known with high
confirms the validity of the calculation method. The accuracy. Each particular array may give high (1%)
results indicated that decreasing the SET diameter reduces accuracy of within less than one decade of temperature
the capacitive coupling between quantum bits but variations, but for arrays with different island size (and
increases the signal-to-noise ratio for both dc and radio hence different), these ranges may be shifted and overlap.
frequency single shot measurements. Since these results Thus, it is possible to have an absolute standard of

Copyright to IJARCCE DOI 10.17148/IJARCCE.2015.4508 38

 ISSN (Online) 2278-1021
ISSN (Print) 2319-5940

International Journal of Advanced Research in Computer and Communication Engineering

Vol. 4, Issue 5, May 2015

temperature with a very broad (say, two-decade) total Journal of Low Temperature Physics, Vol. 93, Nos. 3/4, 1993,767-
772.
range from several circuits fabricated on a single chip.
[7] Ken Uchida, Jugli Kaga, Ryuji Ohba and Akira Toriumi,
This development is very encouraging, but since all this Programmable Single-Electron Transistor Logic for Future Low-
work is recent, some time is needed to see whether these Power Intelligent LSI: Proposal and Room-Temperature Operation,
new devices will be able to compete with (or even replace) IEEE Transactions on Electron Devices, Vol. 50, No. 7, July 2003.
the established temperature standards.

VII. PROGRAMMABLE SINGLE ELECTRON

TRANSISTOR LOGIC

An SET having non volatile memory function is a key for

the programmable SET logic. The half period phase shift
makes the function of SET complimentary to the
conventional SETs. As a result SETs having non-volatile
memory function have the functionality of both the
conventional (n-MOS like) SETs and the complementary
(p-MOS like) SETs [7]. By utilising this fact the function
of SET circuit can be programmed, on the basis of
function stored by the memory function. The charged
around the QD of the SET namely an SET island shift the
phase of coulomb oscillation, the writing/erasing operation
of memory function which inject/eject charge to/from the
memory node near the SET island, makes it possible to
tune the phase of coulomb oscillation. If the injected
charge is adequate the phase shift is half period of the
coulomb oscillation.

VIII. CONCLUDING REMARKS

Where single electron transistors go from here will be

closely watched over the next ten years. As the first single
electron transistor was fabricated just over two decades
ago, they are decidedly still in their developmental
infancy. Without a doubt, these tiny devices will become a
not uncommon part of our daily lives over the next
decades, either utilizing their ability to measure with
extreme precision the charge on an object, to measure the
state of qubits in quantum computers, or using their
necessarily atomic size to increase the density and
therefore speed of integrated circuits. Many of the
advances that will allow single electron transistors to come
into common use at room temperature with the switching
consistency necessary for integrated circuits will require
advances in the materials being used in these devices.

REFERENCES

[1] Varun Mittal, Basic Introduction to Single Electron Transistor

IJRASET, Vol. 1 Issue I, August 2013, ISSN: 2321-9653.
[2] Geerligs, L. J., Anderegg, V. F., Holweg, P. A. M., Mooij, J.
E.,Pothier, H., Esteve, D., Urbina, C., and Devoret, M. H., Physical
Review Letters, 64,1990, 2691-2694.
[3] Pothier, H., Lafarge, P., Orfila, P. F., Urbina, C., Esteve, D., and
Devoret, M. H., Physica B., 169,1991, 573-574.
[4] S. Mahapatra, V. Vaish, C. Wasshuber, K. Banerjee, and A. M.
Ionescu, Analytical modeling of single electron transistor for hybrid
CMOS-SET analog IC design, IEEE Trans. Electron. Devices, vol.
51, No. 11, Nov 2004, 1772–1782.
[5] Vinay Pratap Singh, Arun Agrawal, Shyam Babu Singh, Analytical
Discussion of Single Electron Transistor (SET), IJSCE, Volume-2,
Issue-3, July 2012, ISSN: 2231-2307.
[6] A.N. Cleand, D. Estene, C. Urbina and M.H. Devoret, An extremely
Low noise Photodetector based on the single electron Transistor ,

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