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EC1 Lab Exp3 PDF

This document provides instructions for an experiment to design and test a common emitter amplifier circuit. The goals are to achieve a voltage gain greater than 100, operate the transistor at 2mA with a 12V supply, and test the transient and frequency responses. Key steps include designing the circuit to meet specifications, measuring the Q point, calculating voltage gain, and determining the frequency response bandwidth by measuring the lower and upper cut-off frequencies.

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Ritu Roy
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131 views2 pages

EC1 Lab Exp3 PDF

This document provides instructions for an experiment to design and test a common emitter amplifier circuit. The goals are to achieve a voltage gain greater than 100, operate the transistor at 2mA with a 12V supply, and test the transient and frequency responses. Key steps include designing the circuit to meet specifications, measuring the Q point, calculating voltage gain, and determining the frequency response bandwidth by measuring the lower and upper cut-off frequencies.

Uploaded by

Ritu Roy
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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EC2093-Electronic Circuits I Lab

Experiment-3:Common Emitter Amplifier

Aim:
1. To design and set up a Common Emitter (CE) amplifier with the following specifications (i) |Voltage
gain| >100 (ii) Minimum input frequency=500Hz with the transistor operating at the Q point
Ic =2mA using a 12V power supply, for a resistive load of 50kΩ.
2. To test the performance of the amplifier by measuring transient and frequency responses.
Circuit Diagram

Procedure
1. Design and set up the circuit in the figure. (The same design design procedure given along with this
sheet may be followed.but it is not mandatory)
2. Note down the values of IC , VCE , VRE , VR1 (without applying input signal) and ensure that required
Q point is obtained. If not find out the reason for shift in Q point and adjust the bias to get the
required Q point.
3. Apply a 10mV (or less) sinusoidal signal of frequency in mid-band region and measure the output
signal amplitude. Hence calculate mid band voltage gain.(If the measured gain is less than that in
design specification, justify it with possible reason(s).)
4. Measure the frequency response (magnitude) of the voltage gain (from 50Hz to 3M Hz, almost the
full frequency range available with the function generator).
5. Find the lower cut off frequency and upper cut off frequency at which the voltage gain falls to √1 of
2
the mid band gain value.
6. Find the input signal amplitude at which output starts getting clipped (for an input frequency in the
mid band region).
7. Measure the input resistance and the output resistance of the circuit.
(a) To measure input resistance connect a a potentiometer (0-10kΩ) to the CE amplifier as shown
in figure

Apply a mid band frequency sinusoidal signal of small amplitude (to ensure transistor operates
in active region). Vary the potentiometer until the amplitude of the signal voltage vx becomes
half of that of input signal vi .Remove the potentiometer and measure its resistance value to get
the input resistance of the circuit. (Make sure that output voltage is undistorted throughout
the measurement).

1
(b) To measure output resistance (without the effect load resistor)

apply a mid band frequency sinusoidal signal of small amplitude (to ensure transistor operates
in active region) at the input. Measure the open circuit output signal amplitude(voc ). Now
connect a potentiometer (0-5kΩ) as load. Vary the potentiometer until the output signal (Vo )
amplitude becomes half of that of open circuit output signal.Remove the potentiometer and
measure its resistance value to get the output resistance of the circuit.
This method is adopted to find input/output resistance just for the ease of measurements (to avoid
ac current measurements). You can use other usual methods to find input/output resistances in
simulation experiments.
8. Apply square waves of 20mv p-p amplitude at a frequency in (i) low frequency band,(ii) mid-band
and (iii)high frequency band in the frequency response, to the input of the same CE amplifier.
9. Observe and note down the output waveform in each case. From the waveforms caculate the upper
and lower cut off frequencies and hence the bandwidth of the amplifier.
10. Remove the capacitor CE and repeat steps 3-9. For input resistance measurement use 0-50kΩ pot.
11. Find out the midband gain−bandwidth product in both cases.
One of the design procedures:
1. Check the data sheet of the NPN transistor (BC547B)IC to find its small signal parameters and other
electrical characteristics.
2. Calculate Rc using the expression for voltage gain Av = −Ic (Rc ||RL )/VT . (Choose Rc as standard
resistor whose value is immediate higher to calculated value to ensure minimum voltage gain)
3. Assume voltage drop across RE (VRE ) as 10% of VCC and design the value of RE from the relation
VRE ≈ IC RC (as β of BC547B is large enough to assume IC ≈ IE )
4. Calculate VCE ≈ VCC − IC (RC + RE ). Hence the operating point of the transistor is defined by
(IC , VCE )
5. Calculate IB = IC /β
6. Calculate voltage drop across R2 , (VR2 = VBE + VRE )
7. Assuming current through R1 (IR1 )as 20IB calculate R1 and R2 .
8. Check whether RT H (= R1 ||R2 ) < 0.1(β + 1)RE (for bias stability). If not go to step 7, increase IR2
and redesign R1 and R2 to meet this condition.
9. Make sure that with (available) standard resistors used in the circuit, proper operating point can be
obtained.
10. Calculate CC1 such that at an operating frequency of 500Hz , the magnitude of impedance due to
CC1 is |XCC1 | < Rin /10 where Rin = R1 ||R2 ||hie (Use the relation hie ≈ β/gm )
11. Calculate CC2 such that at an operating frequency of 500Hz, the magnitude of impedance due to
CC2 is |XCC2 | < RL /10 where RL = 50kΩ
12. Calculate CE such that at an operating frequency of 500Hz, the magnitude of impedance due to CE
is |XCE | < RE /10
We follow the above method for the design of capacitor values as the low frequency response is not yet dis-
cussed in theory class.To get the exact lower cut off frequency, the design of capacitor values is to be done
by the proper placement of (low frequency) poles and zeros of the circuit.

You may follow any other design procedure, provided the circuit meets the specifications given.

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