Littleboard 620 Single Board Computer Reference Manual: P/N 5001832A Revision B
Littleboard 620 Single Board Computer Reference Manual: P/N 5001832A Revision B
NOTICE
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translated into any language or computer language, in any form or by any means, electronic, mechanical,
magnetic, optical, chemical, manual, or otherwise, without the prior written permission of Ampro
Computers, Incorporated.
DISCLAIMER
Ampro Computers, Incorporated makes no representations or warranties with respect to the contents of this
manual or of the associated Ampro products, and specifically disclaims any implied warranties of
merchantability or fitness for any particular purpose. Ampro shall under no circumstances be liable for
incidental or consequential damages or related expenses resulting from the use of this product, even if it has
been notified of the possibility of such damages. Ampro reserves the right to revise this publication from
time to time without obligation to notify any person of such revisions. If errors are found, please contact
Ampro at the address listed below on the Notice page of this document.
TRADEMARKS
Ampro and the Ampro logo are registered trademarks, and CoreModule, Little Board, LittleBoard,
MightyBoard, MightySystem, MiniModule, ReadyBoard, ReadyBox, ReadyPanel, ReadySystem,
RuffSystem are trademarks of Ampro Computers, Inc. All other marks are the property of their respective
companies.
REVISION HISTORY
Audience Assumptions
This reference manual is for the person who designs computer related equipment, including but not limited
to hardware and software design and implementation of the same. Ampro Computers, Inc. assumes you are
qualified in designing and implementing your hardware and its related software into your prototype
computer equipment.
List of Figures
Figure 2-1. Stacking PC/104 Modules with the LittleBoard 620 ................................................ 4
Figure 2-2. Functional Block Diagram ....................................................................................... 7
Figure 2-3. Component Location (Top view) ............................................................................. 9
Figure 2-4. Component Locations (Bottom view) .................................................................... 10
Figure 2-5. Connector Pin-Out Identification ........................................................................... 11
Figure 2-6. Connector Locations (Top view)............................................................................ 12
Figure 2-7. LittleBoard 620 Dimensions (Top view) ................................................................ 15
Figure 3-1. RS485 Serial Port Implementation ........................................................................ 21
Figure 3-2. Oops! Jumper Connection..................................................................................... 34
Figure 3-3. Hot Cable Jumper ................................................................................................. 34
List of Tables
Table 2-1. Major Components Descriptions and Functions...................................................... 8
Table 2-2. Header Descriptions .............................................................................................. 10
Table 2-3. Jumper Settings .................................................................................................... 13
Table 2-4. Weight and Footprint Dimensions ......................................................................... 13
Table 2-5. Environmental Requirements ................................................................................ 14
Table 2-6. Power Supply Requirements ................................................................................. 14
Table 3-1. Interrupt Channel Assignments ............................................................................. 18
Table 3-2. Memory Map ......................................................................................................... 18
Table 3-3. I/O Address Map ................................................................................................... 19
Table 3-4. Parallel Interface Pin/Signal Descriptions (J16) .................................................... 20
Table 3-5. Serial A Interface Pin/Signal Descriptions (J12).................................................... 22
Table 3-6. Serial B Interface Pin/Signal Descriptions (J11).................................................... 23
Table 3-7. Utility 1 Interface Pin/Signal Descriptions (J15) .................................................... 25
Table 3-8. SMBus Reserved Addresses ................................................................................ 26
Table 3-9. Utility 2 Interface Pin/Signal Descriptions (J13) .................................................... 26
Table 3-10. Audio Interface Pin/Signal Descriptions (J9) ......................................................... 27
Table 3-11. USB 0 & 1 Interface Pin/Signal Descriptions (J29A/B).......................................... 28
Table 3-12. USB 2 & 3 Interface Pin/Signal Descriptions (J30A/B).......................................... 29
Table 3-13. TTL Flat Panel Interface Pin/Signal Descriptions (J18) .........................................29
Table 3-14. LVDS Interface Pin/Signal Descriptions (J26) .......................................................32
Table 3-15. User GPIO Signals Pin/Signal Descriptions (J14) .................................................33
Table 3-16. Power In Pin/Signal Descriptions (J19)..................................................................35
Table 3-17. Power On Pin/Signal Descriptions (J6)..................................................................36
Table 3-18. Power-On Button Interface Pin/Signal Descriptions (J32) .....................................36
Table A-1. Technical Support Contact Information..................................................................39
References
The following list of references may be helpful for you to complete your design successfully. Most of these
references are also available on the Ampro web site in the InfoCenter. The InfoCenter was created for
embedded system developers to share Ampro’s knowledge, insight, and expertise.
Specifications:
• EBX Spec Revision 2.0, March 1 2005
For the latest version of the EBX specifications, contact the PC/104 Consortium, at:
Web site: http://www.pc104.org
• PC/104 Spec Revision 2.5, November 2003
• PC/104-Plus Spec Revision 2, November 2003
For latest revision of the PC/104 specifications, contact the PC/104 Consortium, at:
Web site: http://www.pc104.org
• PCI 2.2 Compliant Specifications
For latest revision of the PCI specifications, contact the PCI Special Interest Group Office at:
Web site: http://www.pcisig.com
Chip specifications used on the LittleBoard 620:
• AMD, Inc., Geode LX 800 processor (with integrated Northbridge)
Web site: http://www.amd.com/files/connectivitysolutions/geode/geode_lx/
33234F_LX_databook.pdf
NOTE If you are unable to locate the datasheets using the links provided, copy the
whole link into your web address bar and press enter. Otherwise, go to the
manufacturer’s web site where you should be able to perform a search using the
chip datasheet number or name listed, including the extension, htm, pdf, etc.
EBX Architecture
The “Embedded Board, eXpandable” (EBX) standard is the result of a collaboration between industry
leaders, Motorola and Ampro, to unify the embedded computing industry on a full featured embedded
single-board computer (SBC) standard. The EBX standard principally defines physical size, mounting hole
pattern, and power connector locations. It does not specify processor type or electrical characteristics. There
are recommended connector placements for serial/parallel, Ethernet, graphics, and memory expansion.
Derived from the Ampro LittleBoard form-factor originated in 1984, EBX combines a standard footprint
with open interfaces. The EBX form-factor is small enough for deeply embedded applications, yet large
enough to contain the functions of a fully embedded SBC (single board computer) including CPU, memory,
mass storage interfaces, display controller, serial/parallel ports, today’s advanced operating systems, and
other system functions. This embedded SBC standard ensures that embedded system OEMs can standardize
their designs and that embedded computing solutions can be designed into space constrained environments
with off-the-shelf components.
The EBX standard boasts highly flexible and adaptable system expansion, allowing easy and modular
addition of functions such as additional USB 2.0 ports, Firewire or wireless networking not usually
contained in standard product offerings. The EBX system expansion is based on popular existing industry
standards, PC/104™ and PC/104-Plus™. PC/104 places the ISA bus on compact 3.6" x 3.8" modules with
self-stacking capability. PC/104-Plus adds the power of a PCI bus to PC/104 while retaining the basic form-
factor. Using PC/104 expansion cards, the PC/104 standard offers access to PC cards from the mobile and
handheld computing markets.
The EBX standard integrates all these off-the-shelf standards into a highly embeddable SBC form-factor.
EBX supports the legacy of PC/104, hosting the wide variety of embedded system oriented expansion
modules from hundreds of companies worldwide. PC/104 brings the advantages of the latest portable and
mobile system expansion technologies to embedded applications. See Figure 2-1 on page 4.
The EBX standard also brings stability to the embedded board market and offers OEMs assurance that a
wide range of products will be available from multiple sources – now and in the future. The EBX standard is
open to continuing technology advancements since it is processor independent. It creates opportunity for
economies of scale in chassis, power supply, and peripheral devices.
The EBX specification is freely available to all interested. For further technical information on the EBX
standard, go to the PC/104 Consortium web site at www.pc104.org.
LB620stackthru
0.6 inch spacers (4) Little Board 620
Product Description
The LittleBoard 620 is an exceptionally high integration, high performance, rugged, and high quality single-
board system, which contains all the component subsystems of a PC motherboard plus the equivalent of up
to 3 expansion boards. Based on the AMD Geode™ LX 800 processor, the LittleBoard 620 provides
designers a complete, high performance embedded processor that conforms to the EBX V2.0 specification.
Each LittleBoard 620 incorporates an AMD Geode CS5536 chipset for the Graphics and Memory Hub (the
Northbridge integrated in the CPU) and the I/O Hub (Southbridge) controllers. The Winbond Electronics
Corp. Super I/O controller, W83627HF, adds I/O functions. Together, the AMD and Winbond chips provide
four serial ports, a floppy and EPP/ECP parallel ports, four USB 2.0 ports, PS/2 keyboard and mouse
interfaces, an Ultra/DMA 33/66 IDE controller supporting two IDE drives and one compact flash socket, a
graphics controller, which provides CRT and LVDS/TTL flat panel video interfaces, and an audio AC’97
CODEC on the board. The LittleBoard 620 also supports two 10/100BaseT Ethernet interfaces, and up to 1
GB of non-ECC DDR RAM in a single 184-pin DIMM socket. To provide the ISA bus on the board through
the PC/104 connector, an ITE, IT8888F, PCI-to-ISA Bridge is included.
The LittleBoard 620 can be expanded through the PC/104 and PC/104-Plus expansion for additional system
functions, as these buses offer compact, self-stacking, modular expandability. The PC/104 and PC/104-Plus
buses are the embedded system version of the signal set provided on a desktop PC's ISA and PCI buses at
8MHz and 33MHz clock speeds, respectively.
Among the many embedded-PC enhancements on the LittleBoard 620 that ensure embedded system
operation and application versatility are a watchdog timer, serial console support, battery-free boot,
Compact Flash disk, and OEM logo customization (Splash Screen).
The LittleBoard 620 is particularly well suited to either embedded or portable applications and meets the
size, power consumption, temperature range, quality, and reliability demands of embedded system
applications. It can be stacked with Ampro MiniModules™ or other PC/104-compliant expansion boards or
it can be used as a powerful computing engine.
Board Features
• CPU features
♦ Provides a 500 MHz AMD Geode LX800 processor
♦ 64-bit DDR memory interface up to 400 MHZ
• Memory
♦ Single standard 184-pin DDR DIMM slot
♦ Supports +2.5V DDR RAM up to 1GB
Block Diagram
Figure 2-2 shows the functional components of the board.
TFT
Connector
CRT
Connector
AMD Geode, DDR1
LVDS Video LX800 CPU DIMM
Transmitter (Integrated
Northbridge)
LVDS
Connector
Ethernet
Magnetics-
Controller
Mini PCI RJ45
82551QM
Connector
PCI Bus Ethernet
PC/104-Plus Magnetics-
Connector Controller RJ45
82551ER
LPC Bus
RS232/ ROM
Super I/O - 1 Super I/O - 2 BIOS
422/485
W83627HG W83627HG SST49LF004B
Transceiver
FWH
LB620Blkdiagm
U3 U1
U11 U9
U51
U16 U14
Header Definitions
Table 2-2 describes the headers shown in Figure 2-6 on page 12. All I/O connectors use 0.100" pin
(2.54mm) spacing unless otherwise indicated.
19 9 7531 10 54 3 21
20-pin, two rows, 20-pin, two rows,
Odd/Even, (1, 2) Or Consecutive, (1, 11)
20 10 8 6 4 2 20 15 11
Figure 2-5. Connector Pin-Out Identification
JP10
JP11
JP1
J9 J30 J29 J26
J3
J18
J8
AB JP3
JP2
ABCD
DC
DIMM1
JP9
JP12
JP8
J1 J5 J2
BAT1
J19
J6
Board
JP19
JP7
JP6
JP5
JP4
Grounding
Pad
CAUTION The two Ethernet ports share a common ground (transformer center tap),
that is floating until you determine how the common ground is
connected. The grounding holes (8) of the LittleBoard 620 are connected
to ground potential (return) of the DC power supply connected to the
board through J19.
NOTE Pin-1 is shown as a black pin (square or round) in all connectors and jumpers in
all illustrations.
Jumper Definitions
Table 2-3 describes the jumpers shown in Figure 2-6.
Table 2-3. Jumper Settings
NOTE Only the jumpers listed above are populated on the board. Jumpers or shunts use
2mm spacing. A jumper that is removed may be placed on one of the jumper pins for
safe keeping.
Specifications
Physical Specifications
Table 2-4 gives the physical dimensions of the board.
Table 2-4. Weight and Footprint Dimensions
Environmental Specifications
Table 2-5 provides the most efficient operating and storage condition ranges required for this board.
Table 2-5. Environmental Requirements
Power Specifications
Table 2-6 shows the power requirements for the LittleBoard 620.
Table 2-6. Power Supply Requirements
Operating conditions:
• In-rush operating conditions include video, 512MB DDR RAM, and power.
• Idle operating conditions include the in-rush conditions as well as an I/O board, one IDE hard drive with
Windows XP SP2, floppy, keyboard, and mouse.
• *BIT = Burn-In-Test. Operating conditions include idle conditions as well as four serial loop-backs, one
parallel loop-back, one USB Jump Drive, one on-board Compact Flash drive with 64MB Compact
Flash, two Ethernet connections, two USB Compact Flash readers with 64MB Compact Flash, one
external-power USB CD-ROM.
Thermal/Cooling Requirements
The LittleBoard 620 is designed to operate at the maximum speed of the 500 MHz CPU without heatsinks or
fans.
Mechanical Specifications
Figure 2-7 shows the top view of the LittleBoard 620 with the mechanical mounting dimensions.
0.20
0
2.65
5.80
7.22
7.60
7.80
0.20
0
5.55
5.35
Overview
This chapter discusses the following features of the connectors:
• Interrupt Channel Assignments
• Memory Map
• I/O Address Map
• Floppy Interface
• Serial Interfaces
• Parallel Interface
• Utility Interfaces
♦ Keyboard
♦ Mouse
♦ Battery
♦ Reset Switch
♦ Speaker
♦ SMBus
• Audio Interface
• USB Interfaces
• CRT/TTL/LVDS Video Interfaces
• Miscellaneous
♦ User GPIO Signals
♦ Time of Day/RTC
♦ Temperature Monitoring
♦ Oops! Jumper (BIOS recovery)
♦ Serial Console
♦ Watchdog timer
• Power Interface
NOTE Ampro Computers, Inc. only supports the features/options tested and listed in
this manual. The main integrated circuits (chips) used in the LittleBoard 620
may provide more features or options than are listed for the LittleBoard 620, but
some of these chip features/options are not supported on the board and may not
function as specified in the chip documentation.
NOTE The IRQs for the Ethernet, Video, USB, and PCI are automatically assigned by the
BIOS Plug and Play logic. Local IRQs assigned during initialization can not be used
by external devices.
Memory Map
Table 3-2 provides the common PC/AT memory allocations. Memory below 000500h is used by the BIOS.
Note: The shaded area denotes power or ground. The signals marked with * = Negative true logic.
Serial Interfaces
The LittleBoard 620 supports 4 independent serial ports, using two separate chips. The Super I/O - 1
controller (W83627HG) provides serial ports 1 and 2 through the Serial A connector (J12) and the Super I/O
- 2 controller (W83627HG) provides serial ports 3 and 4 through Serial B connector (J11). The four serial
ports support the following features:
• Four individual 16550-compatible UARTs
• Programmable word length, stop bits and parity
• 16-bit programmable baud rate generator
• Interrupt generator
• Loop-back mode
• Four individual 16-bit FIFOs
• Serial A Interface (J12)
♦ Serial Port 1 (COM1) supports RS232 and RS485/RS422 and full modem support
♦ Serial Port 2 (COM2) supports RS232 and RS485/RS422 and full modem support
• Serial B Interface (J11)
♦ Serial Port 3 (COM3) supports RS232 and full modem support
♦ Serial Port 4 (COM4) supports RS232 and full modem support
NOTE The RS232 and RS485/RS422 modes are selected in BIOS Setup Utility under
the submenu, Super I/O Configuration in the Advanced menu screen for Serial
ports 1 (COM1) and 2 (COM2). However, the RS232 mode is the default
(Standard) for any serial port.
RS485 mode termination is selected with jumper pins JP4 and JP6, pins 1-2
(COM1), and JP5 and JP7, pins 1-2 (COM2), when the RS485 mode is selected
in BIOS Setup Utility. Refer to Table 2-3 on page 13 for more information.
To implement the two-wire RS485 mode on any serial port, you must tie the equivalent pins together for
each port.
For example, on Serial Port 1, tie pin 3 to 5 and pin 4 to 6 at the Serial A interface header (J12) as shown in
Figure 3-1. As an alternate, tie pin 2 to 3 and pin 7 to 8 at the DB9 serial connector for Serial Port 1 as shown
in Figure 3-1. Refer also to the following tables for the specific pins for the other ports on each connector.
The RS422 mode uses a four-wire interface and does not need any pins tied together, but you must select
RS485 in BIOS Setup.
19 9 7531 1 2 3 4 5
Serial Interface Standard DB9 Serial
for Serial Ports 1-4 Or Port Connector (Female)
(or COM1-4 Ports) Rear View
Top View 20 10 8 6 4 2
6 7 8 9
Table 3-5 gives the pins and corresponding signals for the Serial A interface connector (Serial Ports 1 and 2)
and Table 3-6 gives the pins and corresponding signals for the Serial B interface connector (Serial Ports 3
and 4).
Both Serial A and B headers have 20 pins, 2 rows, odd/even, (1, 2), with 2.54mm pin spacing.
Utility Interfaces
The Utility interfaces consist of two connectors that provide the standard interface signals for the following
devices:
• Utility 1
♦ Keyboard
♦ External battery connection
♦ Reset Switch
♦ Speaker
• Utility 2
♦ PS/2 Mouse
♦ SMBus signals
♦ Power button signal
Utility 1 Interface
The Utility 1 (J15) interface uses a 16-pin connector and provides the various interface signals to an external
I/O board with external connections for the respective connectors such as, keyboard, speaker, etc. Table 3-7
provides the pin-outs and interface signals for Utility 1 interface and has 16 pins, 2 rows, odd/even, (1, 2)
with 2.54mm pin spacing.
• Keyboard
• Battery
• Reset Switch
• Speaker
Keyboard Interface
The signal lines for a PS/2 keyboard are provided through the Utility 1 interface, which is also fully PC/AT
compatible.
External Battery
An external battery input connection is provided through a Utility 1 interface for the Real Time Clock’s
operation in the event the on-board battery is not used.
Reset Switch
The signal lines for a reset switch are provided through the Utility 1 interface. See Table 3-7.
Speaker
The signal lines for a speaker port with 0.1-watt drive are provided through a Utility 1 interface (J15).
Table 3-7. Utility 1 Interface Pin/Signal Descriptions (J15)
Note: The shaded area denotes power or ground. The signals marked with * = Negative true logic.
Utility 2 Interface
The Utility 2 (J13) interface consists of a 24-pin header used to interface various signals to the external
board with external connections, or directly to the respective connector such as the mouse and power button
etc. Table 3-9 on page 26 provides the pin-outs and interface signals for the Utility 2 interface. The J13
connector has 24 pins, 2 rows, odd/even (1, 2) with 0.100" pin spacing.
• SMBus signals
• PS/2 Mouse signals
• Power button signal
Audio Interface
The audio solution on the LittleBoard 620 is provided by the (Southbridge) I/O Hub (CS5536) and the on-
board Audio CODEC (ALC203). These two chips use a digital interface to communicate between the two,
which is defined by AC’97 and is revision 2.3 compliant. The input or output signals for the audio interface
go through the 16-pin connector (J9) to an external cable and/or board, which has the respective audio
connections. The PC Beep Speaker signal from the I/O Hub is also fed to the on board Audio CODEC to
provide a PC Beep signal for the stereo line out connections.
Audio CODEC (ALC203) features
• AC’97 Rev 2.3 compliant
• 18-bit full duplex performance
• Independent variable sampling rate
• Stereo (Left and Right) Line In
• Stereo (Left and Right) Line Out
• Microphone (Mono) In
• PC “Beep” speaker signal is also fed to the CODEC for the Line Out (Left and Right) channels
Table 3-10 describes the Audio interface pin/signals on 16-pins, 2 rows, odd/even (1, 2) with
2 mm pin spacing.
Table 3-10. Audio Interface Pin/Signal Descriptions (J9)
USB Interfaces
The I/O Hub (CS5536) provides the USB solution for both OHCI controller (legacy) and EHCI controller
(USB 2.0) support. The I/O Hub (Southbridge) contains port-routing logic that determines which controller
(OHCI or EHCI) handles the USB data signals. Two 10-pin headers, J29 and J30, provide four USB ports.
Video Interfaces
The Graphics and Memory Hub (Northbridge)—integrated in the Geode LX processor—provides the
graphics control and video signals to the traditional glass CRT monitors and the LVDS flat panel displays.
The chip features are listed below:
• Supports 2D graphics with extensive set of instructions including:
♦ BLT operations
♦ Hardware video up/down scalar
♦ Legacy RGB mode
CRT features:
• Provide an integrated 350 MHz, 24-bit RAMDAC to drive a progressive scan analog monitor, and
outputs to three 8-bit DACs provide the R, G, and B signals to the monitor.
• Support resolutions up to 1920 x 1440.
• Support a maximum allowable video frame buffer size of 254 MB UMA (Unified Memory
Architecture).
Table 3-13. TTL Flat Panel Interface Pin/Signal Descriptions (J18) (Continued)
3 NC Not connected
4 NC Not connected
5 NC Not connected
6 NC Not connected
7 NC Not connected
8 NC Not connected
9 NC Not connected
10 NC Not connected
11 NC Not connected
12 NC Not connected
13 NC Not connected
14 FP21 Flat Panel Data Output, R5
15 FP23 Flat Panel Data Output, R7
16 FP22 Flat Panel Data Output, R6
17 FP16 Flat Panel Data Output, R0
18 FP20 Flat Panel Data Output, R4
19 FP17 Flat Panel Data Output, R1
20 FP18 Flat Panel Data Output, R2
21 FP19 Flat Panel Data Output, R3
22 FP14 Flat Panel Data Output, G6
23 FP13 Flat Panel Data Output, G5
24 FP12 Flat Panel Data Output, G4
25 FP15 Flat Panel Data Output, G7
26 FP11 Flat Panel Data Output, G3
27 FP7 Flat Panel Data Output, B7
28 FP10 Flat Panel Data Output, G2
29, 30 VCC_TTL Jumper (JP10) determines voltage (pins 1-2 = +3.3V or pins 2-3 =
+5V).
31 FP9 Flat Panel Data Output, G1
32 FP8 Flat Panel Data Output, G0
33 FP4 Flat Panel Data Output, B4
34 FP6 Flat Panel Data Output, B6
35 FP3 Flat Panel Data Output, B3
36 FP5 Flat Panel Data Output, B5
37 FP2 Flat Panel Data Output, B2
38 FP1 Flat Panel Data Output, B1
39 FPDEN Flat Panel Data Enable – This signal to settle the horizontal display
position.
40 FP0 Flat Panel Data Output, B0
41 FPCLKS Flat Panel Shift Clock
42 DISPEN Reserved
Table 3-13. TTL Flat Panel Interface Pin/Signal Descriptions (J18) (Continued)
43 ENVDD Flat Panel Enable VDD – This is power sequencing output for LCD
driver.
44 FPVS Flat Panel VSync (FLM) – This signal is digital monitor equivalent of
VSYNC.
45 DISPEN Flat Panel Enable VEE – This signal is used for power sequencing.
46 FPHS Flat Panel HSync (LP) – This signal is the digital monitor equivalent of
HSYNC.
47, 48 GND Ground
49, 50 VCC_BKLT Jumper (JP11) determines back light inverter voltage (pins 1-2 = +5V,
or pins 2-3 = +12V.)
Note: The +12V voltage is supplied externally from the AT/
ATX power supply input connector.
LVDS Interface
Table 3-14 describes the signals of the LVDS interface with 30 pins, 2 rows, odd/even, (1, 2) and 2mm pin
spacing.
Table 3-14. LVDS Interface Pin/Signal Descriptions (J26)
Channel 2
13 NC Not connected 0
14 NC Not connected
15 NC Not connected
16 LCD_EN LCD Enable
17 LVDSP_Clk+ Data Positive Output Clk
18 LVDSN_Clk- Data Negative Output
19 LVDSA_Y3+ Data Positive Output 3
20 LVDSA_Y3- Data Negative Output
21 LVDSA_Y2+ Data Positive Output 2
22 LVDSA_Y2- Data Negative Output
23 LVDSA_Y1+ Data Positive Output 1
24 LVDSA_Y1- Data Negative Output
Channel 1
Miscellaneous
User GPIO Signals
The LittleBoard 620 provides 22 GPIO pins for custom use, and the signals are routed to the J14 connector.
Ampro has provided sample applications showing how to use the GPIO pins in the Miscellaneous Source
Code Examples on the LittleBoard 620 Support Software DVD.
For more information about the GPIO pin operation, refer to the datasheet specifications or Programming
Manual for the Super I/O (W83627HG) controller at:
http://www.winbond-usa.com/products/winbond_products/pdfs/PCIC/W83627HF_F_HG_Ga.pdf
Table 3-15 lists the GPIO pin/signals on a 26-pin, 2 rows, odd/even (1, 2) with 2 mm pin spacing.
Table 3-15. User GPIO Signals Pin/Signal Descriptions (J14)
Temperature Monitoring
The Super I/O controller (W83627HG) performs the CPU temperature monitoring function and receives
inputs directly from the thermal diode in the CPU.
19 9 7531 1 2 3 4 5
Serial A Interface (J12) Standard DB9 Serial
for Serial Port 1 Or Port Connector (Female)
(or COM1 Port) Rear View
Top View 20 10 8 6 4 2
6 7 8 9
Serial Console
The LittleBoard 620 supports the serial console (or console redirection) feature. This I/O function is
provided by an ANSI-compatible serial terminal, or an equivalent terminal emulation software running on
another system. This can be very useful when setting up the BIOS on a production line for systems that are
not connected to a keyboard and display.
1 2 3 4 5
LB620Hotcable
Watchdog Timer
The watchdog timer (WDT) restarts the system if a mishap occurs, ensuring proper start-up after the
interruption. Possible problems include failure to boot properly, the application software’s loss of control,
failure of an interface device, unexpected conditions on the bus, or other hardware or software malfunctions.
The WDT (watchdog timer) can be used both during the boot process and during normal system operation.
• During the Boot process – If the operating system fails to boot in the time interval set in the BIOS, the
system will reset.
Enable the WDT in Boot Settings Configuration of BIOS Setup. Set the WDT for a time-out interval in
seconds, between 1 and 255, in one-second increments in the Boot Setting Configuration screen. Ensure
you allow enough time for the boot process to complete and for the OS to boot. The OS or application
must tickle the WDT as soon as it comes up. This can be done by accessing the hardware directly or
through a BIOS call.
• During System Operation – An application can set up the WDT hardware through a BIOS call, or by
accessing the hardware directly. Some Ampro Board Support Packages provide an API interface to the
WDT. The application must tickle the WDT in the time set when the WDT is initialized or the system
will be reset. You can use a BIOS call to tickle the WDT or access the hardware directly.
The BIOS implements interrupt 15 function 0C3h to manipulate the WDT.
• Watchdog Code examples – Ampro has provided source code examples on the LittleBoard 620 Support
Software DVD illustrating how to control the WDT. The code examples can be easily copied to your
development environment to compile and test the examples, or make any desired changes before
compiling. Refer to the WDT Readme file on the Support Software DVD.
Power Interfaces
Power In
The LittleBoard 620 uses five separate voltages on the board, but only one of the voltages is provided
externally (+5 volts) through the external header, which uses a 7-pin vertical header with 0.156" (3.96mm)
spacing. All the onboard voltages are derived from the externally supplied +5 volts DC +/- 5%. The
onboard voltages include the CPU core voltages as well as the other voltages used on the board.
Table 3-16 lists the signals for power supply input with 7 pins, single row, and 3.96mm pin spacing.
Table 3-16. Power In Pin/Signal Descriptions (J19)
Note: The shaded areas denote power or ground. The +12V and +3.3V on the Power In header (J19) are
used for the PCI, ISA bus, TTL, and LVDS functions and are supplied externally and not
generated on the LittleBoard 620.
Power On
The signals on this header allow the ATX power supply to be turned off (soft off) from the LittleBoard 620
by operating system (OS) control. However, if you use a non-ATX power supply you will not have the soft
off feature normally provided by ATX power supplies.
Table 3-17 lists the signals for the J6 Power On header with 3 pins, single row, and 2.54mm pin spacing.
Table 3-17. Power On Pin/Signal Descriptions (J6)
Note: The shaded areas denote power or ground. The signals marked with * = Negative true logic. **The
power supply must be capable of delivering 2 amps for 5VSB.
Power-On Button
A Power-On Button signal is provided by connecting ground to pin-1 on this header (J32). A Reset Switch
signal is provided by connecting ground to pin 3 on the this header.
Introduction
This section assumes the user is familiar with BIOS Setup and does not attempt to describe the inner
workings of BIOS functions. Refer to the appropriate PC reference manuals for information about the on-
board, ROM-BIOS software interface. If Ampro has added to or modified the standard functions, these
functions will be described.
NOTE If the setting for Memory Test is set to Fast, you may not see this prompt appear
on screen if the monitor is too slow to display it on start up. If this happens, press
the <Del> key early in the boot sequence to enter BIOS Setup.
3. Use the <Enter> key to select the screen menus listed in the Opening BIOS screen.
4. Follow the instructions at the bottom of each screen to navigate through the selections and modify any
settings.
10. Use the <Enter> key to select the screen menus listed in the Opening BIOS screen.
NOTE The serial console port is not hardware protected, and is not listed in the COM table
within BIOS Setup Utility. Diagnostic software that probes hardware addresses may
cause a loss or failure of the serial console functions.
NOTE For procedures on loading custom images, see the logo screen utility document
available on the Ampro web site.
• Bitmap image
♦ 16-Color, 640x480 pixels
♦ 256-Color, 640x480 pixels
• JPG image
♦ 16-Color, 640x480 pixels
♦ 256-Color, 800x600 pixels
♦ 256-Color, 1024x768 pixels
• PCX image
♦ 256-Color, 640x480 pixels
• A file size of not larger than the sample image
NOTE For procedures on loading custom images, see the OEM Logo Utility
document available on the Ampro web site.