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FET Amplifier Sheet: Suez Canal University Faculty of Engineering Ismailia Campus Department of Electrical Engineering

This document contains 8 questions regarding FET amplifier circuits. The questions involve determining various circuit parameters such as drain current, voltage gain, input resistance, and more. Circuit analysis is required using given specifications like transistor properties, bias voltages and currents. Simulation of some of the circuits using Multisim is also requested to verify the mathematical analysis.

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Ali Ahmed
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90 views2 pages

FET Amplifier Sheet: Suez Canal University Faculty of Engineering Ismailia Campus Department of Electrical Engineering

This document contains 8 questions regarding FET amplifier circuits. The questions involve determining various circuit parameters such as drain current, voltage gain, input resistance, and more. Circuit analysis is required using given specifications like transistor properties, bias voltages and currents. Simulation of some of the circuits using Multisim is also requested to verify the mathematical analysis.

Uploaded by

Ali Ahmed
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Suez Canal University

Faculty of Engineering Department of Electrical


Ismailia Campus Engineering

FET Amplifier Sheet

Q1: For the circuit shown in fig.1

1- Draw the dc and ac equivalent circuits for the


amplifier. IDSS=10mA & VGSS=-5V
2- Determine the drain current given that The Q-
point is centered.
3- What is the gain of the amplifier if C2 is
removed?
4- A 4.7 KΩ resistor is connected in parallel with
RL. What is the voltage gain?

Fig 1: Question 1

Q2: For the circuit shown in fig.2

1- For the common-source amplifier, determine , ,


and , for a centered Q-point. = 9 mA, and
(off) = -3 V
2- If a 10 mV rms signal is applied to the input of the
amplifier, what is the rms value of the output signal?

Fig 2: Question 2

Q3: For the circuit shown in fig.3 Q4: For the circuit shown in fig.4
1- Determine , , and for the amplifier. Determine seen by the signal source.
ID(on) = 18 mA at = 10 V, (th) = 2.5 V, = 25 nA at = -15 V.
and gm = 3000 µS.

Fig 3 : Question 3 Fig 4 : Question 4


Q5: For the circuit shown in fig.5

1- For the source-follower, determine the voltage gain


and input resistance. = 50 pA at = -15 V
and gm = 5500 µS.
2- If the JFET is replaced with one having a gm of
3000 µS, what is the gain and the input resistance
with all other conditions the same?

Fig 5 : Question 5

Q6: For the circuit shown in fig.6

1- Find the gain of each amplifier

2- Determine the voltage gain of each amplifier when


the capacitively coupled load is changed to 10 kΩ

Fig 6 : Question 6

Q7: For the circuit shown in fig.7

1- Determine the voltage gain and input resistance of the common-gate amplifier

Fig 7 : Question 7

Q8: Repeat question 1, 2, 5, 7 with Multisim simulation program.

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