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Internal Test Question Paper format-CBCS Scheme: Sjcit

The document is an internal test question paper format for the subject ARM Microcontroller & Embedded System (17EC62) from S.J.C. Institute of Technology. It contains 5 questions assessing various concepts related to ARM Cortex M3 architecture at different cognitive levels. The questions cover topics like architectural block diagram, instructions, assembly and C interfacing, data processing, memory access, register operations, embedded applications and comparisons between computing systems.

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Roopa Gururaj
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219 views2 pages

Internal Test Question Paper format-CBCS Scheme: Sjcit

The document is an internal test question paper format for the subject ARM Microcontroller & Embedded System (17EC62) from S.J.C. Institute of Technology. It contains 5 questions assessing various concepts related to ARM Cortex M3 architecture at different cognitive levels. The questions cover topics like architectural block diagram, instructions, assembly and C interfacing, data processing, memory access, register operations, embedded applications and comparisons between computing systems.

Uploaded by

Roopa Gururaj
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOC, PDF, TXT or read online on Scribd
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SJCIT 06#Form#02b - Rev. No.

02
Page: 1/2

Internal Test Question paper format- CBCS Scheme

Name of the staff: Roopa M

Date: 04-03-2020 Signature:

Reviewer’s Signature:

S.J.C. Institute of Technology


Department:-ELECTRONICS AND COMMUNICATION ENGINEERING
Test: I
Semester: VI
Subject Name & Code: ARM Microcontroller & Embedded System (17EC62)

Duration: 90 minutes Max Marks: 50

Question Marks CO Levels


Number
a) Briefly explain the functions of various units with CO1 L2 10
the architectural block diagram of ARM Cortex M3.
1 OR
b) Explain the following 32 bit instructions in Cortex CO1 L2 10
M3: AND, CMN, MLA, SDIV, STR, MRS, MRS, POP
a) List the applications of Cortex M3 with examples. CO1 L1 4

b) Relate How interface is done between assembly CO2 L2 6


and C.
OR
2
a) Choose any four data processing instructions in CO1 L1 4
Cortex- M3 and give the suitable examples.

b) Show the toggling of an LED with a small delay by CO2 L2 6


coding it in Cortex M3
a) By selecting the suitable instructions of Cortex M3, CO2 L3 10
write a program to find the sum of first 10 integers
OR
3
b) Write a Assembly level program to exchange five CO2 L3 10
memory location contents by using memory access
instructions.
SJCIT 06#Form#02b - Rev. No. 02
Page: 2/2

a) Analyze the following 16 bit instructions in Cortex CO1 L4 10


M3 and write the contents of each register after
execution. Let R6= 0X12345678 , R7= 0X3355AACC
R3=0X5678ABCD
Area PGM, code, read only
Entry
Start : EOR R0,R6,R7
AND R7,R3,R6
MUL R7,R3,R6
SUB.S R8,R6,R7
BFI.W R7,R6,#8,#16
4
End
OR
b) Analyze the following instruction and write the CO1 L4 10
contents of the register after execution of each
instruction.
Assume R8 = 0X00000088 , R9 = 0X00000006 ,
R3=0X00001111
(i) RSB.W R8, R9, #0X10
(ii) ADD R8, R9, R3
(iii) BIC R6, R8, 0X06
(iv) ORR R8 , R9
a) Make a Comparison between the following by its CO3 L2 10
functionality and other aspects
(i) General Computing Systems and Embedded Systems
and
5 (ii) RISC and CISC architectures
OR
b) Infer the need of Embedded system with suitable CO3 L2 10
examples for each

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