Small signal models

A model is a combination of circuit elements, properly chosen, that best

approximates the actual behavior of the semiconductor device under specific
operating conditions.

Hybrid equivalent circuit (h-parameter)

Very popular in the early years of transistor network analysis
Model parameters (h-parameters) were listed on Data Sheets; just insert the
value into the equivalent circuit for analysis
Drawback: Parameters defined for a set of operating conditions (which may
not match the actual conditions)
Mismatch is not critical most of the time as actual operating conditions are
quite close to the conditions defined in the Data Sheet
Recall that there is always variation in Beta, so an approximation approach is
OK (gets the job done).

Transistors 2: Small Signal Analysis 1

 h-parameter model for the BJT
Hybrid equivalent model

h-parameter
model

Parameters (defined): hi, hr, hf, ho

Variables (unknown): Vi, Vo, Ii, Io

Note on subscripts:
The “i” is for input (hi = Vi/ii when Vo = 0): input resistance
The “o” is for output (ho = io/Vo when ii = 0): output conductance
The “r” is for reverse (hr = Vi/Vo when ii = 0): reverse transfer voltage ratio
The “f” is for forward (hf = io/i1 when Vo = 0): forward transfer current ratio

Transistors 2: Small Signal Analysis 2

 h-parameters in practice
Most of the time in datasheets, you will find the parameters: hie, hfe, hoe, hre
The subscript “e” refers to “emitter”; it means that these set of parameters are
measured with the device in the Common Emitter (CE) configuration
ib hie ic

hre vc hfe ib
vbe hoe vce Refer to the Data Sheet of transistor
2N3904 to get an idea of the range
of values for these h-parameters.

Typical value ranges for CE h-parameters for BJTs:

hie hfe hoe hre

kΩ (i.e. 103 Ω) 102 10 μS (i.e. 10-5 S) 10-4

Transistors 2: Small Signal Analysis 3

 Note on small signal h-parameters
ib hie ic
The variables represent small signals:
variations about the DC value
hre vc hfe ib (E.g. ib = ΔIB, where IB is the DC bias
vbe hoe vce base current)

𝑖𝑖𝑐𝑐
Definition of small signal h-parameters: ℎ𝑓𝑓𝑓𝑓 = � 𝑖𝑖𝑐𝑐 = ℎ𝑓𝑓𝑓𝑓 𝑖𝑖𝑏𝑏 + ℎ𝑜𝑜𝑜𝑜 𝑣𝑣𝑐𝑐𝑐𝑐
𝑖𝑖𝑏𝑏 𝑣𝑣
𝑐𝑐𝑐𝑐 =0
∆𝐼𝐼𝑐𝑐
ℎ𝑓𝑓𝑓𝑓 = �
∆𝐼𝐼𝑏𝑏 ∆𝑉𝑉
𝑐𝑐𝑐𝑐 =0

𝜕𝜕𝐼𝐼𝑐𝑐
ℎ𝑓𝑓𝑓𝑓 = � Change in IC with IB at a given VCE
𝜕𝜕𝐼𝐼𝑏𝑏 𝑉𝑉
𝑐𝑐𝑐𝑐

Transistors 2: Small Signal Analysis 4

 From the datasheet of 2N3904

2N3904

Small-signal parameter Min Max Unit

Input Impedance (hie)
1 10 kΩ
(IC = 1.0 mAdc, VCE = 10 Vdc, f = 1.0 kHz)
Voltage Feedback Ratio (hre)
0.5 8 10-4
(IC = 1.0 mAdc, VCE = 10 Vdc, f = 1.0 kHz)
Small–Signal Current Gain (hfe)
100 400 --
(IC = 1.0 mAdc, VCE = 10 Vdc, f = 1.0 kHz)
Output Admittance (hoe)
1 40 µS
(IC = 1.0 mAdc, VCE = 10 Vdc, f = 1.0 kHz)

Transistors 2: Small Signal Analysis 5

 Simplified h-model for BJTs
To see how the simplification is ib ic
acceptable, we consider the full
equations first:

Input: vb hie hfe ib vc

𝑣𝑣𝑏𝑏𝑏𝑏 = ℎ𝑖𝑖𝑖𝑖 𝑖𝑖𝑏𝑏 + ℎ𝑟𝑟𝑟𝑟 𝑣𝑣𝑐𝑐𝑐𝑐

Output:
𝑖𝑖𝑐𝑐 = ℎ𝑓𝑓𝑓𝑓 𝑖𝑖𝑏𝑏 + ℎ𝑜𝑜𝑜𝑜 𝑣𝑣𝑐𝑐𝑐𝑐

Based on practical values ranges of the h-parameters, which term in each

equation will come to dominate (and thus matter most of the time)?

We will use the simplified model for this course when deriving various
equations for different BJT circuits.
Transistors 2: Small Signal Analysis 6
 Transistor configurations
• There basically three types of transistor configurations
• There are distinguished from each other by which BJT
terminal is used as the input, output and common
terminal
> Common-Emitter
> Common-Collector
> Common-Base
• We will analyze each of these configurations first
without the biasing network
> Aim: Find out their key characteristics (quite different from
each other)
• Then we will analyze with the biasing network

Transistors 2: Small Signal Analysis 7

 Small signal circuit parameters
Thinking about the amplifier as a two port systems:
Input (Vi), Output (Vo), and Common Terminal
How do the currents and voltages relate to each other in relation to the loading
conditions but applying a Thevenin look into the ports?
𝑉𝑉𝑖𝑖 𝑉𝑉𝑜𝑜
With Io set to 0 V: 𝑍𝑍𝑖𝑖 = With Io set to 0 V: 𝐴𝐴𝑣𝑣𝑣𝑣𝑣𝑣 =
𝐼𝐼𝑖𝑖 𝑉𝑉𝑖𝑖
Zi: Input resistance/impedance AvNL: No load voltage gain

𝑉𝑉𝑜𝑜
With Vi set to 0 V: 𝑍𝑍𝑜𝑜 =
𝐼𝐼𝑜𝑜

Zout: Output resistance/impedance

These values may change when a load is added to the output.

Transistors 2: Small Signal Analysis 8
 Effect of load on circuit

Note that as Ro is non-zero and

neither is RL is infinite, Vo will be
less than AvNLVi.

Adding a load reduces the

gain of the amplifier:
Vo RL
Av = = A vNL Ro is the output resistance of the amplifier
Vi R L + R o
RL is the load resistance
Zi
A i = −A v
RL

Transistors 2: Small Signal Analysis 9

 Effect of source on circuit
Note that as Rs is non-zero and neither is Ri is infinite, Vi will be less than Vs.
The fraction of applied
signal that reaches the
input of the amplifier is:
Ri
Vi = Vs
Ri + Rs
Ri is the input resistance
of the amplifier
The internal resistance of the signal Rs is the source resistance
source (Rs) reduces the overall gain:
Vo Ri
Avs = = AvNL
Vs Ri + Rs
Avs is the voltage gain taking into
account the source resistance (Rs).

Transistors 2: Small Signal Analysis 10

Combined effect of both load and source
Effects of RL:
𝑅𝑅𝐿𝐿 𝐴𝐴𝑣𝑣𝑣𝑣𝐿𝐿
𝐴𝐴𝑣𝑣𝑣𝑣 =
𝑅𝑅𝐿𝐿 + 𝑅𝑅𝑜𝑜

Effects of RL and RS:

𝑅𝑅𝑖𝑖 𝑅𝑅𝐿𝐿
𝐴𝐴𝑣𝑣𝑣𝑣𝑣𝑣 = 𝐴𝐴
𝑅𝑅𝑖𝑖 + 𝑅𝑅𝑆𝑆 𝑅𝑅𝐿𝐿 + 𝑅𝑅𝑜𝑜 𝑣𝑣𝑣𝑣𝑣𝑣

Relevance to configurations: Depending on which configuration you use,

the values of input/output resistance and gain could be very different

Transistors 2: Small Signal Analysis 11

 Common Emitter (CE) Configuration
In the CE configuration, connections to the 3 terminals of the BJT are as follows:
B – Input
C – Output
E – Common terminal (common bias to input and output)
All of the biasing configurations in Transistors 1 were applied to CE configuration
Applying the definitions from before:
See supplementary notes
𝑍𝑍𝑖𝑖 = ℎ𝑖𝑖𝑖𝑖 for full derivation steps

ℎ𝑓𝑓𝑓𝑓 𝑅𝑅𝐿𝐿 𝑣𝑣𝑖𝑖 = ℎ𝑖𝑖𝑖𝑖 𝑖𝑖𝑏𝑏

𝐴𝐴𝑣𝑣𝑣𝑣 =−
ℎ𝑖𝑖𝑖𝑖 𝑣𝑣𝑜𝑜𝑜𝑜𝑜𝑜 = −ℎ𝑓𝑓𝑓𝑓 𝑖𝑖𝑏𝑏 𝑅𝑅𝐿𝐿
Negative sign Note that if RL was replaced by an
indicates inversion open circuit, AvNL would be infinite

Note that if RL was replaced by an

𝑍𝑍𝑜𝑜 = 𝑅𝑅𝐿𝐿 open circuit, Zo would be infinite

Transistors 2: Small Signal Analysis 12

 Common Collector (CC) Configuration
In the CC configuration, connections to the 3 terminals of the BJT are as follows:
B – Input
E – Output
C – Common terminal (common bias to input and output)

Common terminals are

set to ground (i.e. DC
voltage → AC ground)

We redraw the above small signal circuit to make it easier to analyze

Transistors 2: Small Signal Analysis 13

 Common Collector (CC) Configuration
Applying the definitions for Zi, AvNL, and Zo from before:

𝑍𝑍𝑖𝑖 = ℎ𝑖𝑖𝑖𝑖 + (1 + ℎ𝑓𝑓𝑓𝑓 )𝑅𝑅𝐿𝐿 Intermediary equations:

Note that if RL was replaced by an 𝑣𝑣𝑖𝑖 = 𝑖𝑖𝑏𝑏 ℎ𝑖𝑖𝑖𝑖 + 𝑣𝑣𝑜𝑜

open circuit, Zi would be infinite
𝑣𝑣𝑜𝑜 = (1 + ℎ𝑓𝑓𝑓𝑓 )𝑖𝑖𝑏𝑏 𝑅𝑅𝐿𝐿

(1 + ℎ𝑓𝑓𝑓𝑓 )𝑅𝑅𝐿𝐿
𝐴𝐴𝑣𝑣𝑣𝑣 =
ℎ𝑖𝑖𝑖𝑖 + (1 + ℎ𝑓𝑓𝑓𝑓 )𝑅𝑅𝐿𝐿

ℎ𝑖𝑖𝑖𝑖
𝑍𝑍𝑜𝑜 = 𝑅𝑅𝐿𝐿 || Learn the principles behind the derivation
1 + ℎ𝑓𝑓𝑓𝑓
of these relations. Most of the marks in the
assessments are given to working steps.
See supplementary notes for full Only a fraction of the full mark for quoting
derivation steps the final answer.
Transistors 2: Small Signal Analysis 14
 Common Base Configuration (CB)
In the CC configuration, connections to the 3 terminals of the BJT are as follows:
E – Input
C – Output
B – Common terminal (common bias to input and output)

Common terminals are

set to ground (i.e. DC
voltage → AC ground)

Transistors 2: Small Signal Analysis 15

 Common Base Configuration (CB)
Applying the definitions for Zi, AvNL, and Zo from before:

ℎ𝑖𝑖𝑖𝑖 𝑖𝑖𝑖𝑖 = −𝑖𝑖𝑏𝑏 1 + ℎ𝑓𝑓𝑓𝑓

𝑍𝑍𝑖𝑖 =
1 + ℎ𝑓𝑓𝑓𝑓 𝑣𝑣𝑖𝑖 = −𝑖𝑖𝑏𝑏 ℎ𝑖𝑖𝑖𝑖

𝑍𝑍𝑜𝑜 = 𝑅𝑅𝐿𝐿

Ii
ℎ𝑓𝑓𝑓𝑓 𝑅𝑅𝐿𝐿
𝐴𝐴𝑣𝑣𝑣𝑣 =
ℎ𝑖𝑖𝑖𝑖
+ Zi
Vi Ib
-

Transistors 2: Small Signal Analysis 16

 Comparison of configurations
Typically: hie ~ kΩ, hfe ~ 100
Assume: RL ~ kΩ

Parameter CE CC CB
Medium (hie) High (hfeRL) Low (hie/hfe)
Zi
~kΩ ~100kΩ ~10Ω
Medium (by RL) Low (hie/hfe) Medium (by RL)
Zo
~kΩ ~10Ω kΩ
High (inverting) Unity (non-inverting) High (non-inverting)
~ - 100 ~1 ~ 100
AvL ℎ𝑓𝑓𝑓𝑓 𝑅𝑅𝐿𝐿 (1 + ℎ𝑓𝑓𝑓𝑓 )𝑅𝑅𝐿𝐿 ℎ𝑓𝑓𝑓𝑓 𝑅𝑅𝐿𝐿
−
ℎ𝑖𝑖𝑖𝑖 ℎ𝑖𝑖𝑖𝑖 + (1 + ℎ𝑓𝑓𝑓𝑓 )𝑅𝑅𝐿𝐿 ℎ𝑖𝑖𝑖𝑖

Transistors 2: Small Signal Analysis 17

 Comparison of configurations
CE configuration
 High voltage gain (and current gain)
 Magnitude of Zi and Zo lie between CC and CB (moderate)
 Application: High gain amplifier
CC configuration
 Unity voltage gain (but high current gain)
 Zi is the highest and Zo is the lowest among all 3 configurations
 Application: Use as buffer between high-impedance source and low-
impedance load
CB configuration
 High voltage gain (but unity current gain)
 Zi is the lowest and Zo is the highest among all 3 configurations
 Value: Use to match very-low-impedance source and to drive high
impedance load
 Application: Use as non-inverting amplifier with voltage gain greater
than unity

Transistors 2: Small Signal Analysis 18

Steps for obtaining AC equivalent network
1) Set all DC sources to zero and replace them by a short-
circuit
2) Replace all capacitors by a short-circuit
3) Remove all elements bypassed by the short-circuits
introduced in the first two steps
4) Redraw the circuit in a more logical form
5) Replace the transistor by its model

Suggestion: Mark the points B, C, and E on circuit.

Maintain the relative positions as in the original circuit.

Note: This is just a revision of EE2301 Block D Unit 2

Transistors 2: Small Signal Analysis 19

 Illustration: Obtaining AC equivalent
What kind of configuration is shown here? (CE / CC / CB)
Biasing?
Replace all capacitors by
___________________

Replace all DC sources by

AC equivalent
_____________________
Transistors 2: Small Signal Analysis 20
AC equivalent  SSEC
SSEC: Small signal equivalent circuit

Redraw AC equivalent circuit in a

form that simplifies the analysis

Replace transistor symbol with

simplified h-parameter model

hie hfe ib

Transistors 2: Small Signal Analysis 21

 Fixed-bias CE SSEC
What is different in this circuit
compared to the SSEC of the CE
configuration without biasing
included?

𝑍𝑍𝑖𝑖 = 𝑅𝑅𝐵𝐵 ||ℎ𝑖𝑖𝑖𝑖

Why is ib not equal to Ii?

ℎ𝑓𝑓𝑓𝑓 𝑅𝑅𝐶𝐶
𝐴𝐴𝑣𝑣𝑣𝑣𝑣𝑣 =−
ℎ𝑖𝑖𝑖𝑖

𝑍𝑍𝑜𝑜 = 𝑅𝑅𝐶𝐶

Transistors 2: Small Signal Analysis 22

 CE emitter bias

AC Equivalent
Replace all DC sources by Replace all capacitors by
_____________________ ___________________

Transistors 2: Small Signal Analysis 23

 CE emitter bias SSEC
𝑍𝑍𝑖𝑖 = 𝑅𝑅𝐵𝐵 ||𝑍𝑍𝑏𝑏

Zb = hie + (hfe +1)RE

Note that: Zb = Vi/Ib

ℎ𝑓𝑓𝑓𝑓 𝑅𝑅𝐶𝐶
𝐴𝐴𝑣𝑣𝑣𝑣𝑣𝑣 = −
ℎ𝑖𝑖𝑖𝑖 + ℎ𝑓𝑓𝑓𝑓 + 1 𝑅𝑅𝐸𝐸

𝑍𝑍𝑜𝑜 = 𝑅𝑅𝐶𝐶
hie hfe Ib

What has changed as a result of

adding RE?
Ie = (hfe+1)Ib

Transistors 2: Small Signal Analysis 24

 CE emitter bias observations
What is the effect of RE on the gain?
Consider the expected values of hie, hfe, and RE to get a quantitative assessment.

Recall: hie ~ ______ ; hfe ~ _____ ; Assume: RE ~ ______

Denominator: _________  __________

Reduction in gain: _________ time

Recall: What is the purpose of RE for biasing?
Provide stability in relation to uncertainties and changes in the current gain (β)

From the view of biasing, adding RE provides stability to the circuit in terms
of fixing the biasing point. But from the view of voltage gain, RE reduces the
gain of the circuit. What can be done?

Transistors 2: Small Signal Analysis 25

 CE voltage divider bias

R’

AC equivalent

R’ = R1 || R2
Assume that at the chosen frequency range, impedance of CE is sufficiently
low to bypass RE and that the combined impedance is sufficiently low to be
approximated by a short circuit.
Compare with the CE fixed bias AC equivalent.
Same: _______________ ; Different: _________________
Transistors 2: Small Signal Analysis 26
CE voltage divider bypass cap SSEC
Input impedance:
𝑍𝑍𝑖𝑖 = 𝑅𝑅𝑅||ℎ𝑖𝑖𝑖𝑖
R’

Output impedance:
𝑍𝑍𝑜𝑜 = 𝑅𝑅𝐶𝐶 Compare against CE fixed-bias configuration
What is the same and what is different?
Voltage gain:
ℎ𝑓𝑓𝑓𝑓 𝑅𝑅𝐶𝐶
𝐴𝐴𝑣𝑣𝑣𝑣𝑣𝑣 =−
ℎ𝑖𝑖𝑖𝑖

Transistors 2: Small Signal Analysis 27

 CC configuration with biasing

hie hfe ib

This configuration is also commonly referred to as an emitter follower. As

we will see from the SSEC parameter derived, this circuit’s ability lies in
allowing the output voltage to “follow” the input voltage.
Note: Output is taken across RE

Transistors 2: Small Signal Analysis 28

 CC SSEC
What is different and the same compared
to the circuit without biasing?
hie hfe Ib

𝑍𝑍𝑖𝑖 = 𝑅𝑅𝐵𝐵 ||𝑍𝑍𝑏𝑏

𝑍𝑍𝑏𝑏 = ℎ𝑖𝑖𝑖𝑖 + (1 + ℎ𝑓𝑓𝑓𝑓 )𝑅𝑅𝐸𝐸

Ie = (hfe+1)Ib
(1 + ℎ𝑓𝑓𝑓𝑓 )𝑅𝑅𝐸𝐸
𝐴𝐴𝑣𝑣𝑁𝑁𝐿𝐿 =
ℎ𝑖𝑖𝑖𝑖 + (1 + ℎ𝑓𝑓𝑓𝑓 )𝑅𝑅𝐸𝐸 Alternative (simplified) representation
hie

ℎ𝑖𝑖𝑖𝑖
𝑍𝑍𝑜𝑜 = 𝑅𝑅𝐸𝐸 ||
1 + ℎ𝑓𝑓𝑓𝑓

Transistors 2: Small Signal Analysis 29

CB configuration with biasing
What type of BJT is shown here?
(NPN / PNP)

Procedure for small signal

analysis the same for NPN and
PNP BJTs.

Transistors 2: Small Signal Analysis 30

 CB SSEC

AC Equivalent
Label Vi and Vo

Transistors 2: Small Signal Analysis 31

 CB small signal analysis
What is different and the same compared
to the circuit without biasing?

ℎ𝑖𝑖𝑖𝑖
𝑍𝑍𝑖𝑖 = Ii
1 + ℎ𝑓𝑓𝑓𝑓 + (ℎ𝑖𝑖𝑖𝑖 ⁄𝑅𝑅𝐸𝐸 )
+ Zi
Vi Ib
𝑍𝑍𝑜𝑜 = 𝑅𝑅𝐶𝐶 -

ℎ𝑓𝑓𝑓𝑓 𝑅𝑅𝐶𝐶
𝐴𝐴𝑣𝑣𝑣𝑣 =
ℎ𝑖𝑖𝑖𝑖

Transistors 2: Small Signal Analysis 32

 Example 1: CE amplifier
Given : hie = 1.1kΩ, hfe= 100
Determine :
1. The Q-point, ICQ and VCEQ
2. The input impedance, Zin
3. The output impedance, Zo
4. The no load voltage gain, AvNL
5. The loaded voltage gain, AvL = Vo/Vi

How is Zin affected by RL?

Transistors 2: Small Signal Analysis 33

 CE amplifier example solution
(1) Q-point (DC analysis)
ℎ𝑓𝑓𝑓𝑓 𝑅𝑅𝐶𝐶
VBB = VCC × R2/(R1+R2) = 4.797V 𝐴𝐴𝑣𝑣𝑣𝑣𝑣𝑣 =−
ℎ𝑖𝑖𝑖𝑖
RBB = R1 || R2 = 3.197kΩ
 AvNL = -90.91
VBB = IBRBB + VBE + (β+1)IBRE
VCC = βIBRC + VCE + (β+1)IBRE
ℎ𝑓𝑓𝑓𝑓 𝑅𝑅𝐶𝐶 ||𝑅𝑅𝐿𝐿
 IB = 39.31μA; IC = 3.931mA; VCE = 7.099V 𝐴𝐴𝑣𝑣𝑣𝑣 =−
ℎ𝑖𝑖𝑖𝑖
(2)-(5) Small signal analysis  AvL = -45.46
𝑍𝑍𝑖𝑖 = 𝑅𝑅𝐵𝐵 ||ℎ𝑖𝑖𝑖𝑖
 Zi = 818.4Ω
RL has no effect on Zin
𝑍𝑍𝑜𝑜 = 𝑅𝑅𝐶𝐶 Check SSEC to confirm that expressions for
 Zo = 1kΩ Iin or Vin are independent of RL

Transistors 2: Small Signal Analysis 34

 Example 2: CC follower
Given : hie = 1.1kΩ, hfe= 100
Determine :
1. The Q-point, ICQ and VCEQ
2. The input impedance (w/o RL), ZinNL = vin/iin
3. The input impedance (with RL), ZinL = vin/iin
4. The output impedance, Zo
5. The no load voltage gain, AvNL
6. The loaded voltage gain, AvL = vo/vin

Transistors 2: Small Signal Analysis 35

 CC follower example solution
(1) Q-point (DC analysis) ℎ𝑖𝑖𝑖𝑖
𝑍𝑍𝑜𝑜 = 𝑅𝑅𝐸𝐸 ||
VBB = VCC × R2/(R1+R2) = 7.5V 1 + ℎ𝑓𝑓𝑓𝑓
RBB = R1 || R2 = 5kΩ  Zo = 10.8Ω
VBB = IBRBB + VBE + (β+1)IBRE
(1 + ℎ𝑓𝑓𝑓𝑓 )𝑅𝑅𝐸𝐸
VCC = VCE + (β+1)IBRE 𝐴𝐴𝑣𝑣𝑁𝑁𝐿𝐿 =
ℎ𝑖𝑖𝑖𝑖 + (1 + ℎ𝑓𝑓𝑓𝑓 )𝑅𝑅𝐸𝐸
 IB = 64.15μA; IC = 6.415mA; VCE = 8.521V
 AvNL = 0.9892
(2)-(4) Small signal analysis
(1 + ℎ𝑓𝑓𝑓𝑓 )𝑅𝑅𝑅
𝑍𝑍𝑖𝑖𝑖𝑖𝑖𝑖 = 𝑅𝑅𝐵𝐵𝐵𝐵 ||𝑍𝑍𝑏𝑏𝑁𝑁𝑁𝑁 𝑍𝑍𝑏𝑏𝑁𝑁𝑁𝑁 = ℎ𝑖𝑖𝑖𝑖 + (1 + ℎ𝑓𝑓𝑓𝑓 )𝑅𝑅𝐸𝐸 𝐴𝐴𝑣𝑣𝑣𝑣 =
ℎ𝑖𝑖𝑖𝑖 + (1 + ℎ𝑓𝑓𝑓𝑓 )𝑅𝑅𝑅
 ZiL = 4.767kΩ
 AvNL = 0.9683

𝑍𝑍𝑖𝑖𝑖𝑖 = 𝑅𝑅𝐵𝐵𝐵𝐵 ||𝑍𝑍𝑏𝑏𝐿𝐿 𝑍𝑍𝑏𝑏𝐿𝐿 = ℎ𝑖𝑖𝑖𝑖 + 1 + ℎ𝑓𝑓𝑓𝑓 𝑅𝑅𝑅

R’ = RE||RL
 ZiL = 4.371kΩ

Transistors 2: Small Signal Analysis 36

 Cascaded systems
• To cascade is feed the output of one amplifier to the
input of the next amplifier
• The overall voltage gain is determined by the product of
gains of the individual stages
• The DC bias circuits are isolated from each other by the
coupling capacitors
• The DC calculations are independent of the cascading
• The AC calculations for gain and impedance are
interdependent

Transistors 2: Small Signal Analysis 37

 Example: Cascaded CE amplifiers
R1 = R3 = 15kΩ, R2 = R4 = 4.7kΩ, RC1 = RC2 = 2.2kΩ, RE1 = RE2 = 1kΩ
VCC = 20V, C1 = C3 = 10µF, Cs1 = Cs2 = 20µF, Vi = 25µV, VBE = 0.7V
β = hfe = 200, hie = 1.3kΩ

Determine:
1) The Q-point of each transistor
2) No-load voltage gain, AvNL
3) Input impedance of 1st stage (Zi)
4) Output impedance of 2nd stage (Zo)
5) Voltage with and without a load or
4.7 kΩ

Q-point: IC = 3.98mA, VCE = 7.24V

RBB = 3.58kΩ, VBB = 4.77V, IB = 0.0199mA, VB = 4.7V, VE = 4.0V, IC = 3.98mA

Transistors 2: Small Signal Analysis 38

 Example: Cascaded CE amplifiers
Input impedance, 1st stage: Total no-load voltage:
Z i = R1 || R2 || hie  Zi 
Av = AvNL1 AvNL 2  
 Zi + Zo 
Output impedance, 2nd stage:
Z o = RC

No-load voltage gain of CE amplifier:

h fe RC
AvNL =
hie

Zi = 953.6Ω, Zo = 2.2kΩ, ATvNL = 34600, VoNL = 865mV, Vo(RL=4.7kΩ) = 590mV

Transistors 2: Small Signal Analysis 39

Lab: Measuring Zo of an amplifier

𝑉𝑉1
𝑍𝑍𝑆𝑆𝑆𝑆𝑆𝑆𝑆𝑆𝑆𝑆𝑆𝑆 = 𝑅𝑅𝐿𝐿𝐿𝐿𝐿𝐿𝐿𝐿 −1
𝑉𝑉2

Voltage measurement at the points at OUT:

V1 = Open-circuit voltage (Rload = ∞, that is without Rload, switch S is open)
Rload = Load resistance (Rtest is a resistor to measure the value of Ω)
V2 = Loaded circuit voltage with resistor Rload = resistance Rtest
Zsource = The output impedance can be calculated

Note: When the voltage V2 is equal to half of V1, then the measured
resistance value Rload is equal to the output impedance Zsource.

Transistors 2: Small Signal Analysis 40

Lab: Measuring Zi of an amplifier

𝑉𝑉2
𝑍𝑍𝐿𝐿𝐿𝐿𝐿𝐿𝐿𝐿 = 𝑅𝑅𝑇𝑇𝑇𝑇𝑇𝑇𝑇𝑇
𝑉𝑉1 − 𝑉𝑉2

Voltage measurement at the points IN or at OUT:

V1 = Generator signal voltage (at Rs = 0 Ω, that is without series resistor Rs)
Rs = Series resistance (Rtest is resistor to measure Ω value)
V2 = Voltage with series resistor Rs = resistance Rtest
Zload = The input impedance to be calculated

Note: When the voltage V2 is equal to half of V1, then the measured
resistance value Rs (Rtest) is equal to the input impedance Zload.

Transistors 2: Small Signal Analysis