Chosen Approximates Specific: Hybrid Equivalent Circuit (H-Parameter)
Chosen Approximates Specific: Hybrid Equivalent Circuit (H-Parameter)
h-parameter
model
Note on subscripts:
The “i” is for input (hi = Vi/ii when Vo = 0): input resistance
The “o” is for output (ho = io/Vo when ii = 0): output conductance
The “r” is for reverse (hr = Vi/Vo when ii = 0): reverse transfer voltage ratio
The “f” is for forward (hf = io/i1 when Vo = 0): forward transfer current ratio
hre vc hfe ib
vbe hoe vce Refer to the Data Sheet of transistor
2N3904 to get an idea of the range
of values for these h-parameters.
𝑖𝑖𝑐𝑐
Definition of small signal h-parameters: ℎ𝑓𝑓𝑓𝑓 = � 𝑖𝑖𝑐𝑐 = ℎ𝑓𝑓𝑓𝑓 𝑖𝑖𝑏𝑏 + ℎ𝑜𝑜𝑜𝑜 𝑣𝑣𝑐𝑐𝑐𝑐
𝑖𝑖𝑏𝑏 𝑣𝑣
𝑐𝑐𝑐𝑐 =0
∆𝐼𝐼𝑐𝑐
ℎ𝑓𝑓𝑓𝑓 = �
∆𝐼𝐼𝑏𝑏 ∆𝑉𝑉
𝑐𝑐𝑐𝑐 =0
𝜕𝜕𝐼𝐼𝑐𝑐
ℎ𝑓𝑓𝑓𝑓 = � Change in IC with IB at a given VCE
𝜕𝜕𝐼𝐼𝑏𝑏 𝑉𝑉
𝑐𝑐𝑐𝑐
2N3904
Output:
𝑖𝑖𝑐𝑐 = ℎ𝑓𝑓𝑓𝑓 𝑖𝑖𝑏𝑏 + ℎ𝑜𝑜𝑜𝑜 𝑣𝑣𝑐𝑐𝑐𝑐
We will use the simplified model for this course when deriving various
equations for different BJT circuits.
Transistors 2: Small Signal Analysis 6
Transistor configurations
• There basically three types of transistor configurations
• There are distinguished from each other by which BJT
terminal is used as the input, output and common
terminal
> Common-Emitter
> Common-Collector
> Common-Base
• We will analyze each of these configurations first
without the biasing network
> Aim: Find out their key characteristics (quite different from
each other)
• Then we will analyze with the biasing network
𝑉𝑉𝑜𝑜
With Vi set to 0 V: 𝑍𝑍𝑜𝑜 =
𝐼𝐼𝑜𝑜
𝑅𝑅𝑖𝑖 𝑅𝑅𝐿𝐿
𝐴𝐴𝑣𝑣𝑣𝑣𝑣𝑣 = 𝐴𝐴
𝑅𝑅𝑖𝑖 + 𝑅𝑅𝑆𝑆 𝑅𝑅𝐿𝐿 + 𝑅𝑅𝑜𝑜 𝑣𝑣𝑣𝑣𝑣𝑣
(1 + ℎ𝑓𝑓𝑓𝑓 )𝑅𝑅𝐿𝐿
𝐴𝐴𝑣𝑣𝑣𝑣 =
ℎ𝑖𝑖𝑖𝑖 + (1 + ℎ𝑓𝑓𝑓𝑓 )𝑅𝑅𝐿𝐿
ℎ𝑖𝑖𝑖𝑖
𝑍𝑍𝑜𝑜 = 𝑅𝑅𝐿𝐿 || Learn the principles behind the derivation
1 + ℎ𝑓𝑓𝑓𝑓
of these relations. Most of the marks in the
assessments are given to working steps.
See supplementary notes for full Only a fraction of the full mark for quoting
derivation steps the final answer.
Transistors 2: Small Signal Analysis 14
Common Base Configuration (CB)
In the CC configuration, connections to the 3 terminals of the BJT are as follows:
E – Input
C – Output
B – Common terminal (common bias to input and output)
𝑍𝑍𝑜𝑜 = 𝑅𝑅𝐿𝐿
Ii
ℎ𝑓𝑓𝑓𝑓 𝑅𝑅𝐿𝐿
𝐴𝐴𝑣𝑣𝑣𝑣 =
ℎ𝑖𝑖𝑖𝑖
+ Zi
Vi Ib
-
Parameter CE CC CB
Medium (hie) High (hfeRL) Low (hie/hfe)
Zi
~kΩ ~100kΩ ~10Ω
Medium (by RL) Low (hie/hfe) Medium (by RL)
Zo
~kΩ ~10Ω kΩ
High (inverting) Unity (non-inverting) High (non-inverting)
~ - 100 ~1 ~ 100
AvL ℎ𝑓𝑓𝑓𝑓 𝑅𝑅𝐿𝐿 (1 + ℎ𝑓𝑓𝑓𝑓 )𝑅𝑅𝐿𝐿 ℎ𝑓𝑓𝑓𝑓 𝑅𝑅𝐿𝐿
−
ℎ𝑖𝑖𝑖𝑖 ℎ𝑖𝑖𝑖𝑖 + (1 + ℎ𝑓𝑓𝑓𝑓 )𝑅𝑅𝐿𝐿 ℎ𝑖𝑖𝑖𝑖
hie hfe ib
𝑍𝑍𝑜𝑜 = 𝑅𝑅𝐶𝐶
AC Equivalent
Replace all DC sources by Replace all capacitors by
_____________________ ___________________
ℎ𝑓𝑓𝑓𝑓 𝑅𝑅𝐶𝐶
𝐴𝐴𝑣𝑣𝑣𝑣𝑣𝑣 = −
ℎ𝑖𝑖𝑖𝑖 + ℎ𝑓𝑓𝑓𝑓 + 1 𝑅𝑅𝐸𝐸
𝑍𝑍𝑜𝑜 = 𝑅𝑅𝐶𝐶
hie hfe Ib
From the view of biasing, adding RE provides stability to the circuit in terms
of fixing the biasing point. But from the view of voltage gain, RE reduces the
gain of the circuit. What can be done?
R’
AC equivalent
R’ = R1 || R2
Assume that at the chosen frequency range, impedance of CE is sufficiently
low to bypass RE and that the combined impedance is sufficiently low to be
approximated by a short circuit.
Compare with the CE fixed bias AC equivalent.
Same: _______________ ; Different: _________________
Transistors 2: Small Signal Analysis 26
CE voltage divider bypass cap SSEC
Input impedance:
𝑍𝑍𝑖𝑖 = 𝑅𝑅𝑅||ℎ𝑖𝑖𝑖𝑖
R’
Output impedance:
𝑍𝑍𝑜𝑜 = 𝑅𝑅𝐶𝐶 Compare against CE fixed-bias configuration
What is the same and what is different?
Voltage gain:
ℎ𝑓𝑓𝑓𝑓 𝑅𝑅𝐶𝐶
𝐴𝐴𝑣𝑣𝑣𝑣𝑣𝑣 =−
ℎ𝑖𝑖𝑖𝑖
hie hfe ib
Ie = (hfe+1)Ib
(1 + ℎ𝑓𝑓𝑓𝑓 )𝑅𝑅𝐸𝐸
𝐴𝐴𝑣𝑣𝑁𝑁𝐿𝐿 =
ℎ𝑖𝑖𝑖𝑖 + (1 + ℎ𝑓𝑓𝑓𝑓 )𝑅𝑅𝐸𝐸 Alternative (simplified) representation
hie
ℎ𝑖𝑖𝑖𝑖
𝑍𝑍𝑜𝑜 = 𝑅𝑅𝐸𝐸 ||
1 + ℎ𝑓𝑓𝑓𝑓
AC Equivalent
Label Vi and Vo
ℎ𝑖𝑖𝑖𝑖
𝑍𝑍𝑖𝑖 = Ii
1 + ℎ𝑓𝑓𝑓𝑓 + (ℎ𝑖𝑖𝑖𝑖 ⁄𝑅𝑅𝐸𝐸 )
+ Zi
Vi Ib
𝑍𝑍𝑜𝑜 = 𝑅𝑅𝐶𝐶 -
ℎ𝑓𝑓𝑓𝑓 𝑅𝑅𝐶𝐶
𝐴𝐴𝑣𝑣𝑣𝑣 =
ℎ𝑖𝑖𝑖𝑖
Determine:
1) The Q-point of each transistor
2) No-load voltage gain, AvNL
3) Input impedance of 1st stage (Zi)
4) Output impedance of 2nd stage (Zo)
5) Voltage with and without a load or
4.7 kΩ
𝑉𝑉1
𝑍𝑍𝑆𝑆𝑆𝑆𝑆𝑆𝑆𝑆𝑆𝑆𝑆𝑆 = 𝑅𝑅𝐿𝐿𝐿𝐿𝐿𝐿𝐿𝐿 −1
𝑉𝑉2
Note: When the voltage V2 is equal to half of V1, then the measured
resistance value Rload is equal to the output impedance Zsource.
𝑉𝑉2
𝑍𝑍𝐿𝐿𝐿𝐿𝐿𝐿𝐿𝐿 = 𝑅𝑅𝑇𝑇𝑇𝑇𝑇𝑇𝑇𝑇
𝑉𝑉1 − 𝑉𝑉2
Note: When the voltage V2 is equal to half of V1, then the measured
resistance value Rs (Rtest) is equal to the input impedance Zload.