IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO.

2, MARCH 2007 543

Analysis and Implementation of a High Efficiency,

Interleaved Current-Fed Full Bridge Converter
for Fuel Cell System
Xin Kong, Student Member, IEEE, and Ashwin M. Khambadkone, Senior Member, IEEE

Abstract—An interleaved current-fed full bridge (ICFFB)

dc–dc converter is proposed in this paper that has low input
current ripple to meet the fuel cell demands. By interleaving two
isolated CFFB converters with parallel input and series output
connection, both input current ripple and output voltage ripple
can be reduced. In addition, the size of the magnetic components
and current stress of the semiconductor devices on the input side
are also reduced. Similarly, smaller voltage rating components
can be used on the output side. Only one digital signal processor
microcontroller is used to generate phase-shifted gate signals and
to implement a cascaded digital control system. The main features
of the proposed converter are high efficiency, small passive compo- Fig. 1. Schematic diagram of CFFB converter.
nent size, and small input current ripple. Experimental results for
a 1.2-kW interleaved CFFB converter are provided in the paper.
Index Terms—Current-fed full bridge (CFFB), digital signal
processor (DSP), fuel cell, interleaved boost. be better controlled if the fuel cell stack current is directly
controlled [2].
• Isolation. A transformer coupled converter not only real-
I. INTRODUCTION izes the electrical isolation between the fuel cell and the
HE dc–dc converter is one of the important components in high voltage output side, but also allows series connection
T a fuel cell powered system. It allows us to obtain a desired
level of dc voltage without having to increase the stack size. We
of dc–dc converters.
For isolation and high step-up ratio, forward, push-pull, half
have chosen the following criteria to choose the dc–dc converter. bridge and full bridge can be considered as candidate topologies
• Large step-up ratio. For a single proton exchange mem- [4]–[8]. Advantages and disadvantages of these converters are
brane fuel cell (PEMFC), cell voltage may drop from discussed in [9]. Considering the ripple and direct current con-
1.23 V dc at no load to about 0.5 V dc at full load [1]. Even trol requirement, an isolated current-fed full bridge converter
with fuel cell stacks, the dc output will rarely be suitable (CFFB) topology [10], shown in Fig. 1, shows some promise.
for direct connection to various electrical loads. Hence, a It has small current ripple and high efficiency. The main con-
dc–dc converter is usually required to boost and regulate cern here is the size and weight of a high current inductor. In
the low output voltage of the fuel cell stack. order to reduce the size of the magnetic components and further
• Low input current ripple. The ripple current seen by the improve the converter efficiency, an interleaved current-fed full
fuel cell stack due to the switching of the dc–dc converter bridge converter (ICFFB) is proposed in this paper with a par-
has to be low [2]. According to [3], fuel cell current ripple allel input and a series output scheme.
plays an important role in the catalyst lifetime of fuel cell By parallelling input of the converter system, input current
plates. In particular, sharp current rise/fall and large mag- and hence the power can be equally shared between the mod-
nitude of high frequency current ripple should be avoided. ules of the converter system. Hence current stress on the semi-
Furthermore, fuel cell current should be strictly nonnega- conductor devices on the input side is reduced. On the other
tive and should not exceed the maximal current limit for a hand, the series connection on the output side results in lower
certain maximal fuel flow rate. Moreover, since the fuel cell voltage ratings for output capacitors and diodes. Furthermore,
current is proportional to the hydrogen input, the amount phase shifted pulsewidth modulation (PWM) is used for the in-
of hydrogen generated in a direct hydrogen system could terleaved converter. In so doing, the input current ripple fre-
quency and the output voltage ripple frequency becomes four
times of the switching frequency. Hence, for the same input
Manuscript received December 13, 2005; revised April 4, 2006. The work
was supported by the Academic Research Fund and the National University of
current and output voltage ripple requirement, smaller input in-
Singapore under Grant R-263-000-248-112. Recommended for publication by ductors and output capacitors can be used. Texas Instrument
Associate Editor P. Barbosa. (TI) TMS320F243 digital signal processor (DSP) [11] is used
The authors are with the Department of Electrical and Computer Engineering,
National University of Singapore, Singapore 117576 (e-mail: [email protected].
to implement the PWM functions and closed loop control for a
sg). 1.2-kW ICFFB converter. Only one DSP microcontroller with
Digital Object Identifier 10.1109/TPEL.2006.889985 one XOR gate is used to realize the current shared control for
0885-8993/$25.00 © 2007 IEEE
544 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 2, MARCH 2007

Fig. 2. Schematic diagram of ICFFB converter.

Fig. 4. Equivalent circuits of ICFFB converter for each operating state when
D> 0.75: (a) stage t1/t3/t5/t7 (D-0.75)Ts; (b) stage t2 (1-D)Ts; (c) stage t4
(1-D)Ts; (d) stage t6 (1-D)Ts; and (e) stage t8 (1-D)Ts.

the first converter. In order to interleave the two converters,

we shift the switching scheme of the second converter by 90
to follow the first one. Hence 90 phase shift can be achieved
among all the four switching gate signals, as shown in Fig. 3.
From Fig. 3, it is seen that one switching period can be di-
vided into eight states (t1 t8). In order to obtain the same output
voltage when input voltage changes, may go from 0.75 to
0.75. The ripple waveform for 0.75 Fig. 3(a) is different
Fig. 3. Gate signals and main waveforms: (a) D >0.75 and (b) D <0.75. from that in case of 0.75 Fig. 3(b). Hence, equivalent cir-
cuits of ICFFB converter for each operating state are shown in
Figs. 4 and 5 for 0.75 and 0.75 respectively. Param-
both converters with 90 phase shift between the two converter eters for the circuit are listed in Table I. “ ” denotes snubber
PWM signals. capacitors. They absorb the over voltage caused by the current
interruption in the leakage inductance of the transformer. They
II. OPERATING STATES OF THE INTERLEAVED do not influence the main switching states of the circuit.
CFFB CONVERTER Operating stages of ICFFB converter when 0.75 (Fig. 4)
Fig. 2 shows the schematic diagram of the ICFFB converter. are:
Characteristic waveforms of the circuit are shown in Fig. 3. 1) States t1, t3, t5, t7 (t1 t3 t5 t7 0.75 :
During one switching cycle , each switch conducts for As shown in Fig. 4(a), all switches are on, both inductor
period, where is duty ratio. For the first module (upper one in currents increase. While on the secondary side of the trans-
Fig. 2), three switching states are possible: , off and , former, all capacitors are discharged by the load current .
on (t4 state in Fig. 3), , off and , on (t8 state in 2) State t2 (t2 1 ): Switches and turn off
Fig. 3) and all on (other states in Fig. 3). State t8 fol- Fig. 4(b). Current in inductor keeps increasing. How-
lows t4 by a phase shift of 180 . ever, inductor is discharged as the energy is transferred
Similarly, the second module (lower one in Fig. 2) has three to the secondary side through transformer . Hence,
switching states. It also uses the switching state sequence like is charged up by means of , while all the other capaci-
KONG AND KHAMBADKONE: ANALYSIS AND IMPLEMENTATION OF A HIGH EFFICIENCY ICFFB CONVERTER 545

4) State t6 (t6 1 ): This state Fig. 4(d) is very

similar to State t2 Fig. 4(b). However, here switches
and are off, which reverses the polarity at the secondary
of . Hence, conducts and is charged up.
5) State t8 (t8 1 ): As shown in Fig. 4(e), this state
is quite similar to State t4 Fig. 4(c). Switches and are
off, which reverses the polarity at the secondary winding
of . Hence, conducts and is charged up, see
waveforms in Fig. 3(a).
Similarly, when converters operate at 0.75 (Fig. 5),
State t1 in Fig. 4(a) does not exist anymore but some new states
are generated. Operating states t1, t3, t5 and t7 [Fig. 5(a), (c),
(e), and (g)] are very similar to the states t2, t4, t6, and t8 in
Fig. 4(a), respectively. Time interval for each of the states in
Fig. 5(a), (c), (e), and (g) is 0.5 . The new operating
states are:
1) State t2 (t2 0.75 ): Switches , , , turn
off Fig. 5(b), both inductors are discharged as the energy is
transferred to the secondary side through both transformers
and . and are charged up by means of
and , while the other capacitors are discharged by the
load current , see waveforms in Fig. 3(b).
2) State t4 (t4 0.75 ): This state [Fig. 5(d)] is very
similar to State t2 [Fig. 5(b)] except that , turn off
instead of , . Polarity at the secondary of is re-
versed. Hence and conduct, and are charged
up.
3) State t6 (t6 0.75 ): Switches , , ,
turn off Fig. 4(f), Polarity at secondary of is reversed.
Energy is transferred to the secondary side through both
transformers. and are charged up by means of
and , while the other capacitors are discharged by the
load current , see waveforms in Fig. 3(b).
4) State t8 (t8 ): This state Fig. 5(h) is similar
to State t6 Fig. 4(f) except that , turn off instead
Fig. 5. Equivalent circuits of ICFFB converter for each operating state when of , . Hence, and conducts, and are
D< 0.75: (a) stage t1 (D-0.5)Ts; (b) stage t2 (0.75-D)Ts; (c) stage t3 (D-0.5)Ts; charged up.
(d) stage t4 (0.75-D)Ts; (e) stage t5 (D-0.5)Ts; (f) stage t6 (0.75-D)Ts; (g) stage It is clearly observed from Fig. 3 that ripple frequency of the
t7 (1-D)Ts; and (h) stage t8 (0.75-D)Ts.
input current and output voltage is four times the switching
frequency.
TABLE I Next, we would like to develop a closed loop voltage control
CONVERTER PARAMETER DEFINITION with current sharing between the input inductors. To achieve
this, we need to develop the small signal model of the circuit.

III. SMALL SIGNAL ANALYSIS

Applying circuit analysis and state variable averaging over
switching period , we get

(1)

tors are discharged by the load current , see waveforms (2)

in Fig. 3(a).
3) State t4 (t4 1 ): Switches and turn off (3)
Fig. 4(c). Current in inductor keeps increasing. How-
ever, inductor is discharged as the energy is transferred (4)
to the secondary side through transformer . Hence,
conducts and is charged up while all the other capaci- In order to simplify the calculations, it is reasonable to assume
tors are discharged by the load current Fig. 3(a). that . By applying volt-seconds balance to the
546 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 2, MARCH 2007

Fig. 7. (a) Bode plot of C (s) 3 G s

( ) and (b) bode plot of C (s ) 3 T (s ) 3
G (s ) .

Fig. 6. Control diagram for the ICFFB converter.

and are small signal transfer functions from
duty ratio to individual inductor current, while is the
input inductors and charge balance to the output capacitors, small signal transfer function from input current to output
voltage transfer ratio of the proposed converter can be written voltage.
as
IV. CONTROLLER DESIGN
(5) For direct control of the input current, current controller
is necessary to regulate the source current at desired value.
When under ideal condition where the parasitic resistance of Moreover, in order to effectively reduce the input current
inductors is neglected, voltage transfer ratio of this ICFFB con- ripple, equal current sharing between the two input inductors
verter is is necessary. On the other hand, output voltage should be well
regulated during the load variations. Therefore, a closed loop
(6) voltage controller with current sharing is designed for the pro-
posed converter. Control schematic diagram is shown in Fig. 6.
Instead of controlling the output voltage of each module, the
Compared to the voltage ratio 2 in a conventional CFFB total output voltage is sensed and compared with the reference
converter, voltage ratio of the proposed converter is four times voltage. The voltage controller generates the total input current
of that in a conventional CFFB converter, as shown in (6). This reference. The reference current for each inductor is half of
is mainly due to the voltage-doubler circuit on the secondary the total input current reference. Hence, with the help of each
side and the series connection of output rectifiers. Therefore ac- inner current control loop, equal current sharing is realized
cording to (6), four parameters can be used to step up the input between the two input inductors. Overall closed loop function
voltage: i) converter duty ratio , ii) transformer turns-ratio is obtained as
, iii) voltage-doubler feature of output rectifiers ( 2), and iv)
series connection of output rectifiers ( 2).
(11)
Linearizing (1)–(4) at steady-state, and applying Laplace
transformation, we can obtain the control to output small signal
transfer functions where

(12)

(7) The controllers are designed for the following circuit speci-
fications: 33 V, 600 W, 10 kHz, 0.67,
178 H, 64 m , 100 F,
2. Bode plot of the control system is shown in Fig. 7.
Crossover frequency of the open loop transfer function for
(8) current is one tenth of the switching frequency and equal to
1 kHz. A phase margin of 60 is selected, Fig. 7(a). Similarly,
one tenth of the inner current loop crossover frequency (100 Hz)
is chosen as the outer voltage loop crossover frequency, see
(9) Fig. 7(b). Therefore, compensators and are ob-
tained as
where (13)

(10) (14)
KONG AND KHAMBADKONE: ANALYSIS AND IMPLEMENTATION OF A HIGH EFFICIENCY ICFFB CONVERTER 547

Fig. 8. Simulation result during the load changing with closed loop control:
(a) output voltage V and (b) input current i and inductor currents i =i .

Though the controller is designed based on two identical

modules, it is applicable to the practical circuit when the two
modules are not exactly the same. This can be seen from Fig. 9. Diagram for generating four phase shifted gate signals using one DSP
SIMPLORER circuit simulation result in Fig. 8. The inductor microcontroller.
values were taken as ( 178.8 H, 64 m ) and
( 177 H, 68.6 m ) for this simulation. When output
power changes from 600 to 1200 W, we can see that output
voltage is regulated back to 400 V in about 20 ms, and the input
current is equally distributed between the two inductors.

V. CONTROLLER IMPLEMENTATION
Texas Instrument (TI) TMS320F243 DSP microcontroller is
used to implement PWM functions and closed loop control.
Four PWM gate signals with phase shift of 90 are necessary for
the proposed converter. However, there are only two indepen-
dent General Purpose (GP) timers in this type of DSP. Hence,
it can only generate two synchronized phase-shifted gate sig-
nals. Though we can obtain the third gate signal by manipu-
lating the compare register of one of the six PWM output chan- Fig. 10. Phase shifted gate signals for ICFFB (experiment).
nels, it is not possible to obtain the fourth signal. Although this
problem can be solved by using two DSP microcontrollers, it
will increase the cost and introduce synchronization problem and , respectively, symmetric PWM waveforms ,
between the two DSP microcontrollers. One could also use a and , are generated as shown in Fig. 9. , is delayed
FPGA externally but that increases the component cost. Hence in phase by 90 with respect to , , which can be seen in
a simple method is proposed here to generate four phase-shifted Fig. 10. By comparing with , ,
gate signals using only one DSP microcontroller and one XOR ( ) is generated with 180 phase shift to , (Fig. 10).
gate. Working principle is shown in Fig. 9. All the functions in Similarly, by comparing and
the dashed block are realized via software. Fig. 10 shows the with (Fig. 9), and
experimental waveform of the phase shifted gate signals to the can be obtained respectively. We can XOR signals ,
switches. and , to obtain signal , , which is 180
and are controllable parameters which are phase delayed respective to , as shown in Fig. 10. Now all
represented as and , where or is the duty ratio four gate signals are generated using one DSP microcontroller.
for each module, respectively. and are written IR2110s are used as the MOSFET gate drivers. The sensed
to compare registers and updated during each switching period current and voltage signals are fed back to the DSP core by
. is written to both timer counter and as 10-b ADC channels. Once this is done, the digitized feedback
seen in Fig. 9. is synchronized with with phase voltage , is subtracted from the reference voltage. The error
delay of 90 . By comparing and with signal , is an input to a digital PI compensator and output is
548 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 2, MARCH 2007

TABLE II
CONVERTER SPECIFICATION

saved as the current reference after a limiter. The current refer-

ence is divided equally to feed as the inductor reference current.
Again, the errors between the reference current and the mea-
sured current are compensated and written to the PWM gener-
ator as and .

VI. EXPERIMENTAL RESULTS

A 1.2-kW ICFFB converter is built and tested. Experimental

circuit specifications are listed in Table II.
Fig. 11 shows the steady-state waveforms of the ICFFB con-
verter when operating at 1120 W. It is observed that inductor Fig. 11. Steady state waveforms of the ICFFB converter at 1120 W (exper-
iment): (a) input current i , inductor currents i =i and output current i ;
current ripple is about 20% of rated inductor current. While the (b) output voltage V and input voltage V ; and (c) output capacitor voltage
input current ripple is reduced to 5% of the rated input current 1 1
ripple V , V and output voltage ripple V . 1
due to the phase shift between the two parallelled converters.
Fig. 11(c) shows the waveform of the output voltage ripple. It
must be noted that due to the effect of ESR of the output capac- quickly reach its new steady state while output voltage can be
itor and the leakage inductance of the transformer, this ripple regulated at 150 V in about 20 ms.
waveform looks different from the one in Fig. 3, which is based Table III gives the comparison of magnetic components for
on ideal analysis. The voltage ripple is about 3 V, which is only the ICFFB converter and the CFFB converter. From the table,
0.75% of the rated voltage. Fig. 12 shows the measured effi- we can see that core volume and total weight of the magnetic
ciency of the ICFFB converter for increasing output power from components of the ICFFB converter have been reduced by about
0 W to 1120 W. Efficiency is 90.5% at 1120 W. Fig. 13(a) 50%. Efficiency of ICFFB converter is 1.5% greater than that
shows the dynamic response of the proposed converter for a of CFFB converter at full load. It is also noted from Table III
load step from 90 to 135 W. The voltage sag is about 20 V. that the number of switches used in ICFFB converter is twice
While Fig. 13(b) shows the dynamic response for a load step of that in CFFB converter. However one can use lower rating
from 135 W to 90 W. Voltage overshoot is about 25 V. From components. Under faulty condition when one of the converter
both Fig. 13(a) and (b), it can be seen that input current can modules fails, we can still operate the system at quarter load.
KONG AND KHAMBADKONE: ANALYSIS AND IMPLEMENTATION OF A HIGH EFFICIENCY ICFFB CONVERTER 549

TABLE III
COMPARISON BETWEEN ICFFB AND CFFB CONVERTERS

Fig. 12. Measured converter efficiency vs. output power (experiment)

D=
( 0.67, V = 400 V).

high power fuel cell system. Only one DSP microcontroller is

used to generate all phase shifted gate signals and to implement
closed loop control. A 1.2-kW ICFFB converter has been built
and tested. Experimental results are provided to verify the oper-
ating principle and simulation result.

REFERENCES
[1] J. E. Larminie and Dicks, Fuel Cell Systems Explained. New York:
Wiley, 2002.
[2] K. Rajashekara, Propulsion System Strategies for Fuel Cell Vehicles
Tech. Rep., Energenix Ctr., Delphi Automotive Syst., Mar. 2000, Tech.
Rep..
[3] Fuel Cell Control, Ltd., Tech. Rep., DC–DC Converter Module 2006
[Online]. Available: http://www.fuelcellcontrol.com/dcconverter.html
[4] R. Gopinath, S. Kim, and J.-H. Hahn, “Development of a low cost
fuel cell inverter system with DSP control,” in Proc. IEEE 33rd Annu.
Power Electron. Spec. Conf. (PESC’02), Jun. 23–27, 2002, vol. 1, pp.
309–314.
[5] A. M. Tuckey and J. N. Krase, “A low-cost inverter for doemestic fuel
cell applications,” in Proc. IEEE 33rd Annu. Power Electron. Spec.
V i
Fig. 13. Dynamic response of output voltage , output current , input cur-
Conf. (PESC’02), Jun. 23–27, 2002, vol. 1, pp. 339–346.
i i
rent and inductor current (experiment): (a) load steps from 90 to 135 W
[6] G. K. Andersen, C. Klumpner, S. B. Kjær, and F. Blaabjerg, “A
new green power inverter for fuel cells,” in Proc. IEEE 33rd Annu.
and (b) load steps from 135 W to 90 W.
Power Electron. Spec. Conf. (PESC’02), Jun. 23–27, 2002, vol. 2, pp.
727–733.
[7] P. T. Krein and R. Balog, “Low cost inverter suitable for medium-
power fuel cell sources,” in Proc. IEEE 33rd Annu. Power Electron.
In this case, the output voltage has to be reduced to half of the Spec. Conf. (PESC’02), Jun. 23–27, 2002, vol. 1, pp. 321–326.
rated voltage. [8] T. A. Nergaard, J. F. Ferrell, L. G. Leslie, and J.-S. Lai, “Design con-
siderations for a 48 V fuel cell split single phase inverter syatem with
ultracapacitor energy storage,” in Proc. IEEE 33rd Annu. Power Elec-
VII. CONCLUSION tron. Spec. Conf. (PESC’02), Jun. 23–27, 2002, vol. 4, pp. 2007–2012.
[9] E. Santi, D. Franzoni, A. Monti, D. Patterson, F. Ponci, and N. Barry,
An ICFFB converter is proposed in this paper with a par- “A fuel cell based domestic uninterruptible power supply,” in Proc.
allel input/series output scheme. Input current ripple is about Appl. Power Electron. Conf. Expo (APEC’02), Mar. 10–14, 2002, vol.
1, pp. 605–613, 2002.
5% of the rated input current. Total core volume and weight of [10] X. Kong, L. T. Choi, and A. M. Khambadkone, “Analysis and con-
magnetic components are reduced by 50%. Furthermore, about trol of isolated current-fed full bridge converter in fuel cell system,”
90.5% efficiency is obtained at full power. Based on high ef- in Proc. 30th Annu. Conf. IEEE Ind. Electron. Soc. (IECON’04), Nov.
2–6, 2004, vol. 3, pp. 2825–2830.
ficiency, small magnetic components, and small input current [11] “TMS320F243 DSP Controllers Reference Guide,” Texas Instruments,
ripple, this ICFFB converter seems to be more suitable for a Inc., 2000.
550 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 2, MARCH 2007

Xin Kong (S’05) received the B.Eng. and M.Eng. Ashwin M. Khambadkone (SM’04) received
degrees in electrical engineering from Xi’an Jiaotong the Dr.-Ing. degree from Wuppertal University,
University, Xi’an, China, in 1994 and 1997, respec- Wuppertal, Germany, in 1995 and the Graduate
tively, and is currently pursuing the Ph.D. degree Certificate in education from the University of
in fault analysis and protection in power systems Queensland, Brisbane, Australia.
from the Department of Electrical and Computer At Wuppertal, he was involved in research and in-
Engineering, National University of Singapore, dustrial projects in the areas of PWM methods, field-
Singapore. oriented control, parameter identification, and sen-
She joined the Shandong Electric Power Engi- sorless vector control. From 1995 to 1997, he was a
neering Consulting Institute in 1997, where she was Lecturer at the University of Queensland. He was also
involved in several design projects of power plants. at the Indian Institute of Science, Bangalore, India in
Her research interests are fuel cell modeling and design and control of high 1998. Since 1998, he has been an Assistant Professor at the National University
power electronic converters. of Singapore. His research activities are in the control of AC drives, design and
control of power electronic converters and fuel cell based systems.
Dr. Khambadkone received the Outstanding Paper Award in 1991 and the
Best Paper Award in 2002 both which appeared in the IEEE TRANSACTION ON
INDUSTRIAL ELECTRONICS.