Ug1259 Model Composer Tutorial
Ug1259 Model Composer Tutorial
Introduction
Xilinx® Model Composer is a model-based design tool that enables rapid design exploration within the
Simulink® environment and accelerates the path to production on Xilinx programmable devices through
automatic code generation.
Model Composer is designed as an add-on to Simulink and provides a library of performance-
optimized blocks for design and implementation of algorithms on Xilinx FPGAs. The Model Composer
library offers over 80 predefined blocks, including application-specific blocks for Computer Vision and
Image Processing and functional blocks for Math, Linear Algebra, Logic, and Bit-wise operations, among
others.
You can focus on expressing algorithms using blocks from the Xilinx Model Composer library as well as
custom user-imported blocks, without worrying about implementation specifics, and leverage all the
capabilities of Simulink’s graphical environment for algorithm design, simulation, and functional
verification. Model Composer then transforms your algorithmic specifications to production-quality
implementation using automatic optimizations that extend the Xilinx High Level Synthesis technology.
This tutorial introduces the end-to-end workflow for using Model Composer.
The included labs are as follows:
• Lab 1: Introduction to Model Composer
o Introduction to Model Composer Library Blocks for design
o Integration with native Simulink and Support for vectors and matrices
o Working with data types
• Lab 2: Create Custom Blocks in Model Composer
o Using the xmcImportFunction command to specify functions defined in source and header
files to import into Model Composer and create Model Composer blocks or a block library.
o Creating custom blocks with Function templates.
• Lab 3: Debugging Imported C/C++-Code Using GDB Debugger
o Identifying the custom library block, created using the xmcImportFunction feature.
o Debugging C/C++ code using the GDB tool.
• Lab4: Debugging Imported C/C++-Code Using Visual Studio
o Identifying the custom library block, created using the xmcImportFunction feature.
o Debugging C/C++ code using Visual Studio.
Software Requirements
The lab exercises in this tutorial require that you have installed the following software:
• MATLAB™: The MATLAB releases and simulation tools supported in this release of Model
Composer are described in the Compatible Third-Party Tools section of the Vivado Design Suite
User Guide: Release Notes, Installation, and Licensing (UG973).
• Vivado® Design Suite release: 2019.1 (Includes Vivado HLS)
• Model Composer: 2019.1
See the Vivado Design Suite User Guide: Release Notes, Installation, and Licensing (UG973) for a
complete list and description of the system and software requirements
• On Linux systems:
You launch Model Composer under Linux using a shell script called model_composer located
in the <Model_composer_install_dir>/2019.x/bin directory. Before launching this
script, you must make sure the MATLAB executable can be found in your Linux system’s $PATH
environment variable for your Linux system. When you execute the model_composer script, it
will launch the first MATLAB executable found in $PATH and attach Model Composer to that
Model-Based Design Using Model Composer www.xilinx.com Send Feedback
6
UG1259 (v2019.1) May 29, 2019
Model Composer Lab Overview
session of MATLAB. Also, the model_composer shell script supports all the options that
MATLAB supports and all options can be passed as command line arguments to the
model_composer script.
When Model Composer opens, you can confirm the version of MATLAB to which Model Composer is
attached by entering the version command in the MATLAB Command Window.
>> version
ans =
'9.2.0.538062 (R2017a)'
RECOMMENDED: You will modify the tutorial design data while working through this tutorial.
You should use a new copy of the ModelComposer_Tutorial directory extracted from
ug1259-model-composer-tutorial.zip each time you start this tutorial.
TIP: This document assumes the tutorial files are stored at C:\ModelComposer_Tutorial. All
pathnames and figures in this document refer to this pathname. If you choose to store the tutorial
in another location, adjust the pathnames accordingly.
TIP: Make sure to save the tutorial files in a folder structure with no spaces in them. There is a
known limitation that does not support spaces in the directory structure for code generation.
Introduction
This tutorial shows how you can use Model Composer for rapid algorithm design and simulation in the
Simulink® environment.
Procedure
This lab has the following steps:
The Model Composer blocks are organized into subcategories based on functionality. Spend a few
minutes navigating through the sub-libraries and familiarizing yourself with the available blocks.
4. From the Library Browser, select the Gradient Magnitude block from the Xilinx Model Composer
library (also found in the Computer Vision sub-library), drag it into the model, and connect the X
and Y outputs of the Sobel Filter block to the input of this block.
5. Connect the rest of the blocks to complete the algorithm as shown in the following figure:
6. Select the Simulation > Run command or click the button to simulate the model and view the
results of the Sobel Edge Detection algorithm.
Note: The Model Composer blocks can operate on matrices (image frames in the following figure).
One way to assess the simulation performance of the algorithm is to check the video frame rate of the
simulation. To do this:
7. Add the Frame Rate Display block from the Simulink Computer Vision System Toolbox (under
the Sinks category) and connect it to the output of the algorithm as shown in Figure 6.
8. Simulate the model again to see the number of video frames processed per second.
17. Open the Data Type Conversion blocks at the inputs of the RGB to YCbCr Subsystem, and do the
following:
18. Add the Data Type Conversion blocks at the output of the RGB to YCbCr Subsystem and set the
Output data type parameter to single. This will enable connecting the output signals to the Video
Viewer blocks for visualization.
19. Double-click the RGB to YCbCr subsystem to descend the hierarchy and open the model. Within
the RGB to YCbCr subsystem, there are subsystems to calculate Y, Cb, and Cr components using
Gain and Constant blocks.
You can control the fixed point types for the gain parameter in the Gain blocks and the value in the
Constant blocks. You can do this by opening up the Calculate_Y, Calculate_Cb, and Calculate_Cr
blocks and setting the data types as follows.
For Gain blocks, set the Gain data type to fixed and the following options appear:
o Signedness to Signed
o Gain data type to fixed
o Word length to 8
o Fractional length to 7
For Constant blocks, on the Data Types tab set the Output data type to fixed and the following
options appear:
o Signedness to Signed
o Output data type to fixed
o Word Length to 8
o Fractional Length to 7
TIP: You can use the View > Property Inspector command to open the Property
Inspector window. When you select the different Gain or Constant blocks, you can see
and modify the properties on the selected block.
Make sure you do this for all the Constant and Gain blocks in the design. Update the model
(Ctrl+D) and observe the fixed point data types being propagated along with automatic bit growth
in gain blocks and adder trees in the design as shown below:
The general format used to display the Xilinx fixed point data types is as follows:
x_[u/s]fix[wl]_En[fl]
u: Unsigned
s: Signed
wl: Word Length
fl: Fractional Length
For example, x_sfix16_En8 represents a signed fixed point number with Word Length=16 and
Fractional Length=8.
You can view a completed version of the design here:
ModelComposer_Tutorial\Lab1\Section2\solution\Colorspace_Conversion_fixed
.slx
This enables Model Composer blocks to control the data types in the design using workspace
variables, in this case InputDataType and FDataType that you can easily change from the
MATLAB command prompt.
3. Update the model (Ctrl+D) and observe the fixed-point data types propagated through the blocks.
The other Model Composer blocks in the design will automatically take care of the bit-growth in the
design. If you want more control over the fixed point data types at other intermediate portions of
the design, you can insert Data Type Conversion blocks wherever necessary.
4. To change the fixed point types in the Gain and Constant blocks, type the following at the MATLAB
command prompt:
>> FDataType = 'x_sfix8_En6'
>> InputDataType = 'x_ufix8_En6'
'x_sfix8_En6' represents a signed fixed point number with Word Length 8 and Fractional Length 6.
Now update the model (Ctrl+D) and observe how the fixed-point data types have changed in the
design.
5. Simulate the model and observe the results from the design. Try further changing InpuDataType
and FDataType variables through command line and iterate through multiple word lengths and
fractional lengths. See the Additional Details section below for information on specifying rounding
and overflow modes.
Additional Details:
In the example above, we only specified the Word Length and Fractional Length of the fixed point data
types using data type expressions. However, for greater control over the fixed point types in your
design, you can also specify the Signedness, Rounding, and Overflow. In general the format used for
specifying fixed point data types using the data type expression is
x_[u/s]fix[wl]_En[fl]_[r<round>w<overflow>]
u: Unsigned
s: Signed
wl: word length
fl: Fractional length
<round>: Specify the corresponding index from table below. It's optional. If not specified, default value
is 6 (Truncation to minus infinity). Note that for the rounding cases (1 to 5), the data is rounded to the
nearest value that can be represented in the format. When there is a need for tie breaker, these
particular roundings behave as specified in the Meaning column.
Table 1: Rounding Index
Index Meaning
<overflow>: Specify the corresponding index from table below. It's optional. If not specified, default
value is 4 (Wrap around)
Table 2: Overflow Index
Index Meaning
1 Saturation
2 Saturation to Zero
3 Symmetrical Saturation
4 Wrap Around
5 Sign-Magnitude Wrap Around
Conclusion
In this lab, you learned:
• How to connect Model Composer blocks directly to native Simulink blocks.
• How the Model Composer blocks support Vectors and Matrices, allowing you to process an
entire frame of an image at a time without converting it from a frame to a stream of pixels at the
input.
• How to work with different data types.
• How to use the Data Type Conversion block to control the conversion between data types,
including floating-point to fixed-point data types.
Note: Model Composer Supports the same floating and integer data types as Simulink blocks.
Model Composer also supports Xilinx fixed point data types.
The following solution directories contain the final Model Composer files for this lab:
C:\ModelComposer_Tutorial\Lab1\Section1\solution
C:\ModelComposer_Tutorial\Lab1\Section2\solution
Introduction
Model Composer lets you import Vivado HLS library functions and user C/C++ code as custom blocks
to use in your algorithm for both simulation and code generation.
The Library Import feature is a MATLAB function, xmcImportFunction, which lets you specify the
required source files and automatically creates an associated block that can be added into a model in
Simulink.
This lab primarily have two parts
• In Step 1, you are introduced to the xmcImportFunction function, and walk through an
example.
• In Step 2, you will learn about the Model Composer feature that enables you to create custom
blocks with function templates
For more details and information about other Model Composer features, see the Model Composer User
Guide (UG1262).
IMPORTANT: You can use the const qualifier in the function signature to identify the
inputs to the block or use the pragma INPORT.
In the case of the basic_array function, the in1 and in2 arguments are identified as inputs.
void basic_array(
uint8_t out1[4],
const uint8_t in1[4],
const uint8_t in2[4])
2. To learn how to use the xmcImportFunction function, type help xmcImportFunction at the
MATLAB command prompt to view the help text and understand the function signature.
3. Open the import_function.m MATLAB script, and fill in the required fields for the
xmcImportFunction function in this way:
xmcImportFunction('basic_array_library', {'basic_array'}, 'basic_array.h',
{'basic_array.cpp'}, {});
Notice that a Simulink library model opens up with the generated block basic_array.
Save this Simulink library model.
5. Double-click the basic_array block, and look at the generated interface.
The following figure shows the Block Parameters dialog box for basic_array:
6. Open the test_array.slx model, which is just a skeleton to test the generated block.
7. Add the generated basic_array block into this model, then connect the source and sink blocks.
8. Simulate this model and observe the results in the display block.
3. In the piece of code, note the #pragma XMC INPORT vector_in. This is a way to manually
specify port directions using pragmas. Here, we are specifying the function argument vector_in
as the InputPort. Similarly, we can define XMC OUTPORT also.
Note: For additional information about specifying ports, see Importing C/C++ Code as Custom Blocks
in the Model Composer User Guide (UG1262).
4. Notice the use of template before the function declaration. To support the inputs of different
sizes, NUMOFELEMENTS is declared as a parameter and used the same while defining an array
vector_in as shown below. This allows you to connect signals of different sizes to the input port
of the block.
5. Notice the template parameters W and I which are declared to accept signals with different word
lengths and integer lengths.
Now create the library blocks for Mux and Demux functions using the xmcImportFunction
command and complete the design below with custom blocks.
8. Double-click the import_function.m script file in the MATLAB command window and observe
the following commands that generate library blocks to embed into your actual design.
>>xmcImportFunction('design_lib',{'Demux'},'template_design.h',{},{'$XILINX_VIVADO_
HLS/include'},'ov erride','unlock')
>>xmcImportFunction('design_lib',{'Mux'},'template_design.h',{},{'$XILINX_VIVADO_HL
S/include'},'over ide','unlock')
10. Observe the generated library blocks in the design_lib.slx library model file and save it to
working directory.
11. Copy the Demux and Mux blocks and paste them in the design.slx file and connect them as
shown below.
d. Next, double-click the Mux block and observe the Template parameters and Dimension.
13. Add a Display block at the input and output as shown below and simulate the model to observe the
results.
14. To understand how templatized inputs add advantage and flexibility to your design, perform the
following:
e. Double-click the DTC block.
f. In the Block Parameters dialog box, change the Word length from 16 to 32.
g. Change the Fractional length from 8 to 16.
h. Click OK and press Ctrl+D. Observe the signal dimensions in the design.
To make sure the output is correct, run the simulation and observe that the same block can still be
used in a generic way for different values of Word length and Fractional length. This is possible only
because we have templatized the W and I values in our C design.
15. For an additional understanding of template parameters, perform the following:
i. Click the arrow mark beside the Model Configuration Parameters icon and select the Model
Properties option.
j. In the Model Properties window, go to the Callbacks tab and select initFcn and edit the SSR
value from 8 to 16 as shown below.
k. Click OK and press Ctrl+D to observe the change in the number of elements in the Constant
block output vector. The bitwidth changes when we change the datatype on the input DTC. This
is possible only because of the template parameter NUMOFELEMENTS.
l. Run the simulation and validate the output according to the input values.
Note: For information about features such as function templates for data types and pragmas to
specify which data type a template variable supports, see Defining Blocks Using Function
Templates in the Model Composer User Guide (UG1262).
Conclusion
In this lab, you learned:
• How to create a custom block using the xmcImportFunction in Model Composer.
• How to create a block that accepts signals with different fixed-point lengths and fractional
lengths.
• How to use the syntax for using a function template that lets you create a block that accepts a
variable signal size or data dimensions.
• How to perform simple arithmetic operations using template variables.
Note: Current feature support enables you to import code that uses:
o Vectors and 2D matrices
o Floating, integer, and Vivado HLS fixed-point data types
The following solution directory contains the final Model Composer (*.slx) files for this lab.
C:\ModelComposer_Tutorial\Lab2\section1\solution
C:\ModelComposer_Tutorial\Lab2\section2\solution
Introduction
Model Composer provides the ability to debug C/C++ code that has been imported as a block using
the xmcImportFunction command, while simulating the entire design in Simulink®.
The debug flow in Model Composer is as follows:
1. Specify the debug tool using the xmcImportFunctionSettings command.
2. Launch the debugging tool.
3. Add a breakpoint in the imported function.
4. Attach to the MATLAB® process.
5. Start Simulink simulation.
6. Debug the imported function during simulation.
This lab has two steps:
• Step 1 introduces you to the Optical Flow demo design example in Model Composer. It shows
you how to identify the custom library block, created using the xmcImportFunction feature.
• Step 2 shows you how to debug C/C++ code using the GDB tool.
For more details and information about how to create custom blocks, follow this link to Chapter 3:
Importing C/C++ Code as Custom Blocks in the Model Composer User Guide, (UG1262).
3. In the Model Composer examples dialog box select optical flow and click Open example. This
opens the example design.
4. Double click on the block labeled Lucas-Kanade and observe the calculating_roots block.
Note that, this block has been generated using the xmcImportFunction feature. Its function
declaration can be seen by double-clicking on the block.
5. To view the function definition of calculating_roots, navigate to the current folder in the MATLAB
window and double-click on calculating_roots.h.
The setup is now ready for you to debug your C/C++ code. In next step, you will see how to debug the
code using GDB tool debugger.
2. Press Enter to see the applied settings in command window, as shown below.
Note the gdb link that you will use to invoke the debugger tool, and the MATLAB process ID that
you will use to attach the process to the debugger.
3. Click on the gdb link, to invoke the Windows command prompt and launch gdb.
4. At the Windows command prompt, use the following command to specify the break point in the
calculating_roots.h file where you want the code to stop executing. Press Enter to run the
command.
(gdb) break calculating_roots.h:53
Note: The “53” in the above command, tells the GDB debugger to stop the simulation at line 53
of your program.
5. Once the command runs, you can see a pending break point in the command window. This is shown
in the following figure.
If you see any questions from GDB, answer “yes” and press Enter.
6. To attach the MATLAB process to the GDB debugger, type the following:
(gdb) attach <process_ID>
Enter the <process ID> you saw in step 2. For example “15972”.
As soon as the MATLAB process is attached, the MATLAB application gets frozen and becomes
unresponsive.
8. Now go the Simulink model and run the simulation by clicking the Run button.
9. The model takes some time to initialize. As the simulation starts, you see the simulation come to the
break point at line 53 in the Windows command prompt.
Now, type the command list to view the lines of code around line 53.
(gdb) list
10. Now, type command step to continue the simulation one line to the next step.
(gdb) step
IMPORTANT: The following are some useful GDB commands for use in debugging:
• (gdb) list
• (gdb) next (step over)
• (gdb) step (step in)
• (gdb) print<variable>
• (gdb) watch <variable>
11. Type print r to view the values of variables at that simulation step. This gives the result as shown
below.
12. You can try using more gdb commands to debug and once you are done, type quit to exit GDB,
and observe that the Simulink model continues to run.
Conclusion
In this lab, you learned:
• How to specify a third party debugger and control the debug mode using
xmcImportFunctionSettings
• How to debug source code associated with your custom blocks using the GDB debugger, while
leveraging the stimulus vectors from Simulink.
Introduction
Model Composer provides the ability to debug C/C++ code that has been imported as a block using
the xmcImportFunction command, while simulating the entire design in Simulink®.
The debug flow in Model Composer is as follows:
1. Specify the debug tool using the xmcImportFunctionSettings command.
2. Launch the debugging tool.
3. Add a breakpoint in the imported function.
4. Attach to the MATLAB® process.
5. Start Simulink simulation.
6. Debug the imported function during simulation.
This lab has two steps:
• Step 1 introduces you to the Color Detection design example in Model Composer, and shows
you how to identify the custom library block created by the xmcImportFunction feature.
• Step 2 shows you the process used to debug the C/C++ code using Visual Studio.
Note: To complete this lab, you must have already installed Microsoft Visual Studio in your Windows
machine.
For more details and information about how to create custom blocks, follow this link to Chapter 3:
Importing C/C++ Code as Custom Blocks in the Model Composer User Guide, (UG1262).
3. From the above list, select color_detection and click Open example, which opens the example
design as shown in the following figure.
4. Double click on the block labeled Color_detection and observe the RGB2HSV_XMC block.
Note that, this block has been generated using the xmcImportFunction feature and the function
declaration can be seen by double-clicking on the RGB2HSV_XMC block.
5. To view the function definition of RGB2HSV_XMC, navigate to current folder in the MATLAB window
and double click on RGB2HSV_wrap.h.
The setup is now ready for you to debug your C/C++ code. In next step, you will see how to debug the
code using Visual Studio debugger.
Press Enter.
This command picks the installed Visual Studio in your machine for debugging.
2. Observe the version and location of Visual Studio from the MATLAB console.
3. Type the following in the MATLAB console to get more information on this command and also to
set different version of Visual studio.
>>help xmcImportFunctionSettings
4. Invoke Visual Studio from your install directory to start debugging C/C++ code.
5. In the Visual Studio startup page, open the C/C++ file that you want to debug.
Click on File > open > File and browse to the location where the Color Detection example design
resides. Select the file RGB2HSV_wrap.h and click Open.
8. Next, attach the MATLAB process to the debugger by clicking the Attach icon in the tool bar as
shown in the following figure.
9. In the Attach to Process dialog box, which is opened, search for the process MATLAB.exe.
When attaching Visual Studio to the MATLAB process, you must make sure to set the Attach to
field to choose Native Code from the drop down menu as highlighted above.
Click on Attach button and now, your MATLAB process got attached to the debugger.
10. Now, go back to the Simulink model and start simulating the color_detection design.
11. The simulation process may take some time to initialize. Once this is done, switch back to the Visual
Studio GUI to start debugging.
If any Exception is thrown by Visual Studio, simply un-check Break when this exception type is
thrown in the Exception settings and click Continue.
12. You can now see the simulation hitting the break point in Visual Studio.
13. To debug, you can use the step over icon in the tool bar.
IMPORTANT: Click the step into icon to execute the next line of the code. If the
line involves a call to an operation, it steps into the operation’s implementation
and breaks the execution on the first action of that implementation.
Clicking the step over icon does not step into the line’s implementation details,
but steps to next line of code after the call.
14. Observe the values of variables at each corresponding step, as you progress with debugging.
15. You can change the breakpoint to a different line, by removing the initial break point, and setting a
new one for example at Line 22 and clicking the Continue button from tool bar.
Now you can observe the break point hitting Line 22.
16. Now, remove all the break points and click the Continue button. You can see the model running.
Note: As the design is running in debug mode, the simulation may progress slowly.
Note: You can always set a break point as long, as the design is simulating.
17. Once you are done with debugging, you can the click Stop debugging button in the tool bar.
18. Now, to come out of debugging mode in MATLAB, type the following command in MATLAB console
and press Enter.
>> xmcImportFunctionSettings('build','release');
Now, you can run the imported C/C++ code in release mode.
Conclusion
In this lab, you learned:
• How to specify a third party debugger and control the debug mode using
xmcImportFunctionSettings
• How to debug source code associated with your custom blocks using Microsoft® Visual Studio,
while leveraging the stimulus vectors from Simulink.
Introduction
In this lab, you look at the flow for generating output from your Model Composer model and moving it
into downstream tools like Vivado HLS for RTL synthesis, or into System Generator, or the Vivado
Design Suite for implementation into a Xilinx device.
Procedure
This lab has five steps:
In Step 1, you will review the requirements for automatic code generation.
In Step 3, you will look at the flow for generating an IP from your Model Composer design.
In Step 4, you will look at the flow for generating HLS Synthesizable C++ code from the Model
Composer design.
In Step 5, you will look at the flow to port a Model Composer design back into System Generator for
DSP as a block.
Note: In addition to the base Model Composer blocks, a subset of native Simulink blocks such as
From, Goto, Bus Creator, Bus Selector, If, and others, are supported. The supported Simulink blocks
appear within the Xilinx Model Composer libraries as well.
Next, you add the Model Composer Hub block at the top level of your design.
4. Open the Simulink Library Browser and navigate to Xilinx Model Composer Tools sub-library.
5. Find the Model Composer Hub block, and add it into the design as shown in the following figure:
Next, you use the Model Composer Hub block to select the code generation options for the design.
6. Double-click the block to open the block interface and set up as shown in the following figure:
7. On the Compilation tab, you can set the following options as shown in above figure:
• Target directory: In this case, use ./codegen_edge_detection for the generating code.
• Subsystem name: In this case, use the Edge Detection subsystem. You can have multiple
subsystems at the top-level and use the Model Composer Hub block to select and
individually compile the subsystem you want.
• Export Type: This option determines what you want to convert your design into. In this case
IP Catalog (default). You can select other compilation targets from drop down.
o Vivado HLS Synthesizable C++ code
o System Generator for DSP
8. On the Hardware tab, you can specify the target FPGA clock frequency in MHz. The default value is
200MHz.
This is a slightly modified version of the Edge Detection algorithm that uses the YCbCr video format
at the input and output.
2. Simulate the model to see the results in the Video Viewer blocks.
3. Open the Simulink Library browser, navigate to the Xilinx Model Composer > Tools sub-library and
add the Interface Spec block inside the Edge Detection subsystem as shown in the following
figure:
• Function Protocol: This is the block-level Interface Protocol which tells the IP when to start
processing data. It is also used by the IP to indicate whether it accepts new data, or whether it has
completed an operation, or whether it is idle.
• Input Ports: Detects the Input ports in your subsystem automatically and allows specifying the
port-level Interface Protocol for each input port of the subsystem.
• Output Ports: Similar to the Input Ports tab, this tab detects the Output ports in the subsystem,
and allows specifying the port-level Interface Protocol for each output port of the subsystem.
5. For this design, leave the Function Protocol mode at the default AXI4-Lite Slave and configure the
Input ports and Output ports tabs as shown in the following figures:
• The Bundle parameter is used in conjunction with the AXI4-Lite or AXI4-Stream (video) interfaces
to indicate that multiple ports should be grouped into the same interface. It lets you bundle
multiple input/output signals with the same specified bundle name into a single interface port
and assigns the corresponding name to the RTL port.
For example in this case, the specified settings on the Input ports tab result in the YCbCr inputs
being mapped to AXI4-Stream (video) interfaces and bundled together as an image_in port in
the generated IP while the YCbCr outputs are bundled together as an image_out port.
• The Video Format drop-down menu lets you select between the following formats:
o YUV 4:2:2
o YUV 4:4:4
o RGB
o Mono/Sensor
• The Video Component drop-down menu is used to subsequently select the right component:
R,G,B,Y,U,V.
At the end of the IP generation process, Model Composer opens the Performance Estimates and
Utilization Estimates (from Vivado HLS Synthesis report) in the MATLAB Editor, as shown in the
following figures:
You can also see a summary of the generated RTL ports and their associated protocols at the bottom of
the report.
Note: The actual timing and resource utilization estimates may deviate from above mentioned
values, based on the Vivado HLS build you choose.
5. Launch Vivado IDE and perform the following steps to add the generated IP to the IP Catalog.
6. Create a Vivado RTL project.
When you create the Vivado RTL project, specify the Board as Kintex-7 KC705 Evaluation
Platform (which is the same as the default Board in the Model Composer Hub block).
7. In the Project Manager area of the Flow Navigator pane, click Settings.
m. From Project Settings > IP >Repository, click the “+” button and browse to
codegen_IP\Edge_Detection_prj\solution1\impl\ip.
n. Click Select and see the generated IP get added to the repository.
o. Click OK.
8. To view the generated Edge_detection IP in the IP catalog, search for “Edge_detection”. The
generated Edge_detection IP, now appears in the IP catalog under Vivado HLS IP as shown in the
following figure.
You can now add this IP into an IP integrator block diagram, as shown in the following figure:
Note:
o Edge_Detection.cpp is the main file generated for the subsystem.
o run_hls.tcl is the Tcl file needed to create the Vivado HLS project and synthesize the
design.
5. In the design, open the Model Composer Hub block dialog box, and modify the block settings,
shown in the following figure, as follows:
• Check the Create and execute testbench checkbox.
• Modify the Target Directory folder.
6. Click Apply and regenerate the code by clicking the Generate button. Click OK after you see Done
Verification in the status bar.
You should now see a new folder, codegen_edge_detection2, in your current folder.
7. Open the codegen_edge_detection2 folder and explore the generated code files.
With the Create and execute testbench option selected on the Model Composer Hub block,
Model Composer logs the inputs and outputs at the boundary of the Edge Detection subsystem and
saves the logged stimulus signals in the signals.stim file. The tb.cpp file is the automatically-
generated test bench that you can use for verification in Vivado HLS. At the end of the code
generation process, Model Composer automatically verifies that the output from the generated
code matches the output logged from the simulation and reports any errors.
Choosing System Generator as the Export type, and clicking Generate, creates a synthesized RTL block
that you can directly add to a System Generator design using the Vivado HLS block in System Generator.
In this lab, you create an IP using Model Composer and then use the synthesized RTL as a block in a
System Generator design.
1. In the ModelComposer_Tutorial/Lab5/ModelComposer_to_SysGen folder, double-click
MoC_design.slx to see the Model Composer design. The design is configured to have AXI4
streaming interfaces at both the input and output. This is done through the Interface Spec block
within the ModelComposerDesign subsystem. Note that there are no structural changes required
at the Simulink level to change interfaces for the IP.
2. Open the followme_script.m in MATLAB. This script will guide you through all the steps to
import the Model Composer generated solution as a block in System Generator.
3. Read the comments at the start of each section (labeled Section 1 to Section 8) in the
MATLAB script and execute each section one at a time (the start of each section is marked by a %%
sign).You can click on Run and Advance to step through each section in the script. The sections
are as follows:
a. Section 1: Set up
Open MATLAB for Model Composer and choose a video file as an input.
video_filename = 'vipmen.avi';
v = VideoReader(video_filename);
frame_height = v.Height;
frame_width = v.Width;
save video_handle v
open_system('MoC_design');
xmcGenerate('MoC_design');
i = 1;
while hasFrame(v)
frame = rgb2gray(readFrame(v));
a = reshape(frame',[],1);
stream_in(i:i+length(a)-1) = a;
i = i + length(a);
end
Linux:
system('<install directory>/Vivado/2019.x/bin/sysgen')
outputVideo = VideoWriter('stream_out.avi');
outputVideo.FrameRate = v.FrameRate;
open(outputVideo)
The output is Boolean. This is why we multiply the img by 255, so that implay shows the image.
for i = 1:length(stream_out)/v.Height/v.Width
img = reshape(stream_out((i-
1)*v.Height*v.Width+1:i*v.Height*v.Width),v.Width,v.Height);
writeVideo(outputVideo,255*img')
end
close(outputVideo);
4. The AXI4 stream uses three signals, DATA, READY, and VALID. The READY signal is a back pressure
signal from the slave side to the master side indicating whether the slave side can accept new data.
As you examine the System Generator model in Section 5, pay attention to the labels on blocks
for each signal to help you understand how the model is designed. For example, whenever the IP
can no longer accept input, the READY signal (top right of the Vivado HLS block) puts pressure on
the master side of the input AXI FIFO by resetting the READY signal. Likewise, the input AXI FIFO
pressures the input stream by resetting its READY signal.
Note that in Simulink all the inputs to a block are to one side of the block, and all the outputs are
on the opposite side. As such, all the slave or master signals are not bundled together on one side
of the block as you might expect.
Conclusion
In this lab, you learned:
• About the Interface Spec block terminology and parameter names.
• How to specify interfaces and to map them directly from the Simulink environment using the
Interface Spec block.
• How Model Composer enables push button IP creation from your design in Simulink with the
necessary interfaces.
• How the Model Composer Hub block in Model Composer helps move from algorithm to
implementation.
• How to generate code files from the Model Composer Hub block and read them.
• How to set compilation targets to C++ code, IP Catalog and System Generator.
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