STM32F405xx, STM32F407xx
CCM data RAM 64 KB External memory CLK, NE [3:0], A[23:0],
NJTRST, JTDI, controller (FSMC) D[31:0], OEN, WEN,
AHB3 NBL[3:0], NL, NREG,
JTCK/SWCLK JTAG & SW MPU SRAM, PSRAM, NOR Flash,
JTDO/SWD, JTDO NWAIT/IORDY, CD
ETM NVIC PC Card (ATA), NAND Flash
TRACECLK NIORD, IOWR, INT[2:3]
TRACED[3:0] D-BUS INTN, NIIS16 as AF
ARM Cortex-M4
168 MHz I-BUS
ART ACCEL/
FPU Flash
CACHE
S-BUS
up to
RNG
AHB bus-matrix 8S7M
MII or RMII as AF Ethernet MAC DMA/ 1 MB
HSYNC, VSYNC
FIFO
MDIO as AF 10/100 FIFO Camera
SRAM 112 KB interface PUIXCLK, D[13:0]
USB
PHY
DP, DM DMA/
SRAM 16 KB
ULPI:CK, D[7:0], DIR, STP, NXT OTG HS FIFO DP
FIFO
PHY
ID, VBUS, SOF USB
DM
8 Streams OTG FS ID, VBUS, SOF
DMA2 FIFO
AHB2 168 MHz
8 Streams AHB1 168 MHz
DMA1 FIFO VDD
Power managmt
Voltage VDD = 1.8 to 3.6 V
regulator
VSS
3.3 to 1.2 V
VCAP1, VCPA2
@VDD
@VDDA
POR Supply
PA[15:0] RC HS reset
GPIO PORT A supervision
RC L S POR/PDR
Int
PB[15:0] BOR VDDA, VSSA
GPIO PORT B P L L1&2 NRST
PVD
PC[15:0] GPIO PORT C
@VDD
@VDDA
PD[15:0] GPIO PORT D XTAL OSC OSC_IN
4- 16MHz OSC_OUT
PE[15:0] Reset &
GPIO PORT E
clockA G T IWDG
M AN
PF[15:0] control
GPIO PORT F PWR VBAT = 1.65 to 3.6 V
PG[15:0] interface
GPIO PORT G
FCLK
HCLKx
PCLKx
@VBAT
OSC32_IN
PH[15:0] XTAL 32 kHz OSC32_OUT
GPIO PORT H
LS
PI[11:0]
RTC
RTC_AF1
GPIO PORT I AWU
Backup register RTC_AF1
LS
4 KB BKPSRAM
TIM2 32b 4 channels, ETR as AF
TIM3 16b 4 channels, ETR as AF
140 AF EXT IT. WKUP DMA2 DMA1 TIM4 16b 4 channels, ETR as AF
TIM5 32b 4 channels
FIFO
D[7:0]
CMD, CK as AF SDIO / MMC
AHB/APB2 AHB/APB1
TIM12 16b 2 channels as AF
4 compl. channels (TIM1_CH1[1:4]N,
4 channels (TIM1_CH1[1:4]ETR, TIM1 / PWM 16b TIM13 16b 1 channel as AF
BKIN as AF
4 compl. channels (TIM1_CH1[1:4]N, TIM14 16b 1 channel as AF
4 channels (TIM1_CH1[1:4]ETR, TIM8 / PWM 16b
BKIN as AF smcard RX, TX as AF
USART2 irDA CTS, RTS as AF
2 channels as AF TIM9 16b
1 3 0 M Hz
smcard RX, TX as AF
USART3 irDA CTS, RTS as AF
APB2 84 MHz
1 channel as AF TIM10 16b
A P B(max)
UART4 RX, TX as AF
1 channel as AF TIM11 16b WWDG
APB142 MHz
UART5 RX, TX as AF
RX, TX, CK, smcard
irDA USART1 MOSI/SD, MISO/SD_ext, SCK/CK
CTS, RTS as AF SP2/I2S2 NSS/WS, MCK as AF
RX, TX, CK, smcard
CTS, RTS as AF irDA
USART6 TIM6 16b MOSI/SD, MISO/SD_ext, SCK/CK
SP3/I2S3 NSS/WS, MCK as AF
MOSI, MISO,
SCK, NSS as AF SPI1
TIM7 16b I2C1/SMBUS SCL, SDA, SMBA as AF
@VDDA
VDDREF_ADC
Temperature sensor @VDDA I2C2/SMBUS SCL, SDA, SMBA as AF
8 analog inputs common
to the 3 ADCs ADC1 DAC1 I2C3/SMBUS SCL, SDA, SMBA as AF
ITF
8 analog inputs common DAC2
ADC2 IF
FIFO
to the ADC1 & 2 bxCAN1 TX, RX
ADC3 bxCAN2 TX, RX
8 analog inputs for ADC3
DAC1_OUT DAC2_OUT
as AF as AF
