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Logic Gates Assignment

Logic gates are physical devices that implement Boolean logic functions, taking one or more inputs and producing a single output. Common logic gates like AND, OR, and NOT can be constructed using electronics like transistors or relays. When combined, logic gates can model all of Boolean logic and computational algorithms through their cascading input-output relationships.

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0% found this document useful (0 votes)
1K views3 pages

Logic Gates Assignment

Logic gates are physical devices that implement Boolean logic functions, taking one or more inputs and producing a single output. Common logic gates like AND, OR, and NOT can be constructed using electronics like transistors or relays. When combined, logic gates can model all of Boolean logic and computational algorithms through their cascading input-output relationships.

Uploaded by

Jopie Aranda
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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“Logic gates”

A logic gate is an idealized or physical device implementing a Boolean function,


that is, it performs a logical operation on one or more logic inputs and produces a
single logic output. Depending on the context, the term may refer to an ideal
logic gate, one that has for instance zero rise time and unlimited fan-out, or it
may refer to a non-ideal physical device.

Logic gates are primarily implemented electronically using diodes or transistors,


but can also be constructed using electromagnetic relays (relay logic), fluidic logic,
pneumatic logic, optics, molecules, or even mechanical elements. With
amplification, logic gates can be cascaded in the same way that Boolean functions
can be composed, allowing the construction of a physical model of all of Boolean
logic, and therefore, all of the algorithms and mathematics that can be described
with Boolean logic.

Symbols Of Logic Gates

Type Distinctive Rectangular Boolean Truth table


shape shape algebra
between
A&B
AND
INPU OUTPU
T T
A B A AND
B
0 0 0
0 1 0
1 0 0
1 1 1

OR
IN OUTPU
PUT T
A B A OR B
0 0 0
1|Page
0 1 1
1 0 1
1 1 1

NOT
IN OUTPU
PUT T
A NOT A
0 1
1 0

NAND
IN OUTPU
PUT T
A B A NAND
B
0 0 1
0 1 1
1 0 1
1 1 0

NOR
INPU OUTPU
T T
A B A NOR
B
0 0 1
0 1 0
1 0 0
1 1 0

XOR
IN OUTPU
PUT T
A B A XOR B
0 0 0
0 1 1
1 0 1
1 1 0

XNOR or
IN OUTPU
PUT T
A B A XNOR
B
0 0 1
0 1 0

2|Page
1 0 0
1 1 1

3|Page

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