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  Pseudo-Random Number Generator

Binary Counter: The circuit most often used as a counter is called a binary flip-flop. The basic
flip-flop can be viewed as a toggle switch having either an ON or OFF position. This is the
binary state 1 (HIGH) or 0 (LOW). Like the toggle switch, the binary flip-flop has 2 binary states
1 or 0. A binary flip flop counter counts in a sequence such as 0, 1, 0 ,1 etc. A straight binary
counter can be built by using 1 or more flip-flops connected in a manner that the binary number
stored in these flip-flops will represent the total number of trigger pulses received at the counter
input.

Ring Counter: A ring counter has 2 or more flip-flops cascaded so that the output from one flip-
flop becomes the input of the next flip-flop. The flip-flops are connected so that all of their
outputs are at the binary state 0 except for one flip-flop. By pulsing the input of the ring counter,
it will sequentially change the binary state of the succeeding flip-flop from binary 0 to binary 1.
The flip-flop that contains the binary 1 indicates the count of this binary counter. The maximum
number of pulses that can be counted by N flip-flops is N pulses.

Shift Register: A serial entry shift register is similar to a ring counter, except that the output
flip-flop is not connected to the input flip-flop. Like the ring counter, the flip-flops are cascaded
so that the output from one flip-flop becomes the input of the next flip-flop. All the set trigger
and reset trigger inputs are tied together to form what is called a shift bus. Clock pulses are
applied to the shift bus to cause the stored binary information to shift from left to right; one bit
position per each received clock pulse. In Figure 2, this serial input/output + parallel output
register has its 5th and 6th bits exclusive ORed to the serial input to form a pseudo-random
sequencer, which is called a pseudo-random number generator by some.

The CMOS logic ICs used were one 4070 XOR (Exclusive OR) and three CD4013B  D flip-
flops. Junk box LEDs were used to observe the binary state of the clock and each of the 6 bits of
the shift register.
Since only one XOR gate is needed for the shift register, the remaining gates were configured to
make the clock. These gates are essentially wired up as inverters to form an astable multivibrator
with a frequency of about 0.45 Hertz or 27 pulses per minute. Shown above in Figure 1 is the
clock schematic and the pin 1 marking for all of the digital ICs on this web page. The output
LED is not mandatory, but will instantly tell you whether or not your clock is working. I built
this whole circuit using Ugly Construction with the ICs flipped upside down in a "dead bug"
fashion. You can increase the clock speed by decreasing the 100K resistor or the capacitor
values. F Hertz = 1/ (2.2 * R * C) with R in ohms and C in farads. The slow clock speed was
chosen to better observe the digital output of the shift register.
In Figure 2 is the shift register. Each 4013 was wired up as 2 cascaded flip-flops and connected
to the clock.  Power was applied and then a test lead was used to bring pin 5 of the first flip-flop
HIGH (connected to 12 volts for 1-2 seconds) . Both flip-flop state monitor LEDS turned ON in
sequence with subsequent clock pulses. Afterwards, pin 5 was set LOW (shorted to ground with
a test lead for a couple of seconds) and each LED turned OFF in sequence with subsequent clock
pulses. The remaining two 4013s were wired up and tested the the same way and then finally the
last XOR gate was wired up.
To avoid error, frequent pin counting and a systematic approach is recommended. For example,
for each 4013, I soldered the ground pins, wired the pin 14 VDD, connected the clock to pins 3
and 11, then wired up the pin 1 and pin 13 LEDs. Systematic construction techniques are
something that you the experimenter can develop and perfect over time. This approach saves
time and grief. On some projects, when you have a lot of pins wired up, tracing and repairing an
early mistake can be difficult.
Shown above is a bread board of the entire pseudo-random number generator. I just built in on a
scrap of board and did not lay it out so the LEDs were in a row, as I am not going to keep this
project. The clock state monitor is the green colored LED. There are 63 possible states or
combinations of the 6 bits (111000, 100110, 100101, 000101, 000001 etc.) State 000000 is
disallowed and will hang up the shift register. If your clock LED is flashing and no shift register
LEDs are lit, then "reset" by momentarily setting pin 5 of the first flip-flop HIGH (momentarily
apply 12 volts). Long live the reset switch!
Pseudo-random numbers are now mostly generated by computer microprocessors controlled by
software and have applications in cryptography, electronic music, security and many other
applications. This "hardware" pseudo-random number generator experiment was really cool and
if you want to randomly flash some LEDs, this could be the project to use!
If you are new to digital electronics; (like me) Welcome! Starting small with projects like this
one will hopefully lead to increased confidence and problem solving skills for even bigger
projects. You can also build the shift registers with J-K flip-flops, but it is more difficult and
4013s or other series D flip-flops are cheap as Борщ (borscht).
Shown above in Figure 3 is how to hook up the XOR gate(s) for 4, 6 and 8 stage pseudo-random
number generators. The 6 stage shift-register is of course, Figure 2 above and is presented for
reference purposes. The 8 stage version = 1 byte.