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Karnaugh Maps - Rules of Simplification: Grouping Ones

Here are logic circuits for the given Boolean expressions: (A + B)C: This can be implemented using two AND gates. The first AND gate takes inputs A and B, whose output is fed into a second AND gate along with input C. A + BC + D: This can be implemented using two AND gates and two OR gates. The first AND gate takes inputs B and C, whose output is fed into the first OR gate along with input A. The output of the first OR gate is fed into the second OR gate along with input D. AB + AC: This can be implemented using two AND gates and one OR gate. The first AND gate takes inputs A and B

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100% found this document useful (1 vote)
291 views14 pages

Karnaugh Maps - Rules of Simplification: Grouping Ones

Here are logic circuits for the given Boolean expressions: (A + B)C: This can be implemented using two AND gates. The first AND gate takes inputs A and B, whose output is fed into a second AND gate along with input C. A + BC + D: This can be implemented using two AND gates and two OR gates. The first AND gate takes inputs B and C, whose output is fed into the first OR gate along with input A. The output of the first OR gate is fed into the second OR gate along with input D. AB + AC: This can be implemented using two AND gates and one OR gate. The first AND gate takes inputs A and B

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Professor Rajput
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Karnaugh Maps - Rules of Simplification

The Karnaugh map uses the following rules for the simplification of expressions
by grouping together adjacent cells containing ones

 Groups may not include any cell containing a zero

 Groups may be horizontal or vertical, but not diagonal.

 Groups must contain 1, 2, 4, 8, or in general 2n cells.


That is if n = 1, a group will contain two 1's since 21 = 2.
If n = 2, a group will contain four 1's since 2 2 = 4.
 Each group should be as large as possible.

 Each cell containing a one must be in at least one group.

 Groups may overlap.

 Groups may wrap around the table. The leftmost cell in a row may be
grouped with the rightmost cell and the top cell in a column may be
grouped with the bottom cell.

 There should be as few groups as possible, as long as this does not


contradict any of the previous rules.

Summmary:

1. No zeros allowed.
2. No diagonals.
3. Only power of 2 number of cells in each group.
4. Groups should be as large as possible.
5. Every one must be in at least one group.
6. Overlapping allowed.
7. Wrap around allowed.
8. Fewest number of groups possible.
Introduction of K-Map (Karnaugh Map)
In many digital circuits and practical problems we need to find expression with minimum
variables. We can minimize Boolean expressions of 3, 4 variables very easily using K-
map without using any Boolean algebra theorems. K-map can take two forms Sum of
Product (SOP) and Product of Sum (POS) according to the need of problem. K-map is
table like representation but it gives more information than TRUTH TABLE. We fill grid
of K-map with 0’s and 1’s then solve it by making groups.
Steps to solve expression using K-map-
1. Select K-map according to the number of variables.
2. Identify minterms or maxterms as given in problem.
3. For SOP put 1’s in blocks of K-map respective to the minterms (0’s elsewhere).
4. For POS put 0’s in blocks of K-map respective to the maxterms(1’s elsewhere).
5. Make rectangular groups containing total terms in power of two like 2,4,8 ..
(except 1) and try to cover as many elements as you can in one group.
6. From the groups made in step 5 find the product terms and sum them up for SOP
form.
SOP FORM
1. K-map of 3 variables-
Z= ∑A,B,C(1,3,6,7)
From red group we get product term—
A’C
From green group we get product term—
AB
Summing these product terms  we get- Final expression (A’C+AB)
2. K-map for 4 variables
F(P,Q,R,S)=∑(0,2,5,7,8,10,13,15)
From red group we get product term—
QS
From green group we get product term—
Q’S’

Summing  these product terms  we get- Final expression (QS+Q’S’)

POS FORM
1. K-map of 3 variables-

F(A,B,C)=π(0,3,6,7)
From red group we find  terms
A    B      C’
Taking complement of these two
A’     B’     C
Now sum up them
(A’ + B’ + C)
From green group we find  terms
B         C
Taking complement of these two terms
B’         C’
Now sum up them
(B’+C’)
From brown group we find terms
A’ B’ C’
Taking complement of these two
ABC
Now sum up them
(A + B + C)

We will take product of these three terms :Final expression (A’ + B’ + C) (B’ + C’) (A +
B + C)
2. K-map of  4 variables-
F(A,B,C,D)=π(3,5,7,8,10,11,12,13)

 
From green group we find  terms
C’     D     B
Taking their complement and summing them
(C+D’+B’)
From red group we find terms
C     D    A’
Taking their complement and summing them
(C’+D’+A)
From blue  group we find  terms
A     C’     D’
Taking their complement and summing them
(A’+C+D)
From brown  group we find  terms
A    B’    C
Taking their complement and summing them
(A’+B+C’)
Finally we express these as product –(C+D’+B’).(C’+D’+A).(A’+C+D).(A’+B+C’)
PITFALL–  *Always remember POS ≠ (SOP)’
*The correct form is (POS of F)=(SOP of F’)
Deriving Boolean expressions from
logic gate diagrams
Introduction
Sometimes, we need to be able to derive the Boolean expression of a logic gate diagram. We might want to do this,
for example, so that we can investigate simplifying the design. We will look at some examples of this now.
Example 1
Consider the following circuit gate diagram:

The first thing to do is to split up the logic gate diagram into more manageable parts. Sometimes, there are a number
of ways you can do this. You should just divide up the diagram in what you think is the best way and see what
happens! 
Next, you need to start on the left and work your way through each part, working out what the output is after each
gate. 
After part 1, we have A.B and A + B
After part 2, we have inverted A.B so we now have A.B
After part 3, we have put the parts together in an AND gate from part 2 and have
(A.B)(A + B)
Let's draw out the truth table for this diagram, just for fun:
You may have noticed from this truth table that the output is exactly the same as an XOR gate. In an XOR gate, you
get an output if both input signals are different. That's what we have here.
We didn't have to produce the truth table for the circuit diagram to see that all we needed to use was an XOR gate.
We could have used our Boolean identities and rules. Let's do that now.
(A.B)(A + B) = Q
Applying the De Morgan's rule that states XY ≡ X + Y we get
(A + B)(A + B)
Expanding this out using the distributive rule, we get
A.A + A.B + B.A + B.B    
Using the rule A.A = 0 and the commutative rule, we can eliminate the first and last terms, so we are left with
A.B + B.A = Q
Let's have a look at the truth table for this simplified Boolean equation:

You can see that the output of this truth table is the same as the previous truth table. Out simplified Boolean
expression must therefore be equivalent to the original. Since we have already identified the output as the output of
an XOR gate, we can replace the whole original circuit with just this:

and save a lot of money in components, complexity and construction!

Example 2
Consider the following logic gate diagram.
 
We started by splitting up our diagram into parts.
We started on the left, and worked out what the logic expression was after each gate.
We continued doing this from left to right until we got to the final logic gate.
This is a completely different design, yet purely by coincidence, we have again ended up with the logic for an XOR
gate! There are always many different designs for a logic gate diagram that achieves a desired output. The trick is to
find the simplest one. We would again replace the original design with just a single XOR gate.

Example 3
It doesn't matter how many inputs you have, or even if your circuit diagram includes NAND or NOR gates. Consider
the following logic gate diagram. 

 
Here are some logic gate circuit problems:
 Draw a logic circuit for (A + B)C.

 Draw a logic circuit for A + BC + D.

 Draw a logic circuit for AB + AC.

 Draw a logic circuit for (A + B)(C + D)C.

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