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04 Noc Flow Control

Flow control determines how network resources like bandwidth and buffers are allocated to packets. It aims to use resources efficiently for high throughput. Flow control can be bufferless, dropping or misrouting packets, or buffered, storing packets in buffers. Buffered flow control uses store-and-forward or cut-through approaches at the packet level, and wormhole or virtual channel approaches at the flit level. Wormhole and virtual channel flow control make more efficient use of buffer space than cut-through by allocating resources to flits rather than entire packets.
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0% found this document useful (0 votes)
70 views44 pages

04 Noc Flow Control

Flow control determines how network resources like bandwidth and buffers are allocated to packets. It aims to use resources efficiently for high throughput. Flow control can be bufferless, dropping or misrouting packets, or buffered, storing packets in buffers. Buffered flow control uses store-and-forward or cut-through approaches at the packet level, and wormhole or virtual channel approaches at the flit level. Wormhole and virtual channel flow control make more efficient use of buffer space than cut-through by allocating resources to flits rather than entire packets.
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Flow Control

Maurizio Palesi

Maurizio Palesi 1
Flow Control
Flow Control determines how the resources
of a network, such as channel bandwidth
and buffer capacity are allocated to packets
traversing a network
Goal is to use resources as efficient as
possible to allow a high throughput
An efficient flow control is a prerequisite to
achieve a good network performance

Maurizio Palesi 2
Flow Control
Flow Control can be viewed as a problem of
Resource allocation
Contention resolution
Resources in form of channels, buffers and
state must be allocated to each packet
If two packets compete for the same
channel flow control can only assign the
channel to one packet, but must also deal
with the other packet

Maurizio Palesi 3
Flow Control
Flow Control can be divided into
Bufferless flow control
Packets are either dropped or misrouted
Buffered flow control
Packets that cannot be routed via the desired
channel are stored in buffers

Maurizio Palesi 4
Circuit Switching

 Circuit-Switching is a bufferless flow control, where several channels


are reserved to form a circuit
 A request (R) propagates from source to destination, which is
answered by an acknowledgement (A)
 Then data is sent (here two five flit packets (D)) and a tail flit (T) is sent
to deallocate the channels

Maurizio Palesi 5
Circuit Switching

 Circuit-switching does not suffer from dropping or misrouting packets


 However there are two weaknesses
 High latency: T0 = 3 H tr + L/b (ignoring wire latency)
 Low throughput, since channel is used to a large fraction of time for
signaling and not for delivery of the payload

Maurizio Palesi 6
Buffered Flow Control
More efficient flow control can be achieved
by adding buffers
With sufficient buffers packets do not need to
be misrouted or dropped, since packets can
wait for the outgoing channel to be ready

Maurizio Palesi 7
Buffered Flow Control
Two main approaches
Packet-Buffer Flow Control
Store-And-Forward
Cut-Through
Flit-Buffer Flow Control
Wormhole Flow Control
Virtual Channel Flow Control

Maurizio Palesi 8
Data Units

Maurizio Palesi 9
Store and Forward Flow Control

 Each node along a route waits until a packet is completely


received (stored) and then the packet is forwarded to the
next node
 Two resources are needed
Packet-sized buffer in the switch
Exclusive use of the outgoing channel T0 = H (tr + L/b)
Maurizio Palesi 10
Cut-Through Flow Control

 Transmission on the next channel starts directly when the


new header flit is received (otherwise it behaves like Store-
Forward)
Channel is released after tail flit
T0 = H tr + L/b

Maurizio Palesi 11
Cut-Through Flow Control
 Shortcomings
Very inefficient use of buffer space
 As buffers are allocated in units of packets
 Often we need multiple indipendent buffer sets to reduce blocking or
provide deadlock avoidance
By allocating buffers in units of packets  contention latency is
increased
 E.g., High-priority packet colliding with a low-priority packet
– Must wait the entire low-priority packet to be transmitted before it can
acquire the channel

Maurizio Palesi 12
Wormhole Flow Control
 Wormhole flow control operates like cut-through, but with
channel and buffers allocated to flits rather than packets
 Three resources are needed
A virtual channel for the packet
 Body flits of a packet use the VC acquired by the head flit
One flit buffer
One flit channel bandwidth

Maurizio Palesi 13
Wormhole - Example

IP

Clock Cycle 0 IP

Maurizio Palesi 14
Wormhole - Example

H H

IP

Clock Cycle 1 IP

Maurizio Palesi 15
Wormhole - Example

B H B

IP
H

Clock Cycle 2 IP

Maurizio Palesi 16
Wormhole - Example

B H B

IP
B

H
Clock Cycle 3 IP

Maurizio Palesi 17
Wormhole - Example

B H T

IP
B

B
Clock Cycle 4 IP

Maurizio Palesi 18
Wormhole - Example

B B H

IP
T

B
Clock Cycle 5 IP

Maurizio Palesi 19
Wormhole - Example

T B B H

IP

T
Clock Cycle 6 IP

Maurizio Palesi 20
Wormhole - Example

T B B

IP

Clock Cycle 7 IP

Maurizio Palesi 21
Wormhole - Example

T B

IP

Clock Cycle 8 IP

Maurizio Palesi 22
Wormhole - Example

IP

Clock Cycle 9 IP

Maurizio Palesi 23
Wormhole - Example

IP

Clock Cycle 10 IP

Maurizio Palesi 24
Wormhole - Example

IP

Clock Cycle 11 IP

Maurizio Palesi 25
Wormhole - Example
L1 L4
L5
L2
IP

L3 IP

 Blue packet  Green packet


 Injected at CC 0  Injected at CC 1
 Delivered at CC 7  Delivered at CC 11
 Latency 7 clock cycles  Latency 10 clock cycles

Maurizio Palesi 26
Wormhole Flow Control
Comparison to cut-through
Wormhole flow control makes far more efficient
use of buffer space
Throughput maybe less, since wormhole flow
control may block a channels mid-packets

Maurizio Palesi 27
Wormhole Flow Control

 The main advantage of wormhole to cut-through is that


buffers in the routers do not need to be able to hold full
packets, but only need to store a number of flits
 This allows to use smaller and faster routers

Maurizio Palesi 28
Virtual Channel Flow Control
 In virtual channel flow-control several channels are
associated with a single physical channel
 This allows to use the bandwidth that otherwise is
left idle when a packet blocks the channel
 Unlike wormhole flow control subsequent flits are
not guaranteed bandwidth, since they have to
compete for bandwidth with other flits

Maurizio Palesi 29
Concept of Virtual Channels

 A physical channel is shared by several virtual channels


 Naturally the speed of each virtual channel connection is
reduced

Maurizio Palesi 30
Virtual Channel Flow Control

 There are several virtual channels for each physical


channel
 Packet A can use a second virtual channel and thus
proceed over channel p and q

Maurizio Palesi 31
Virtual Channels - Example

IP

Clock Cycle 0 IP

Maurizio Palesi 32
Virtual Channels - Example
VC0 → E
B

H H

IP

Clock Cycle 1 IP

Maurizio Palesi 33
Virtual Channels - Example
VC0 → E VC0 → S
B
B

VC0 → E
IP
H

Clock Cycle 2 IP

Maurizio Palesi 34
Virtual Channels - Example
VC0 → E VC0 → S
T VC1 → E
B

BB B

VC0 → E VC0 → L IP

H
Clock Cycle 3 IP

Maurizio Palesi 35
Virtual Channels - Example
VC0 → E VC0 → S
T VC1 → L
VC1 → E
B

T B

VC0 → E VC0 → L IP
B

Clock Cycle 4 IP

Maurizio Palesi 36
Virtual Channels - Example
VC0 → E VC0 → S
VC1 → L
VC1 → E
T

T B B

VC0 → E VC0 → L IP

B
Clock Cycle 5 IP

Maurizio Palesi 37
Virtual Channels - Example
VC0 → E VC0 → S
VC1 → L
VC1 → E
T

VC0 → E VC0 → L IP
B

Clock Cycle 6 IP

Maurizio Palesi 38
Virtual Channels - Example
VC0 → S
VC1 → L
VC1 → E

T T
B

VC0 → E VC0 → L IP

B
Clock Cycle 7 IP

Maurizio Palesi 39
Virtual Channels - Example
VC1 → E VC1 → L

T
B

VC0 → L IP
T

Clock Cycle 8 IP

Maurizio Palesi 40
Virtual Channels - Example
VC1 → L

IP

T
Clock Cycle 9 IP

Maurizio Palesi 41
Virtual Channels - Example

IP

Clock Cycle 10 IP

Maurizio Palesi 42
Virtual Channels - Example

IP

Clock Cycle 11 IP

Maurizio Palesi 43
Virtual Channels - Example
L1 L4

L5
L2
IP

L3 IP

 Blue packet  Green packet


 Injected at CC 0  Injected at CC 1
 Delivered at CC 10  Delivered at CC 11
 Latency 10 clock cycles  Latency 10 clock cycles

Maurizio Palesi 44

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