1.

OVERVIEW
1.1 INTRODUCTION:

A control system is a device or set of devices to manage, command, direct or

regulate the behavior of other devices or systems.

Electro Magnetic Interference (EMI) can corrupt the signal in a motor control
system. In an analog system, noise signals might cause unwanted motion or instability.
Due to the inherent in signal-to-noise ratio of binary coding, the main concern with
digital system is spurious pulses, which may be interpreted as commands or feedback
signals.

The RS-485 signaling is balanced and differential, and is typically transmitted

over twisted wire pairs. It offers high data transmission speeds (35mbps up to 10m and
100kbps at 1200m).

RS-485 interfaces are multi-drop networks up to 4000ft long. The RS-485

specification meets the requirements for a truly multi-point communications network, and
the standard specifies up to 32 drivers and 32 receivers on a single (2-wire) bus. Some
RS-485 Transceivers modify the input impedance to allow up to 8-times more nodes to
be connected to the same bus.

1.2 AIM OF THE PROJECT:

This project focuses on the benefits of using RS-485 signaling for motor
control and motion control applications using PWM. This technology has several
benefits for these applications in terms of noise immunity, wide common-mode
voltage range, adequate data rate, and multipoint capability. Other applications also
use RS-485 signaling to take advantage of these same benefits.

1
1.3 METHODOLOGY:

The DC motor located in the receiver circuit is controlled through RS485

protocol which enables long distance communication with noise immunity and
adequate data rate. The speed of the motor is controlled using PWM (Pulse Width
Modulation).

The input received from the PC is made microcontroller compatible using

MAX232 and then transmitted to the IC implementing RS485 protocol (SN75176B IC)
which enables long distance communication. At the receiver end RS485 protocol
implementation IC receives the transmitted data and sends it to the microcontroller. The
microcontroller receives the data using serial data transmission (UART). In asynchronous
method, each character is placed between start and stop bits. This is called framing. In
data framing of asynchronous communications, the data, such as ASCII characters, are
packed in between a start and stop bit. We have a total of 10 bits for a character: 8 bits for
the ASCII code and 1 bit each for the start and stop bits. The start bit is usually low and
stop bit is high. The rate of serial data transfer communication is stated in bps or it can be
called as baud rate. To allow data transfer between PC and the microcontroller system
without any error, we must make sure that the baud rate of the 8051 system matches the
baud rate of the PC’s COM port. The data from the microcontroller is now sent to the
Driver IC (ULN2003) which drives the low voltage to high voltage and vice versa. Thus
the driver IC drives the motor and the speed is controlled by the variation in the inputs.

1.4 ORGANISATION OF THE REPORT:

Chapter 1 is the introduction to the main board in general and explains the implementation of
RS485 protocol to control the speed of a DC motor. The methodology gives an idea of its
implementation.

Chapter 2 comprehensively, covers the microcontroller core module with its features,
architecture and its working in detail.

Chapter 3 gives the introduction of modules such as RS485 Protocol, MAX232, DB9 connector,
ULN2003, DC motor and their explanation.

2
Chapter 4 elucidates on circuit layout, the hardware connections, design of each circuits and its
operation.

Chapter 5 implementation is done with the flowchart that explains the flow of program,
algorithm, and functions.

Chapter 6 covers the coding of the whole project

Chapter 7 is Results, conclusions and the future scope is touched upon.

1.5 SIGNIFICANCE AND APPLICATIONS:

It can be significantly used in noise immunity, wide common-mode voltage

range, adequate data rate, and multipoint capability. Most common RS-485 application
is inter-programmable logic controller communication in industrial environments.

1.6 BLOCK DIAGRAM:

PC

MAX 232 8

9 ULN
DC
S 2003
MOTOR

RS485 5
RS 485
2

Transmitter section

Receiver section

Figure 1.1 block diagram

3
 2. MICROCONTROLLER
2. 1 INTRODUCTION:

In 1981, Intel Corporation introduced an 8-bit microcontroller called 8051. This

microcontroller had 128 bytes of RAM, 4K bytes of chip ROM, two timers, one serial
port, and four ports all on a single chip. At the time it was also referred as “A SYSTEM
ON A CHIP”

The 8051 is an 8-bit processor meaning that the CPU can work only on 8 bits data at
a time. Data larger than 8 bits has to be broken into 8 bits pieces to be processed by the
CPU. The 8051 has a total of four I\O ports each 8 bit wide.

There are many versions of 8051 with different speeds and amount of on-chip ROM
and they are all compatible with the original 8051. This means that if you write a
program for one it will run on any of them.

The 8051 is an original member of the 8051 family. There are two other members in
the 8051 family of microcontrollers. They are 8052 and 8031. All the three
microcontrollers will have the same internal architecture, but they differ in the following
aspects.

• 8031 has 128 bytes of RAM, two timers and 6 interrupts.

• 8051 has 4K ROM, 128 bytes of RAM, two timers and 6 interrupts.
• 8052 has 8K ROM, 256bytes of RAM, three timers and 8 interrupts.
Of the three microcontrollers, 8051 is the most preferable. Microcontroller supports both
serial and parallel communication.

In the concerned project 8052 microcontroller is used. Here microcontroller used

is AT89S52, which is manufactured by ATMEL laboratories.

4
2.2 DESCRIPTION OF AT89S52 MICROCONTROLLER

2.2.1 Introduction

The AT89S52 provides the following standard features: 8Kbytes of Flash, 256
bytes of RAM, 32 I/O lines, three 16-bit timer/counters, six-vector two-level interrupt
architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition,
the AT89S52 is designed with static logic for operation down to zero frequency and
supports two software selectable power saving modes. The Idle Mode stops the CPU
while allowing the RAM, timer/counters, serial port, and interrupt system to continue
functioning. The Power down Mode saves the RAM contents but freezes the oscillator,
disabling all other chip functions until the next hardware reset.

By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel
AT89S52 is a powerful microcomputer which provides a highly flexible and cost
effective solution to many embedded control applications.

2.2.2 Features of Microcontroller :

• Compatible with MCS-51 Products

• 8 Kbytes of In-System Re-programmable Flash Memory
• Endurance: 1,000 Write/Erase Cycles
• Fully Static Operation: 0 Hz to 24 MHz
• Three-Level Program Memory Lock
• 256 x 8-Bit Internal RAM
• 32 Programmable I/O Lines
• Three 16-Bit Timer/Counters
• Eight vector two level Interrupt Sources
• Programmable Serial Channel
• Low Power Idle and Power Down Modes
In addition, the AT89S52 is designed with static logic for operation down to zero
frequency and supports two software selectable power saving modes. The Idle Mode
stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system

5
to continue functioning. The Power down Mode saves the RAM contents but freezes the
oscillator disabling all other chip functions until the next hardware reset.

2.3 BLOCK DIAGRAM OF MICROCONTROLLER:

Figure 2.1 Block Diagram of AT89S52

6
2.4 PIN CONFIGURATION:

Figure 2.2 Pin Diagram of AT89S52

2.4.1 Pin Description:

VCC

Pin 40 provides Supply voltage to the chip. The voltage source is +5v.

GND

Pin 20 is the grounded.

Port 0

Port 0 is an 8-bit open drain bidirectional I/O port from pin 32 to 39. As an output port
each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be

7
used as high-impedance inputs. Port 0 may also be configured to be the multiplexed low-
order address/data bus during accesses to external program and data memory. In this
mode P0 has internal pull-ups.

Port 0 also receives the code bytes during Flash programming, and outputs the code
bytes during program verification. External pull-ups are required during program
verification.

Port 1

Port 1 is an 8-bit bidirectional I/O port with internal pull-ups from pin 1 to 8. The Port 1
output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they
are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins
that are externally being pulled low will source current (IIL) because of the internal pull-
ups. Port 1 also receives the low-order address bytes during Flash programming and
1program verification.

Port 2

Port 2 is an 8-bit bidirectional I/O port with internal pull-ups from pin 21 to 28. The Port
2 output buffers can sink / source four TTL inputs. When 1s are written to Port 2 pins
they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 2
pins that are externally being pulled low will source current (IIL) because of the internal
pull-ups.

Port 2 emits the high-order address byte during fetches from external program memory
and during accesses to external data memory that uses 16-bit addresses (MOVX @
DPTR). In this application it uses strong internal pull-ups when emitting 1s. During
accesses to external data memory that uses 8-bit addresses (MOVX @ RI), Port 2 emits
the contents of the P2 Special Function Register. Port 2 also receives the high-order
address bits and some control signals during Flash programming and verification.

Port 3

Port 3 is an 8-bit bidirectional I/O port with internal pull-ups from pin 10 to 17. The Port
3 output buffers can sink / source four TTL inputs. When 1s are written to Port 3 pins

8
they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 3
pins that are externally being pulled low will source current (IIL) because of the pull-ups.

Port 3 also serves the functions of various special features of the AT89C51 as listed
below:

Table 2.1 Special Features of AT89S52

Port 3 also receives some control signals for Flash programming and programming
verification.

RST

Pin 9 is the Reset input. It is active high. Upon applying a high pulse to this pin, the
microcontroller will reset and terminate all activities. A high on this pin for two machine
cycles while the oscillator is running resets the device.

ALE/PROG

Address Latch is an output pin and is active high. Address Latch Enable output pulse for
latching the low byte of the address during accesses to external memory. This pin is also
the program pulse input (PROG) during Flash programming. In normal operation ALE is
emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external
timing or clocking purposes.

If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the
bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is

9
weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in
external execution mode.

PSEN

Program Store Enable is the read strobe to external program memory. When the AT8952
is executing code from external program memory, PSEN is activated twice each machine
cycle, except that two PSEN activations are skipped during each access to external data
memory.

EA/VPP

External Access Enable. EA must be strapped to GND in order to enable the device to
fetch code from external program memory locations starting at 0000H up to FFFFH.
Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset.
EA should be strapped to VCC for internal program executions. This pin also receives the
12-volt programming enable voltage (VPP) during Flash programming, for parts that
require 12-volt VPP.

XTAL1

Input to the inverting oscillator amplifier and input to the internal clock operating circuit.

XTAL2

Output from the inverting oscillator amplifier.

2.4.2Oscillator Characteristics:

XTAL1 and XTAL2 are the input and output, respectively, of an inverting
amplifier that can be configured for use as an on chip oscillator, as shown in Figure 2.3.
Either a quartz crystal or ceramic resonator may be used. To drive the device from an
external clock source, XTAL2 should be left unconnected while XTAL1 is driven as
shown in Figure 2.4.

10
 Figure 2.3 Crystal Connections

Figure 2.4 External Clock Drive Configuration

There are no requirements on the duty cycle of the external clock signal, since the
input to the internal clocking circuitry is through a divide-by two flip-flop, but minimum
and maximum voltage high and low time specifications must be observed.

11
2.4.3 Timers and Interrupts

Timer 0 and 1
Timer 0 and Timer 1 in the AT89C52 operate the same way as Timer 0 and Timer 1 in
the AT89C51.

Timer 2
Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event counter.
The type of operation is selected by bit C/T2 in the SFR T2CON. Timer 2 has three
operating modes: capture, auto-reload (up or down counting), and baud rate generator.
The modes are selected by bits in T2CON, as shown in Table 2.2. Timer 2 consists of two
8-bit registers, TH2 and TL2. In the Timer function, the TL2 register is incremented
every machine cycle. Since a machine cycle consists of 12 oscillator periods, the count
rate is 1/12 of the oscillator frequency.

Table 2.2 Timer 2 Operating Modes

In the Counter function, the register is incremented in response to a 1-to-0 transition at its
corresponding external input pin, T2. In this function, the external input is sampled
during S5P2 of every machine cycle. When the samples show a high in one cycle and a
low in the next cycle, the count is incremented. The new count value appears in the
register during S3P1 of the cycle following the one in which the transition was detected.
Since two machine cycles (24 oscillator periods) are required to recognize a 1-to-0
transition, the maximum count rate is 1/24 of the oscillator frequency. To ensure that a

12
given level is sampled at least once before it changes, the level should be held for at least
one full machine cycle.

There are no restrictions on the duty cycle of external input signal, but it should for at
least one full machine to ensure that a given level is sampled at least once before it
changes

Interrupts:

The AT89C52 has a total of six interrupt vectors: two external interrupts (INT0
and INT1), three timer interrupts (Timers 0, 1, and 2), and the serial port interrupt. These
interrupts are all shown in Figure 2. Each of these interrupt sources can be individually
enabled or disabled by setting or clearing a bit in Special Function Register IE. IE also
contains a global disable bit, EA, which disables all interrupts at once. Note that Table
2.3 shows that bit position IE.6 is unimplemented. In the AT89C51, bit position IE.5 is
also unimplemented. User software should not write 1s to these bit positions, since they
may be used in future AT89 products.

Figure 2.5 Interrupts source

13
The interrupt enable registers are listed in the below table 2.3.

Table 2.3 Interrupts Enable Register

Timer 2 interrupt is generated by the logical OR of bits TF2 and EXF2 in register
T2CON. Neither of these flags is cleared by hardware when the service routine is
vectored to. In fact, the service routine may have to determine whether it was TF2 or
EXF2 that generated the interrupt, and that bit will have to be cleared in software.

The Timer 0 and Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in
which the timers overflow. The values are then polled by the circuitry in the next cycle.
However, the Timer 2 flag, TF2, is set at S2P2 and is polled in the same cycle in which
the timer overflows.

2.5 SPECIAL FUNCTION REGISTERS:

14
Special function registers are the areas of memory that control specific functionality of
the 89c52 microcontroller.

a) Accumulator (0E0h)

As its name suggests, it is used to accumulate the results of large no. of instructions. It
can hold 8 bit values.

b) B register (0F0h)

The B register is very similar to accumulator. It may hold 8-bit value. The B register is
only used by MUL AB and DIV AB instructions. In MUL AB the higher byte of the
products gets stored in B register. In DIV AB the quotient gets stored in B with the
remainder in A.

c) Stack pointer (081h)

The stack pointer holds 8-bit value. This is used to indicate where the next value to be
removed from the stack should be taken from. When a value is to be pushed on to the
stack, the 8052 first store the value of SP and then store the value at the resulting memory
location. When a value is to be popped from the stack, the 8052 returns the value from
the memory location indicated by SP and then decrements the value of SP.

d) Data pointer (Data pointer low/high, address 82/83h)

The SFRs DPL and DPH work together to represent a 16-bit value called the data pointer.
The data pointer is used in operations regarding external RAM and some instructions
code memory. It is a 16-bit SFR and also an addressable SFR.

e) Program counter

The program counter is a 16-bit register, which contains the 2-byte address, which tells
the next instruction to execute to be found in memory. When the 8052 is initialized PC
starts at 0000h and is incremented each time an instruction is executes. It is not
addressable SFR.

f) TCON (Timer control, 88h)

15
The timer mode control SFR is used to configure and modify the way in which the 8052’s
two timers operate. This SFR controls whether each of the two timers is running or
stopped and contains a flag to indicate that each timer has overflowed. Additionally,
some non-timer related bits are located in TCON SER. These bits are used to configure
the way in which the external interrupt flags are activated, which are set when an external
interrupt occur.

TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0

g) TMOD (Timer Mode, 89h)

The timer mode SFR is used to configure the mode of operation of each of the two
timers. Using this SR your program may configure each timer to be a 16-bit timer, or 13
bit timer, 8-bit auto reload timer, or two separate timers. Additionally you may configure
the timers to only count when an external pin is activated or to count “events” that are
indicated on an external pin.

‌ ‌

Gate C/ T M1 M0 Gate C/ T M1 M0

TIMER1 TIMER0

h) SBUF (Serial Buffer, 99h)

SBUF is used to hold data in serial communication. It is physically two registers. One is
writing only and is used to hold data to be transmitted out of 8052 via TXD. The other is
read only and holds received data from external sources via RXD. Both mutually
exclusive registers use address 99h.

16
3. DESCRIPTION OF MODULES
3.1 MAX232
3.1.1 Introduction

To allow the compatibility among data communication equipment made by

various manufacturers, and interfacing standard called RS232 was set by the Electronics
industries Association in 1960. Today RS232 is the most widely used I/O interfacing
standard. This standard is used in PCs and numerous types of equipment. However, since
the standard was set long before the advent of the TTL logic family, its input and output
voltage levels are not TTL compatible. In RS232, a 1 bit is represented by -3 to -25V,
while a 0 bit is represented +3 to +25 V, making -3 to +3 undefined. For this reason, to
connect any RS232 to a microcontroller system we must use voltage converters such as
MAX232. The MAX232 is an integrated circuit that converts signals from an RS-232
serial port to signals suitable for the use in TTL compatible digital logic circuits.
MAX232 ICs are commonly referred to as line drivers.
The MAX232 from Maxim was the first IC which in one package contains the
necessary drivers (two) and receivers (also two), to adapt the RS-232 signal voltage
levels to TTL logic.
The MAX232 is a dual driver/receiver and typically converts the RX, TX, CTS
and RTS signals. The Max 232 is a dual driver/receiver that includes a capacitive
voltage generator to supply EIA-232 voltage levels from a single 5V supply. Each
receiver converts EIA-232 to 5V TTL/CMOS levels. These receivers have a typical
threshold of 1.3V, a typical hysteresis of 0.5V and can accept ±30V inputs. Each
driver converts TTL/CMOS to EIA-232 levels. The 89C52 has a built in serial port
that makes it very easy to communicate with the PC's serial port but the 89C52 outputs
are 0 and 5 volts and we need +10 and -10 volts to meet the RS232 serial port
standard. The easiest way to get these values is to use the MAX232. The MAX232
acts as a buffer driver for the processor. It accepts the standard digital logic values of 0
and 5 volts and converts them to the RS232 standard of +10 and -10 volts. It also helps
protect the processor from possible damage from static that may come from people

17
handling the serial port connectors. The MAX232 requires 5 external 1uF capacitors.
These are used by the internal charge pump to create +10 volts and -10 volts. It
includes 2 receivers and 2 transmitters so two serial ports can be used with a single
chip.
The MAX232 has a successor, the MAX232A. The ICs are almost identical, however,
the MAX232A is much more often used (and easier to get) than the original MAX232,
and the MAX232A only needs external capacitors 1/10th the capacity of what the
original MAX232 needs.

RS-232 TTL Logic

-15V … -3V +2V … +5V High
+3V … +15V 0V … +0.8V Low
Table 3.1 logic levels
3.1.2Features:
 Operates with single 5V supply with 10uF charge pump capacitor.
 Operates Up To 120 Kbit/s
 Two Drivers and Two Receivers
 30-V Input Levels
 Low Supply Current . . . 8 mA Typical
 ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A)
 Upgrade With Improved ESD (15-kV HBM) and 0.1-_F Charge-Pump Capacitors
are available With the MAX202

3.1.3 MAX 232 Pin Diagram:

Figure 3.1 pin diagram

18
3.1.4 MAX 232 Dip Pin Layout:

Capacitor Value
No. Name Purpose Signal Voltage
MAX232
+ connector for capacitor should stand at
1 C1+ 10µF
capacitor C1 least 16V
+10V, capacitor should
2 V+ output of voltage pump 10µF to VCC
stand at least 16V
- connector for capacitor should stand at
3 C1- 10µF
capacitor C1 least 16V
+ connector for capacitor should stand at
4 C2+ 10µF
capacitor C2 least 16V
- connector for capacitor should stand at
5 C2- 10µF
capacitor C2 least 16V

output of voltage pump -10V, capacitor should

6 V- 10µF to GND
/ inverter stand at least 16V

7 T2out Driver 2 output RS-232

9 R2out Receiver 2 output TTL
10 T2in Driver 2 input TTL
11 T1in Driver 1 input TTL
12 R1out Receiver 1 output TTL
13 R1in Receiver 1 input RS-232
14 T1out Driver 1 output RS-232
15 GND Ground 0V 10µF to VCC
16 VCC Power supply +5V

Table 3.2 MAX 232 Pin Layout

V+ (2) is also connected to VCC via a capacitor (C3). V-(6) is connected to GND via a
capacitor (C4). And GND (16) and VCC (15) are also connected by a capacitor (C5), as
close as possible to the pins.

19
The MAX232 has two receivers (converts from RS-232 to TTL voltage levels) and two
drivers (converts from TTL logic to RS-232 voltage levels). This means only two of the
RS-232 signals can be converted in each direction. The old MC1488/1498 combo
provided four drivers and receivers.
Typically a pair of a driver/receiver of the MAX232 is used for
• TX and RX
And the second one for
• CTS and RTS.

3.2 DB9 CONNECTOR

3.2.1 Introduction:
The RS232 cables are generally referred to as DB-9 connector. In labeling, DB-9P
refers to the plug connector (male) and DB-9S is for the socket connector (female). The
simplest connection between a PC and microcontroller requires a minimum of three pin,
TXD, RXD, and ground. Many of the pins of the RS232 connector are used for
handshaking signals. They are bypassed since they are not supported by the 8051 UART
chip.

IBM PC/ compatible computers based on x86(8086, 80286, 386, 486 and
Pentium) microprocessors normally have two COM ports. Both COM ports have RS232
type connectors. Many PCs use one each of the DB-25 and DB-9 RS232 connectors. The
COM ports are designated as COM1 and COM2. We can connect the serial port to the
COM 1 port of a PC for serial communication experiments. We use a DB9 connector in
our arrangement.

The AT89C52 has two pins that are used specifically for transferring and
receiving data serially. These two pins are called TXD and RXD and are part of the port3
(P3.0 and P3.1). These pins are TTL compatible; therefore they require a line driver to
make them RS232 compatible. One such line driver is the MAX232 chip. One advantage
of MAX232 chip is that it uses a +5v power source which is the same as the source
voltage for the AT89S52. The MAX232 has two sets of line drivers for receiving and
transferring data. The line drivers for TXD are called T1 and T2 while the line drivers for

20
RXD are designated as R1 and R2. T1 and R1 are used for TXD and RXD of the 89S52
and the second set is left unused. In MAX232 that the TI line driver has a designation of
T1 in and T1 out on pin numbers 11 and 14, respectively. The T1 in pin is the TTL side
and is connected to TXD of the microcontroller, while TI out is the RS232 side that is
connected to the RXD pin of the DB9 connector.

To allow data transfer between PC and the microcontroller system without any
error, we must make sure that the baud rate of the 8051 system matches the baud rate of
the PC’s COM port.

Figure 3.2 DB9 CONNECTOR

3.2.2 Pin Description:

Pin
Name
number

1 CD - Carrier Detect

2 RXD - Receive Data

3 TXD - Transmit Data

DTR - Data Terminal

4
Ready

5 GND - Signal Ground

6 DSR - Data Set Ready

7 RTS - Request To Send

8 CTS - Clear To Send

9 RI - Ring Indicator

Shield
Table 3.3 DB9 PIN
DESCRIPTION

21
3.2.3MAX232 TO DB9 Connections:

MAX232 Pin No. MAX232 Pin Name DB9 Pin Name Voltage DB9 Pin
7 T2out RTS RS-232 7
8 R2in CTS RS-232 n/a
9 R2out RTS TTL n/a
10 T2in CTS TTL n/a
11 T1in TX TTL n/a
12 R1out RX TTL n/a
13 R1in TX RS-232 3
14 T1out RX RS-232 2
15 GND GND 0 5

Table 3.4 MAX232 to DB9 connection

3.3 RS 485
3.3.1 Introduction:
RS232, RS422, RS423 and RS485 are serial communication methods for
computers and devices. RS232 is without doubt the best known interface, because this
serial interface is implemented on almost all computers available today. But some of the
other interfaces are certainly interesting because they can be used in situations where
RS232 is not appropriate. We will concentrate on the RS485 interface here.

RS232 is an interface to connect one DTE, data terminal equipment to one DCE,
data communication equipment at a maximum speed of 20 kbps with a maximum cable
length of 50 feet. This was sufficient in the old days where almost all computer
equipment were connected using modems, but soon after people started to look for
interfaces capable of one or more of the following:

22
 • Connect DTE's directly without the need of modems
• Connect several DTE's in a network structure
• Ability to communicate over longer distances
• Ability to communicate at faster communication rates

RS485 is the most versatile communication standard in the standard series defined by
the EIA, as it performs well on all four points. That is why RS485 is currently a widely
used communication interface in data acquisition and control applications where multiple
nodes communicate with each other.

3.3.2 Differential signals with RS485:

One of the main problems with RS232 is the lack of immunity for noise on the
signal lines. The transmitter and receiver compare the voltages of the data- and
handshake lines with one common zero line. Shifts in the ground level can have
disastrous effects. Therefore the trigger level of the RS232 interface is set relatively high
at ±3 Volt. Noise is easily picked up and limits both the maximum distance and
communication speed. With RS485 on the contrary there is no such thing as a common
zero as a signal reference. Several volts difference in the ground level of the RS485
transmitter and receiver does not cause any problems. The RS485 signals are floating and
each signal is transmitted over a Sig+ line and a Sig- line. The RS485 receiver compares
the voltage difference between both lines, instead of the absolute voltage level on a signal
line. This works well and prevents the existence of ground loops, a common source of
communication problems. The best results are achieved if the Sig+ and Sig- lines are
twisted.

23
 Figure 3.3 Noise in straight and twisted pair cables
In the picture above, noise is generated by magnetic fields from the environment. The
picture shows the magnetic field lines and the noise current in the RS485 data lines that is
the result of that magnetic field. In the straight cable, all noise current is flowing in the
same direction, practically generating a looping current just like in an ordinary
transformer. When the cable is twisted, we see that in some parts of the signal lines the
direction of the noise current is the opposite from the current in other parts of the cable.
Because of this, the resulting noise current is many factors lower than with an ordinary
straight cable. Shielding— which is a common method to prevent noise in RS232 lines—
tries to keep hostile magnetic fields away from the signal lines. Twisted pairs in RS485
communication however add immunity which is a much better way to fight noise. The
magnetic fields are allowed to pass, but do no harm. If high noise immunity is needed,
often a combination of twisting and shielding is used as for example in STP, shielded
twisted pair and FTP, foiled twisted pair networking cables. Differential signals and
twisting allows RS485 to communicate over much longer communication distances than
achievable with RS232. With RS485 communication distances of 1200 m are possible.

Differential signal lines also allow higher bit rates than possible with non-
differential connections. Therefore RS485 can overcome the practical communication
speed limit of RS232. Currently RS485 drivers are produced that can achieve a bit rate of
35 mbps.

24
3.3.3 Differences between RS232 and RS485
RS-232 RS-485
Mode of Operation SINGLE-ENDED DIFFERENTIAL
Total Number of Drivers 1 DRIVER 32 DRIVER
and Receivers on One Line 1 RECEIVER 32 RECEIVER
Maximum Cable Length 50 FEET 4000 FEET
Maximum Data Rate @Max length 20kb/s 100kb/s
Driver Output Signal Level
(Loaded Min.) Loaded + /-5V to +/-15V +/-1.5V
Driver Output Signal Level
(Unloaded Max) Unloaded +/-25V +/-6V
Driver Load Impedance 3kΩ to 7kΩ 54Ω
Max. Driver Current in
High Z State Power On N/A N/A
Max. Driver Current in
High Z State Power Off +/-6mA @ +/-2v +/-100uA
Slew Rate (Max.) 30V/µ S N/A
Receiver Input Voltage Range +/-15V -7V to +12V
Receiver Input Sensitivity +/-3V +/-200mV
Receiver Input Resistance 3kΩ to 7kΩ ≥ 12kΩ
Communication mode Full duplex Full duplex
Half duplex
Table 3.5 Differences between MAX 232 and RS 485

3.3.4 Network topology with RS485

Network topology is probably the reason why RS485 is now the favorite of the
four mentioned interfaces in data acquisition and control applications. RS485 is one of
the interfaces capable of internetworking multiple transmitters and receivers in the same
network. When using the default RS485 receivers with an input resistance of 12 kΩ it is
possible to connect 32 devices to the network. Currently available high-resistance RS485
inputs allow this number to be expanded to 256. RS485 repeaters are also available which
make it possible to increase the number of nodes to several thousands, spanning multiple
kilometers. And that with an interface which does not require intelligent network
hardware: the implementation on the software side is not much more difficult than with

25
RS232. It is the reason why RS485 is so popular with computers, PLCs, micro controllers
and intelligent sensors in scientific and technical applications.

Figure 3.4 RS485 network topology

In the picture above, the general network topology of RS485 is shown. N nodes are
connected in a multipoint RS485 network. For higher speeds and longer lines, the
termination resistances are necessary on both ends of the line to eliminate reflections. Use
100 Ω resistors on both ends. The RS485 network must be designed as one line with
multiple drops, not as a star. Although total cable length maybe shorter in a star
configuration, adequate termination is not possible anymore and signal quality may
degrade significantly.

3.3.5 RS485 functionality

And now the most important question, how does RS485 function in practice?
Default, all the senders on the RS485 bus are in tri-state with high impedance. In higher
level protocols, one of the nodes is defined as a master which sends queries or commands
over the RS485 bus. All other nodes receive these data. Depending of the information in
the sent data, zero or more nodes on the line respond to the master. In this situation,
bandwidth can be used for almost 100%. There are other implementations of RS485
networks where every node can start a data session on its own. This is comparable with
the way ethernet networks function. Because there is a chance of data collision with this
implementation, theory tells us that in this case only 37% of the bandwidth will be
effectively used. With such an implementation of a RS485 network it is necessary that
there is error detection implemented in the higher level protocol to detect the data
corruption and resend the information at a later time.

26
 There is no need for the senders to explicitly turn the RS485 driver on or off.
RS485 drivers automatically return to their high impedance tri-state within a few
microseconds after the data has been sent. Therefore it is not needed to have delays
between the data packets on the RS485 bus.

3.3.6 Master-slave arrangement

Often in a master-slave arrangement when one device dubbed "the master"

initiates all communication activity, the master device itself provides the bias and not the
slave devices. In this configuration, the master device is typically centrally located along
the set of EIA-485 wires, so it would be two slave devices located at the physical end of
the wires that would provide the termination. The master device would provide
termination if it itself was located at a physical end of the wires, but that is often a bad
design[citation needed] as the master would be better located at a halfway point between
the slave devices. Note that it is not a good idea to apply the bias at multiple node
locations, because, by doing so, the effective bias resistance is lowered, which could
possibly cause a violation of the EIA-485 specification and cause communications to
malfunction. By keeping the biasing with the master, slave device design is simplified
and this situation is avoided.

3.3.7 Pin Diagram of SN75176B (RS485):

Figure 3.5 Pin Diagram

3.3.8 Features

• Bidirectional Transceivers
• Meet or Exceed the Requirements of ANSI Standards TIA/EIA-422-B and
TIA/EIA-485-A and ITU Recommendations V.11 and X.27
• Designed for Multipoint Transmission on Long Bus Lines in Noisy Environments

• 3-State Driver and Receiver Outputs

27
 • Individual Driver and Receiver Enables
• Wide Positive and Negative Input/Output Bus Voltage Ranges

• Driver Output Capability . .. +60 mA Max

• Thermal Shutdown Protection

• Driver Positive and Negative Current Limiting
• Receiver Input Impedance ...12 kQ Min
• Receiver Input Sensitivity ... +200 mV
• Receiver Input Hysteresis ... 50 mV Typ
• Operate From Single 5-V Supply.
Description/ordering information
The SN65176B and SN75176B differential bus transceivers are integrated circuits
designed for bidirectional data communication on multipoint bus transmission lines. They
are designed for balanced transmission lines and meet ANSI Standards TIA/EIA-422-B
and TIA/EIA-485-A and ITU Recommendations V.11 and X.27.

The SN65176B and SN75176B combine a 3-state differential line driver and a
differential input line receiver, both of which operate from a single 5-V power supply. The
driver and receiver have active-high and active-low enables, respectively, that can be
connected together externally to function as a direction control. The driver differential
outputs and the receiver differential inputs are connected internally to form differential
input/output (I/O) bus ports that are designed to offer minimum loading to the bus when
the driver is disabled or VCC = 0. These ports feature wide positive and negative common-
mode voltage ranges, making the device suitable for party-line applications.

3.4 ULN 2003

ULN is mainly suited for interfacing between low-level circuits and multiple
peripheral power loads, The series ULN20XX high voltage, high current Darlington
arrays feature continuous load current ratings. The driving circuitry in- turn decodes the

28
coding and conveys the necessary data to the stepper motor, this module aids in the
movement of the arm.

Figure 3.6 ULN 2003

The driver makes use of the ULN2003 driver IC, which contains an array of 7
power Darlington arrays, each capable of driving 500mA of current. At an approximate
duty cycle, depending on ambient temperature and number of drivers turned on,
simultaneously typical power loads totaling over 230w can be controlled.

3.5 DC MOTOR

29
 DC motor is widely used device that translates electrical pulses into mechanical
movement. In DC motor we have positive and negative leads. Connecting them to a DC
voltage source moves the motor in one direction .By reversing the polarity the DC motor
will move in opposite direction. The maximum speed of the DC motor is indicated in rpm
and is given in the datasheet. The DC motor has two rpms: load and no-load. The rpm is
reduced when moving a load and it decreases as the load increases. DC motor also have
voltage and current ratings. The nominal voltage is the voltage of the motor under normal
conditions, and it can be from 1 to 150V depending on the motor. As we increase the
voltage, the rpm goes up. The current rating is the current consumption when nominal
voltage is applied with no load, and can be from 25mA to few amps. As the load
increases the rpm is decreased, unless the current or voltage provided to the motor is
increased, which in turn increases the torque. With a fixed voltage, as the load increases,
the current(power) consumption of a DC motor is increased. If we overload the motor it
will stall, and that can damage the motor due to the heat generated by high current
consumption.

3.5.1 Speed control of DC motor by PWM technique

The speed of the motor depends on three factors: (a) load, (b) voltage, and (c)
current. For a given fixed load we can maintain a steady speed by using a method called
Pulse Width Modulation (PWM). By changing (modulating) the width of the pulse
applied to the DC motor we can increase or decrease the amount of power provided to the
motor, thereby increasing or decreasing the motor speed. Although the voltage has fixed
amplitude it has a variable duty cycle. That means the wider the pulse the higher the
speed. PWM is so widely used in DC motor control that some microcontrollers come
with the PWM circuitry embedded in the chip.

4. CIRCUIT LAYOUT

30
Figure 4.1 RS 485 Transmitter Circuit

31
Figure 4.2 RS485 Receiver Circuit
4.1 CIRCUIT DESCRIPTION
Circuit diagram consists of following blocks.

1. Power supply

2. Transmitter circuit

3. Receiver circuit.

4.1.1. POWER SUPPLY

Description:
A variable regulated power supply, also called a variable bench power supply,
is one where you can continuously adjust the output voltage to your requirements.
Varying the output of the power supply is the recommended way to test a project after
having double checked parts placement against circuit drawings and the parts
placement guide. This type of regulation is ideal for having a simple variable bench
power supply. Actually this is quite important because one of the first projects a
hobbyist should undertake is the construction of a variable regulated power supply.
While a dedicated supply is quite handy e.g. 5V or 12V, it's much handier to have a
variable supply on hand, especially for testing. Most digital logic circuits and
processors need a 5 volt power supply. To use these parts we need to build a regulated
5 volt source. Usually you start with an unregulated power supply ranging from 9 volts
to 24 volts DC (A 12 volt power supply is included with the Beginner Kit and the
Microcontroller Beginner Kit.). To make a 5 volt power supply, we use a LM7805
voltage regulator IC .
 Figure 4.3 voltage regulator

The LM7805 is simple to use. You simply connect the positive lead of your unregulated
DC power supply (anything from 9VDC to 24VDC) to the Input pin, connect the
negative lead to the Common pin and then when you turn on the power, you get a 5 volt
supply from the Output pin.

Circuit Features:
Brief description of operation: Gives out well regulated +5V output, output current
capability of 100 mA

1. Circuit protection: Built-in overheating protection shuts down output when

regulator IC gets too hot
2. Circuit complexity: Very simple and easy to build
3. Circuit performance: Very stable +5V output voltage, reliable operation
4. Availability of components: Easy to get, uses only very common basic
components
5. Design testing: Based on datasheet example circuit, I have used this circuit
successfully as part of many electronics projects
6. Applications: Part of electronics devices, small laboratory power supply
 7. Power supply voltage: Unregulated DC 8-18V power supply
8. Power supply current: Needed output current + 5 mA
9. Component costs: Few dollars for the electronics components + the input
transformer cost

Block Diagram:

Figure 4.4 components of a linear power supply

Basic Power Supply

 FIGURE 4.5 POWER SUPPLY CIRCUIT DIAGRAM

Above is the circuit of a basic unregulated dc power supply. A bridge rectifier

D1 to D4 rectifies the ac from the transformer secondary, which may also be a block
rectifier such as WO4 or even four individual diodes such as 1N4004 types. (See later re
rectifier ratings).

The principal advantage of a bridge rectifier is you do not need a centre tap on the
secondary of the transformer. A further but significant advantage is that the ripple
frequency at the output is twice the line frequency (i.e. 50 Hz or 60 Hz) and makes
filtering somewhat easier.

As a design example consider we wanted a small unregulated bench supply for

our projects. Here we will go for a voltage of about 12 - 13V at a maximum output
current (IL) of 500ma (0.5A). Maximum ripple will be 2.5% and load regulation is 5%.

Now the RMS secondary voltage (primary is whatever is consistent with your
area) for our power transformer T1 must be our desired output Vo PLUS the voltage
drops across D2 and D4 (2 * 0.7V) divided by 1.414.

This means that Vsec = [13V + 1.4V] / 1.414 which equals about 10.2V.
Depending on the VA rating of your transformer, the secondary voltage will vary
considerably in accordance with the applied load. The secondary voltage on a transformer
advertised as say 20VA will be much greater if the secondary is only lightly loaded.

If we accept the 2.5% ripple as adequate for our purposes then at 13V this
becomes 13 * 0.025 = 0.325 Vrms. The peak to peak value is 2.828 times this value. Vrip
= 0.325V X 2.828 = 0.92 V and this value is required to calculate the value of C1. Also
required for this calculation is the time interval for charging pulses. If you are on a 60Hz
system it it 1/ (2 * 60) = 0.008333 which is 8.33 milliseconds. For a 50Hz system it is
0.01 sec or 10 milliseconds.

Remember the tolerance of the type of capacitor used here is very loose. The
important thing to be aware of is the voltage rating should be at least 13V X 1.414 or
18.33. Here you would use at least the standard 25V or higher (absolutely not 16V).With
our rectifier diodes or bridge they should have a PIV rating of 2.828 times the Vsec or at
least 29V. Don't search for this rating because it doesn't exist. Use the next highest
standard or even higher. The current rating should be at least twice the load current
maximum i.e. 2 X 0.5A or 1A. A good type to use would be 1N4004, 1N4006 or 1N4008
types. These are rated 1 Amp at 400PIV, 600PIV and 1000PIV respectively. Always be
on the lookout for the higher voltage ones when they are on special.

IC Voltage Regulators:

Voltage regulators comprise a class of widely used ICs. Regulator IC units

contain the circuitry for reference source, comparator amplifier, control device, and
overload protection all in a single IC. Although the internal construction of the IC is
somewhat different from that described for discrete voltage regulator circuits, the external
operation is much the same. IC units provide regulation of either a fixed positive voltage,
a fixed negative voltage, or an adjustably set voltage.

A power supply can be built using a transformer connected to the ac supply line to
step the ac voltage to desired amplitude, then rectifying that ac voltage, filtering with a
capacitor and RC filter, if desired, and finally regulating the dc voltage using an IC
regulator. The regulators can be selected for operation with load currents from hundreds
of mill amperes to tens of amperes, corresponding to power ratings from mill watts to
tens of watts.

Three-Terminal Voltage Regulators:

IN
OUT

78XX
Vin Vout
C1 C2
GND

Figure 4.6 Fixed Positive Voltage Regulators:

Fig shows the basic connection of a three-terminal voltage regulator IC to a load. The
fixed voltage regulator has an unregulated dc input voltage, Vi, applied to one input
terminal, a regulated output dc voltage, Vo, from a second terminal, with the third
terminal connected to ground. While the input voltage may vary over some permissible
voltage range, and the output load may vary over some acceptable range, the output
voltage remains constant within specified voltage variation limits. A table of positive
voltage regulated ICs is provided in table. For a selected regulator, IC device
specifications list a voltage range over which the input voltage can vary to maintain a
regulated output voltage over a range of load current. The specifications also list the
amount of output voltage change resulting from a change in load current (load regulation)
or in input voltage (line regulation).

IC No. Output voltage(v) Maximum input voltage(v)

7805 +5

7806 +6 35V

7808 +8

7810 +10

7812 +12

7815 +15

7818 +18

7824 +24 40V

Table 4.1 Positive Voltage Regulators in 7800 series

4.1.2 Transmitter circuit:

1. The input to the transmitter circuit is from the PC(hyper terminal/flash magic). The IBM PC/
compatible computers based on x86(8086, 80286, 386, 486 and Pentium) microprocessors
normally have two COM ports. Both COM ports have RS232 type connectors. Many PCs use one
each of the DB-25 and DB-9 RS232 connectors. The RS232 protocol is the most widely used I/O
interfacing standard since it allows compatibility among data communication equipment made by
various manufacturers The COM ports are designated as COM1 and COM2. We can connect the
serial port to the COM 1 port of a PC for serial communication experiments. We use a DB9
connector in our arrangement.

2. The DB-9 RS232 connector delivers the input from the pc to MAX232 IC to convert the
RS232 voltage levels to TTL logic levels and vice versa. Thus MAX232 acts as a voltage

converter. The pins 14, 13, 15 of MAX232 are connected to 2, 3, 5 of db9 connector respectively.

3. The output of MAX232 is then given to the sn75176b IC (RS485 protocol). The pins 11, 12 of
MAX232 are connected to the pins 4, 1 of sn75176b IC (RS485 protocol) respectively.

4.1.3 Receiver circuit:

4. The pins A, B of the transmitter section are connected to the pins A, B of the receiver section.

5. The output of sn75176b (RS485 protocol receiver) is connected to the pins 10, 12, 13 of the
microcontroller. The microcontroller receives the data from the PC using serial data transmission
(UART). In asynchronous method, each character is placed between start and stop bits. This is
called framing. In data framing of asynchronous communications, the data, such as ASCII
characters, are packed in between a start and stop bit. We have a total of 10 bits for a character: 8
bits for the ASCII code and 1 bit each for the start and stop bits. The rate of serial data transfer
communication is stated in bps or it can be called as baud rate .To allow data transfer between
PC and the microcontroller system without any error, we must make sure that the baud
rate of the 8051 system matches the baud rate of the PC’s COM port. Internally the
microcontroller compares the received data with the input data from PC. If the response matches
then it sends the data from pin 28 of microcontroller to pin 1 of ULN2003 driver IC.

6. The ULN2003 driver IC uses the Darlington pairs which drives the low voltage to high voltage
and vice versa. The output of the driver IC then controls the speed of the motor.

7. According to the variation in the inputs from HyperTerminal (1,2,3,4,5) the speed of dc motor
is controlled.
5. SOFTWARE IMPLEMENTATION
5.1FLOW CHART:

Start

Initialize the port of

microcontroller

While(1)

Receive(re Yes
v)=0X31
Motor=1
No
Receive(re Yes
v) =0X32
Motor=1 ON TIME Delay (40)
No Motor=0 OFF TIME delay (60)
Yes
Receive(re
v) =0X33
No Motor=1 ON TIME Delay (15)

Motor=0 OFF TIME delay (85)

Receive(rev
Yes
) =0X34
No Motor=1 ON TIME Delay (5)

Motor=0 ON TIME delay (95)

Receive(rev
)=0X35

Motor=0
 End

5.2 PROCEDURE
1. Initialize the ports of the microcontroller.

2. when an input from the PC is received by the microcontroller, the control enters
an infinite while loop wherein it checks the ascii value of the input given

3. if the transmitted data is ‘1’ then its corresponding ascii value ‘0x31’ is verified
with the received data and if both the received and transmitted data match then the
motor is completely ON ie the ON time delay is ‘100’ and OFF time delay is ‘0’.

4. if the transmitted data is ‘2’ then its corresponding ascii value ‘0x32’ is verified
with the received data and if both the received and transmitted data match then the
motor is completely ON ie the ON time delay is ‘40’ and OFF time delay is ‘60’.

5. if the transmitted data is ‘3’ then its corresponding ascii value ‘0x33’ is verified
with the received data and if both the received and transmitted data match then the
motor is completely ON ie the ON time delay is ‘15’ and OFF time delay is ‘85’.

6. if the transmitted data is ‘4’ then its corresponding ascii value ‘0x34’ is verified
with the received data and if both the received and transmitted data match then the
motor is completely ON ie the ON time delay is ‘5’ and OFF time delay is ‘95’.

7. if the transmitted data is ‘5’ then its corresponding ascii value ‘0x35’ is verified
with the received data and if both the received and transmitted data match then the
motor is completely OFF ie the ON time delay is ‘0’ and OFF time delay is ‘100’.
6. RESULTS AND CONCLUSION
6.1 Results:
The program which controls the speed of the dc motor is dumped into the
microcontroller and depending on the input which is given from the PC, the motor speed
is being controlled and the results are shown in the below figures,

Figure 7.1 when the input given is ’1’

When the input is given as ‘1’ the motor will rotate with maximum speed (i.e.) at the
output logic 1 will be obtained
 Figure 7.2 when the input given is ‘2’

When the input is given as ‘2’ then as given in the code the on time delay will be 40 and
the off time delay will be 60

Figure 7.3 when the input is ‘3’

When the input is given as ‘3’ the motor will rotate with on time delay of 15 and off time
delay of 85.
 Figure 7.4 when input is ‘4’

When the input is given as ‘4’ the motor will rotate with on time delay of 5 and off time
delay of 95

Figure 7.5 when the input is ‘5’

When the input is given as ‘5’ the motor will stop rotating as this condition is for off state
of motor.
6.2 Conclusion:
The “RS485 BASED DC MOTOR CONTROL” has been achieved successfully using
microcontroller unit. The circuit has been tested and verified.

We used “RS485 BASED DC MOTOR CONTROL “ to achieve various devices

controlling like fan, bulb, and printers from long distance at 1200mt with 100kbs. For this
fixed numbering is programmed by using the microcontroller. And the program has been
successfully tested and verified for several specified speed.

As we can obtain various speed of dc motor using PWM for long distance, it replaces
the modem used between analog method applications.

6.3 Future Scope:

By using RTC we can update data, time. At what time device has been operated.

By connecting more number of Rs485 for each device we can control 30device from long
distance of 1200mt.
REFERENCES
1. Muhammad Ali Mazidi: The 8051 Microcontroller and Embedded Systems, 2nd
Edition

2. Daniel W Lewis : Fundamentals of Embedded Software by Daniel W Lewis.

3. Kenneth J.Ayala: The 8051 Micro controller Architecture Programming &

Applications

www.alldatasheets.com

www.electronicsforu.com

www.electronicstutorials.com
APPENDIX A
SECTION A.1: Data sheet of RS 485

ORDERING INFORMATION

Function Tables

DRIVER

INPUT ENABLE OUTPUTS

D DE AB

HL H HL LH ZZ
X HL

RECEIVER

DIFFERENTIAL INPUTS ENABLE OUTPUT R

A–B RE
VID>0.2 V L H

-0.2 V < V ID < 0.2 V LL ?L

VID <-0.2 V
X H Z
Open L ?

H = high level, L = low

level, ? = indeterminate, X =
irrelevant, Z = high
impedance (off)
logic diagram (positive logic)

Absolute maximum ratings over operating free-air temperature range (unless otherwise
noted)t

Supply voltage, VCC (see Note 1) ………………………………………………………7 V

Voltage range at any bus terminal ……………………………………………-10 V to 15 V
Enable input voltage, VI ……………………………………………………….. 5.5 V
Package thermal impedance, θJA (see Notes 2 and 3): D package ……………. 97°C/W
P package …………………………………………………………………….. 85°C/W
PS package …………………………………………………………………….95°C/W
Operating virtual junction temperature, TJ ……………………………………..150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds ………………260°C
Storage temperature range, Tstg …………………………………………..-65°C to 150°C
SECTION A.2: SOURCE CODE:

/***********************************RS 485 RX FOR DC MOTOR SPEED

CONTROL***********************************
RE IS ACTIVE LOW PIN NO: 12 (PORT3:2 PIN)
DE IS ACTIVE HIGH PIN NO: 13(PORT3:3 PIN)
MOTOR CONNECTED TO PORT2:7 PIN
******************************************************************************
*****************************/
#include<reg51.h>
delay(unsigned char);
receive(unsigned char );
sbit motor=P2^7;
//0,1 PINS USED FOR SERIAL COMMUNICATION
sbit RE=P3^2;//ACTIVE LOW PIN NO:12
sbit DE=P3^3; //ACTIVE HIGH PIN NO:13
unsigned char r,recv;
main()
{

RE=0;
DE=0;
motor=0;
while(1)
{
if(receive(recv)==0x31)
{

motor=1;
}
if(receive(recv)==0x32)
{
motor=1;
delay(40);
 motor=0;
delay(60);
}
if(receive(recv)==0x33)
{

motor=1;
delay(15);
motor=0;
delay(85);
}
if(receive(recv)==0x34)
{

motor=1;
delay(5);
motor=0;
delay(95);
}
if(receive(recv)==0x35)
{

motor=0;

}
} }

delay (unsigned char time)

{
unsigned char i,j;
for (i=0; i<time; i++)
for (j=0; j<1275; j++);
}

receive (unsigned char recv)

{

TMOD=0X20;
TH1=0XFD; //use this in the main function r=receive (recv)
SCON=0X50;
TR1=1;
recv=SBUF;
return (recv);