[1] Running Head: OSCILLATORS

Design and Implementation of RC Oscillators

[Name of the Writer]

[Name of Institute]

[Date]
 Oscillators 2

Table of Contents

Introduction.................................................................................................................................................3
How to Design Schmitt Trigger RC Oscillators..............................................................................................4
The General Equation for Frequency...........................................................................................................5
The Schmitt 74LS14 Trigger Gate IC.............................................................................................................5
4093B CMOS Integrated Circuit...................................................................................................................6
TTL vs. CMOS...............................................................................................................................................6
The Output Will Hardly Be Rectangular...................................................................................................7
The 555 Timer..............................................................................................................................................9
Conclusion.................................................................................................................................................10
References.................................................................................................................................................11
 Oscillators 3

Design and Implementation of RC Oscillators

Introduction

As a fundamental block in many electronic systems, oscillators have been employed in

applications such as data and clock recovery circuits, clock-generating circuits, and frequency

modulation and demodulation circuits in various communication systems [6]. With the rapid

development of the wireless communication industry, more available channels are required, with

a calculated range occurring between the adjacent channels for increased spectral efficiency.

Within this context, satellite communications have gained a prominent position, due to their use

in services such as location, navigation, radar, and meteorological systems. However, the

transmitted signal suffers distortions due to external interferences, as well as due to

imperfections of the transmission channel itself. [1]

In addition, noise and interfering signals (which originate from other sources) are added

to the output of the channel, resulting in the received signal, which is a corrupted version of the

transmitted signal [1]. As a complementary factor, the scaling of the CMOS technology leads to

an increase in the sensitivity of electronic devices to the effects of ionizing radiation that may

induce the variation of electrical parameters and consequent degradation of the device

performance, which establishes a demand for the development and application of design

techniques to mitigate these effects. Phase Locked Loop (PLL) architecture frequency

synthesizers have been playing an important role in RF front ends and one of the design

bottlenecks is in the VCO. A critical requirement is the of the gain term (KV CO), which should

have small variations. [1]

How to Design Schmitt Trigger RC Oscillators

This article discusses the good and bad ones about Schmitt Trigger RC oscillators. These

oscillators are especially important because they are present in the internal oscillator in many

popular MCUs. [4]

Equation of the above figure: T = RC \; Ln \ left ({V_Tigh} -V-T} over V High -VT +} {VT +}

over V-T}} \\\ (I.e.

The General Equation for Frequency

These equations assume many convenient parameter values and are not completely

accurate. For example, the high output voltage is not necessarily the supply voltage. Schmitt

Trigger limit voltage values may vary from manufacturer to manufacturer. Therefore, there are

always extra considerations involved in designing an RC oscillator [4]. The portion ln of the

period and frequency equations is a constant that depends on the threshold voltages. Limit

voltages are specific to the specific integrated circuit used. Thus, any constant that appears in the

period and frequency equations varies from chip to chip [2]. In addition, the inverter dataset or

Schmitt Trigger gate will establish a range of possible values for $$ V_ {T +} $$ and $$ V_ - $$,

usually contained in specified minimum and maximum values. A typical value can also be

specified, but there are no guarantees about the actual thresholds your chip will have, in addition

to being within the minimum and maximum. Unfortunately, this part is out of your control. [2]

The Schmitt 74LS14 Trigger Gate IC

A very popular Schmitt Trigger Door IC in the TTL LS family is the 74LS14, which is a

set of six inverters with threshold voltages below 2 [5], 5V (which is half the supply voltage).

The problem is in the discharge phase (low pulse width), which takes much longer than the

charge phase (high pulse width) [2]. This is because the billing phase is set to reach from $$ V_

{T -} $$ to $$ V DD $. This is an initial voltage difference much greater than that of the

discharge phase, which is $$ V T +. The below figure is of Capacitor voltage of an RC oscillator

based on 74LS14. For this gate, $$ V_ {T +} $$ is 1.66V and $$ V_T $$ is 0.84V.

4093B CMOS Integrated Circuit

Another popular option is the CMOS 4093B integrated circuit, which has boundary

voltages much closer to the desired symmetric threshold setting because the 4093B is a two-input

NAND [7], it can act as the original inverter when the other input is high. This provides the

circuit with the feature of an activation input line. Whenever this enable line is high, the circuit

will emit the clock signal and, if it is not, a high fixed value [2].

TTL vs. CMOS

Another reason to use the 4093B IC rather than the 74LS14 is its implementation

technology. The TTL ports are made with BJTs, and although the variant used in the LS family

is turned to low power, its input impedance is not very good. These ports may have an input

current as high as 1mA and as low as 0, 1mA [2]. The CMOS ports, on the other hand, are made

with MOSFETs, which have an extremely high input impedance - always higher than $$ 10M \

Omega $$. This results in input currents always lower than 100nA. The problem with this

parameter (input impedance) is that it has an impact on the accuracy of the serial model for the
 Oscillators 7

RC load / discharge circuit [3]. Having lower input impedances creates a more noticeable load

effect on the RC circuit, and a more appropriate model for this would have to account for this

lower input impedance. One implication of the use of TTL ICs for an RC oscillator is that the

value of R is limited to smaller values, generally below $$ 2k \ Omega $$. This forces designers

to use larger capacitors to reach lower frequencies. In any case, a CMOS port does not have this

problem. [1]

The Output Will Hardly Be Rectangular

The output voltage produced by the original oscillator is not exactly a rectangular wave.

The visible slope in the low and high states is an effect of the analogue nature of the feedback

loop. Remember that the capacitor is consuming current from the high-level output of the gate

and supplying current to the gate's low level output. The cause of the slope is the output

impedance of the gate [3]. Logic gates should generally provide their outputs for digital inputs,

not for power consuming elements, so the output impedance on these devices is not so low.

Thus, the measured voltage at the output pin is the desired output minus the voltage drop in the

output resistor of the venin series. The voltage of this resistor is proportional to the current,

which is changing [3].

The gate in the figure above is modeled as a square wave generator with a series resistor,

shown within the shaded area [1]. The ideal output signal (Vout) is measured at the output of the

generator, before the voltage drop at the output resistor, and is shown as red in the plot. The

actual voltage at the output pin (Vpin) is shown as blue in the plot. Notice how the ideally

rectangular (red) signal is deformed at the high and low (blue) levels [5].

The problem caused by the output resistance is twofold: first it affects the loading and

unloading times, and second, the output signal is not rectangular [2]. By elaborating the first

problem, the output resistance causes the output pin voltage to have a lower high level voltage

and a higher low level voltage. This means that the loading and unloading equations will not be

very accurate, after all, because the voltage differences will actually be smaller. A simple

solution to this imprecision is to learn the value of the output resistance of the data sheet and add

it to the value of R.
 Oscillators 9

$$ RC \ right arrow (Rout + R) \ times C $$

As for the second problem, having a non-rectangular signal is usually not bad for a digital

input. However, connecting anything else to the output will have an effect on the behavior of the

oscillator because the output will be even more charged [2]. A good practice is to leave the

oscillating part to itself and regenerate that signal with one of the remaining gates in the

integrated circuit. This is mainly done to regenerate the output signal to any digital circuit that is

used. In the case of a NAND oscillator, this second stage of the inverter will also leave the "idle"

state as low instead of high. So, depending on the preference of the designer, another inverter

may be necessary [3].

The 555 Timer

The 555 timer is by far the most popular analog integrated circuit for generating low

frequency clock signals with modest requirements [7]. The operating principle for a 555 timer as

an astable multi vibrator is in essence the same as the Schmitt Trigger RC Oscillator because it

maintains the voltage of a capacitor between two levels, typically 1/3 and 2/3 of VDD

respectively [5]. The astable timer circuit 555 can only generate signals with a duty cycle greater

than 50%. However, it is possible to achieve any work cycle with some modifications. Likewise,

the Schmitt Trigger RC oscillator generates signals with some fixed duty cycle (50% for

symmetrical hysteresis), but can be modified to generate almost any duty cycle. Rectifiers

usually do the trick for both circuits.

The potentiometer acts as the load and discharge resistors in the previous circuit. The two

fixed resistors must have a resistance that produces the desired minimum value of test,

respectively. These resistors are required because setting the potentiometer at each end would
 Oscillators 10

make the effective resistance of the RC circuit very low (only the gate output resistance plus the

resistance at the front of the diode), which can cause the gate output current to approximate the

maximum classification [6].

Conclusion

The precise design of an RC oscillator depends on a series of parameters specific to the

components present in the implementation. However, the circuit is so simple that the

inaccuracies in its design can be overcome by trial and error. For example, if the values of R and

C can be defined by the simplified equations, then the resulting frequency can be adjusted by

varying the resistance or the capacitance. In fact, a trimmer potentiometer is often used to adjust

the frequency generated. When it comes to an astable multi vibrator (generating a clock signal

with modest frequency accuracy), the 555 timer does not offer a dramatic advantage over the

very simple Schmitt Trigger oscillator.

References

[1] Ahmadi-Mehr, S.A.R., Tohidian, M. and Staszewski, R.B., 2016. Analysis and design of

a multi-core oscillator for ultra-low phase noise. IEEE Transactions on Circuits and Systems

I: Regular Papers, 63(4), pp.529-539.

[2] Bindal, A., 2017. TTL Logic and CMOS-TTL Interface. In Electronics for Embedded

Systems (pp. 89-122). Springer, Cham.

[3] Chu, S., 2016. Experimental Study on Frequency Pulses of LM 555 Timer in Astable

Mode. ECE 446 Poster Session.

[4] He, J.H., 2017. Amplitude-frequency relationship for conservative nonlinear oscillators

with odd nonlinearities. International Journal of Applied and Computational

Mathematics, 3(2), pp.1557-1560.

[5] Paidimarri, A., Griffith, D., Wang, A., Burra, G. and Chandrakasan, A.P., 2016. An RC

oscillator with comparator offset cancellation. IEEE Journal of Solid-State

Circuits, 51(8), pp.1866-1877..

[6] Said, L.A., Radwan, A.G., Madian, A.H. and Soliman, A.M., 2015. Fractional order

oscillators based on operational transresistance amplifiers. AEU-International Journal of

Electronics and Communications, 69(7), pp.988-1003.

[7] Veendrick, H.J., 2017. CMOS circuits. In Nanometer CMOS ICs (pp. 161-225). Springer,

Cham.