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Basic Reversible Logic Gates and It's Qca Implementation

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Papiya Biswas et al Int. Journal of Engineering Research and Applications www.ijera.com
ISSN : 2248-9622, Vol. 4, Issue 6( Version 5), June 2014, pp.12-16

RESEARCH ARTICLE OPEN ACCESS

Basic Reversible Logic Gates and It’s Qca Implementation

Papiya Biswas, Namit Gupta, Nilesh Patidar
Department of Electronics, SVITS, Baroli, Sanwer Road, Indore, India

Abstract
Reversible logic has various applications in various field like in Nanotechnology, quantum computing, Low
power CMOS, Optical computing and DNA computing, etc. Quantum computation is One of the most important
applications of the reversible logic.Basically reversible circuits do not lose information & reversible
computation is performed only when system comprises of reversible gates. The reversible logic is design,main
purposes are - decrease quantum cost, depth of the circuits & the number of garbage output. This paper provides
the basic‘s of reversible logic gates & its implementation in qca.
Keywords— Reversible logic, Fredkin gate, Feynman gate, Reversible gate, Power dissipation, Garbage,
Quantum cost, Quantum-dot Cellular Automata, Reversible Computing.

I. INTRODUCTION of inputs.Every output pattern has a unique pre-

In present day technology, in digital design image.
,energy loss is an important consideration.
Traditional logic circuits are found ‗irreversible logic B. Reversible logic:
circuit‘ & dissipate heat energy in an order KTln2 In reversible logic, the number of inputs are
joules that the loss of per bit of information, where equal to number the outputs of the gates in order to
k(K=1.3806505*10-23JK-1) is Boltzmann‘s constant have a one-to-one mapping. This generates a unique
& T is absolute temperature. Bennett shows that in set of output vector for each set of input vector. This
case of reversible logic computation KTln2 joules prevents the loss of information which causes power
energy will not dissipate. Hence reversible logic dissipation.In reversible logic fan-out is not possible
design naturally gets priority to design combinational and feedback or loops are not allowed.Some features
as well sequential circuit.Informations are not loss in of a reversible logic circuit that it should have are :-
reversible circuits.Reversible gates are required to Minimum input constants.
design reversible circuits. Reversal gates are the Minimum number of reversible gates.
building blocks for reversible circuits, having the Minimum number of garbage outputs.
following characteristics.
A reversible gate has equal input & output in C. Garbage outputs:
order to have one to one mapping.So that the inputs The number of outputs added to make an n-
of a reversible gate can be uniquely determined from input-k-output function ((n;k)function)reversible is
its outputs. In a reversible gate fan out of every called garbage. whenever it is necessary to make
signal involving primary inputs must be one. equal number of inputs and outputs additional inputs
Classical methods of synthesis of a logic cannot be or outputs can be added .Relation between the
directly applied to design reversible logic circuit. number of garbage outputs and constant inputs are
Garbage output is one of the most important features shown below-
of a reversible gate . Every gate output that is not
used as input to other gate or as a primary output is Input + constant input = output + garbage.
called garbage output. Each reversible gate is
associated with a cost called quantum cost.The D. Quantum cost:
quantum cost of a reversible gate is the number of The cost of the circuit in terms of the cost of a
2x2 reversible gates or quantum logic gates required primitive gate is called Quantum cost. It is calculated
in designing it. knowing the number of primitive reversible logic
gates (1*1 or 2*2) required to realize the circuit. The
II. BASIC DEFINATIONS RELATED TO quantum cost of a circuit is the minimum number of
REVERSIBLE LOGIC 2*2 unitary gates to represent the circuit keeping the
A. Reversible Function: output unchanged. Quantum cost of a 1*1 gate is 0
The Boolean function F(y1; y2,...ym) with and 2*2 gate is the same, which is 1.
multiple output of m boolen variables is called
reversible if the number of output is equal to number

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E. Flexibility: Fig a: Implementation of Feynman Gate in QCA

The universality of a reversible logic gate for
realizing more functions is term as Flexibility.

F. Gate Level:
Gate level refers to the number of levels in the circuit
which are required to realize the given logic
functions.

G .Width of reversible gate: The number is called

logic width of the gate if the number of output bits of
a reversible logic gate necessarily equals its number
of input bits.

III. REVERSIBLE LOGIC GATES

There are three major design goals in reversible 3.2 Fredkin Gate:The Fredkin gate is a 3*3 gate,
logic.1) The quantum cost, which is the number of maps inputs(A,B,C)to outputs
1*1 and 2*2 reversible calculations necessary to (P=A,Q=A‘B+AC,R=AB+A'C) having quantum cost
generate the logical output, should be minimized in of 5 and it requires two dotted rectangle.. Fredkin
order to reduce the computation complexity of the gate and its quantum implementations are shown
device.2) The delay, which is the logical depth of the below:
device, should be minimized.3)The ancillary inputs
and garbage outputs - inputs and outputs not Fig2. Fredkin gate
implemented in the design of the gate and only serve
to maintain reversibility of the device – ought to be A P=A
reduced and ideally eliminated. Fredkin Gate
Some of the important reversible logic gates are: B Q=A’B⨁𝐴𝐶

3.1 Feynman Gate C 𝑅 = 𝐴𝐵⨁𝐴′𝐶

The 2*2 gate is a feynman gate & is also called
as controlled NOT , it is widely used for fan-out
purposes. The inputs (A,B) and output P=A,Q=A xor
B. Table 2 : Truth table of Fredkin Gate
Inputs Outputs
A Feynman P=A
Gate A B C P Q R
B Q=A⨁𝐵
0 0 0 0 0 0
0 0 1 0 0 1
Fig 1: Feynman gate
The Equations are: 0 1 0 0 0 0
P=A
0 1 1 0 0 1
Q=A⨁𝐵
Table 1: Truth table of Feynman Gate 1 0 0 1 0 0
Inputs Outputs
A B P Q 1 0 1 1 1 0
0 0 0 0 1 1 0 1 0 1
0 1 0 1
1 0 1 1 1 1 1 1 1 1
1 1 1 0

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Fig b: Quantum implementation of Fredkin gate Fig c: Implementation of DKG Gate in QCA

3.3 DKG Gate:DKG gate has 4 inputs and 4 outputs,

so it is called Reversible 4*4 DKG gateBlock
diagram & qca implememtation of. DKG gate with
4*4 inputs and outputs. Is shown below:

Fig3: Block diagram of DKG Gate

A P=B
DKG
B Q
Gate
C R
=
D S= B ⨁𝐶 ⊕ 𝐷
= 3.4 MRG Gate: MRG is when utilized as a
programmable reversible logic gate with two select
inputs, it will calculate four logical calculations on
The equations are: those two logical outputs: OR,NOR, XOR and
P=B XNOR..Block diagram and qca implementation of
Q = AC + AD MRG gate is shown below:
R = A⨁B C⨁D ⨁CD
S= B⊕C⊕D Fig4: Block diagram of MRG Gate

Table 3: Truth table of DKG Gate

Inputs Outputs A P
A B C D P Q R S
B MRG Q
0 0 0 0 0 0 0 0
Gate
0 0 0 1 0 0 0 1 R
C
0 0 1 0 0 1 0 1
D S
0 0 1 1 0 1 1 0
0 1 0 0 1 0 0 1
0 1 0 1 1 0 1 0
0 1 1 0 1 1 1 0 The equations are:
0 1 1 1 1 1 1 1 P=A
1 0 0 0 0 1 0 0 Q = A⨁𝐵
1 0 0 1 0 0 1 1 𝑅 = (𝐴⨁𝐵)⨁𝐶
1 0 1 0 0 1 1 1 S = (AB⨁𝐷)⨁((𝐴⨁𝐵)⨁𝐶))
1 0 1 1 0 0 1 0
Table4: Truth table of MRG Gate
1 1 0 0 1 1 0 1
Inputs Outputs
1 1 0 1 1 0 0 0
A B C D P Q R S
1 1 1 0 1 1 0 0
0 0 0 0 0 0 0 0
1 1 1 1 1 0 1 1
0 0 0 1 0 0 0 1
0 0 1 0 0 0 1 1
0 0 1 1 0 0 1 0
0 1 0 0 0 1 1 1

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ISSN : 2248-9622, Vol. 4, Issue 6( Version 5), June 2014, pp.12-16

0 1 0 1 0 1 1 0
0 1 1 0 0 1 0 0
0 1 1 1 0 1 0 1
1 0 0 0 1 1 1 1
1 0 0 1 1 1 1 0
1 0 1 0 1 1 0 0
1 0 1 1 1 1 0 1
1 1 0 0 1 0 0 1 Fig 2: Simulation of Fredkin Gate in QCA
1 1 0 1 1 0 0 0
1 1 1 0 1 0 1 0
1 1 1 1 1 0 1 1

Fig 3: Simulation of DKG Gate in QCA

Fig d: Implementation of MRG Gate in QCA

IV. Simulation Results:

All the design of basic reversible logic gates
were verified by using QCA Designer tool
ver.2.0.3.In the bistable approximation, we use the
following parameters, which are default parameters
in qca designer tool: number of Fig4:Simulation of MRG Gate in QCA
samples(12800),convergence tolerance (0.001000),
radius of effect(65.00nm), relativepermittivity Table 5:Simulation parameters of some reversible
(12.900000),clock high(9.800000e-022), clocklow logic gates based on QCA technology
(3.800000e-023),clock shift(0.000000+000),clock Reversi Comple Area(µ Delay(c Simulati
amplitude factor (2.000000), layer separation ble xity m^2) lock on time
(11.500000), maximum iterations per sample gates (no.of phases)
(100). In our QCA layouts, we have the goal of cell)
workable design with compact layout. The simulation Feynma 75 0.08 1 3s
results of reversible logic gates are below: n gate
Fredkin 187 0.19 2 3s
gate
DKG 752 1.24 4 6s
gate
MRG 456 0.52 5 5s
gate

V. CONCLUSION:
This paper shows the basic‘s of reversible logic
gate and their implementation in Quantum cellular
Fig1:Simulation of Feynman Gate in QCA automata.This paper presents the primitive reversible
gates which are gathered from literature and this
paper helps researches/designers in designing higher
complex computing circuits using reversible gates.
The paper can further be extended towards the digital

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ISSN : 2248-9622, Vol. 4, Issue 6( Version 5), June 2014, pp.12-16

design development using reversible logic circuits reduction for quantum cellular automata,‖
which are helpful in quantum computing, low power Nanotechnology, IEEE Transactions on, vol.
cmos, nanotechnology, cryptography, optical 3(4), pp. 443–450, 2004.
computing, and DNA computing, digital signal
processing (DSP), quantum dot cellular automata,
communication, and computer graphics.

VI. ACKNOWLEDGMENT:
I acknowledge with sincerity and deep sense of
gratitude,the invaluable guidance given by my guide
Prof.Namit Gupta H.O.D of E.I Department and my
co-guide Asso.Prof.Nilesh Patidar.I extend my
sincere regards and heartfelt gratitude to my Parents
and Family members for their support and
encouragement.

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